MIPS: eBPF: Fix icache flush end address
[linux/fpc-iii.git] / arch / mips / bmips / irq.c
blob7efefcf440338c0e657733cdc2ae26e38aba9e35
1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2014 Broadcom Corporation
7 * Author: Kevin Cernekee <cernekee@gmail.com>
8 */
10 #include <linux/of.h>
11 #include <linux/irqchip.h>
13 #include <asm/bmips.h>
14 #include <asm/irq.h>
15 #include <asm/irq_cpu.h>
16 #include <asm/time.h>
18 static const struct of_device_id smp_intc_dt_match[] = {
19 { .compatible = "brcm,bcm7038-l1-intc" },
20 { .compatible = "brcm,bcm6345-l1-intc" },
24 unsigned int get_c0_compare_int(void)
26 return CP0_LEGACY_COMPARE_IRQ;
29 void __init arch_init_irq(void)
31 struct device_node *dn;
33 /* Only these controllers support SMP IRQ affinity */
34 dn = of_find_matching_node(NULL, smp_intc_dt_match);
35 if (dn)
36 of_node_put(dn);
37 else
38 bmips_tp1_irqs = 0;
40 irqchip_init();
43 IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
44 mips_cpu_irq_of_init);