arch/mips/ralink/early_printk.c

   1 /*
   2  *  This program is free software; you can redistribute it and/or modify it
   3  *  under the terms of the GNU General Public License version 2 as published
   4  *  by the Free Software Foundation.
   5  *
   6  *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
   7  */
   8
   9 #include <linux/io.h>
  10 #include <linux/serial_reg.h>
  11
  12 #include <asm/addrspace.h>
  13 #include <asm/setup.h>
  14
  15 #ifdef CONFIG_SOC_RT288X
  16 #define EARLY_UART_BASE         0x300c00
  17 #define CHIPID_BASE             0x300004
  18 #elif defined(CONFIG_SOC_MT7621)
  19 #define EARLY_UART_BASE         0x1E000c00
  20 #define CHIPID_BASE             0x1E000004
  21 #else
  22 #define EARLY_UART_BASE         0x10000c00
  23 #define CHIPID_BASE             0x10000004
  24 #endif
  25
  26 #define MT7628_CHIP_NAME1       0x20203832
  27
  28 #define UART_REG_TX             0x04
  29 #define UART_REG_LCR            0x0c
  30 #define UART_REG_LSR            0x14
  31 #define UART_REG_LSR_RT2880     0x1c
  32
  33 static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
  34 static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
  35 static int init_complete;
  36
  37 static inline void uart_w32(u32 val, unsigned reg)
  38 {
  39         __raw_writel(val, uart_membase + reg);
  40 }
  41
  42 static inline u32 uart_r32(unsigned reg)
  43 {
  44         return __raw_readl(uart_membase + reg);
  45 }
  46
  47 static inline int soc_is_mt7628(void)
  48 {
  49         return IS_ENABLED(CONFIG_SOC_MT7620) &&
  50                 (__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
  51 }
  52
  53 static void find_uart_base(void)
  54 {
  55         int i;
  56
  57         if (!soc_is_mt7628())
  58                 return;
  59
  60         for (i = 0; i < 3; i++) {
  61                 u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
  62
  63                 if (!reg)
  64                         continue;
  65
  66                 uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
  67                                                           (0x100 * i));
  68                 break;
  69         }
  70 }
  71
  72 void prom_putchar(char ch)
  73 {
  74         if (!init_complete) {
  75                 find_uart_base();
  76                 init_complete = 1;
  77         }
  78
  79         if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
  80                 uart_w32((unsigned char)ch, UART_TX);
  81                 while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
  82                         ;
  83         } else {
  84                 while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
  85                         ;
  86                 uart_w32((unsigned char)ch, UART_REG_TX);
  87                 while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
  88                         ;
  89         }
  90 }