MIPS: eBPF: Fix icache flush end address
[linux/fpc-iii.git] / arch / mips / sibyte / bcm1480 / setup.c
blob2035aaec8514f51c835988d69743afe61e3c0418
1 /*
2 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/export.h>
21 #include <linux/reboot.h>
22 #include <linux/string.h>
24 #include <asm/bootinfo.h>
25 #include <asm/cpu.h>
26 #include <asm/mipsregs.h>
27 #include <asm/io.h>
28 #include <asm/sibyte/sb1250.h>
30 #include <asm/sibyte/bcm1480_regs.h>
31 #include <asm/sibyte/bcm1480_scd.h>
32 #include <asm/sibyte/sb1250_scd.h>
34 unsigned int sb1_pass;
35 unsigned int soc_pass;
36 unsigned int soc_type;
37 EXPORT_SYMBOL(soc_type);
38 unsigned int periph_rev;
39 EXPORT_SYMBOL_GPL(periph_rev);
40 unsigned int zbbus_mhz;
41 EXPORT_SYMBOL(zbbus_mhz);
43 static unsigned int part_type;
45 static char *soc_str;
46 static char *pass_str;
48 static int __init setup_bcm1x80_bcm1x55(void)
50 int ret = 0;
52 switch (soc_pass) {
53 case K_SYS_REVISION_BCM1480_S0:
54 periph_rev = 1;
55 pass_str = "S0 (pass1)";
56 break;
57 case K_SYS_REVISION_BCM1480_A1:
58 periph_rev = 1;
59 pass_str = "A1 (pass1)";
60 break;
61 case K_SYS_REVISION_BCM1480_A2:
62 periph_rev = 1;
63 pass_str = "A2 (pass1)";
64 break;
65 case K_SYS_REVISION_BCM1480_A3:
66 periph_rev = 1;
67 pass_str = "A3 (pass1)";
68 break;
69 case K_SYS_REVISION_BCM1480_B0:
70 periph_rev = 1;
71 pass_str = "B0 (pass2)";
72 break;
73 default:
74 printk("Unknown %s rev %x\n", soc_str, soc_pass);
75 periph_rev = 1;
76 pass_str = "Unknown Revision";
77 break;
80 return ret;
83 /* Setup code likely to be common to all SiByte platforms */
85 static int __init sys_rev_decode(void)
87 int ret = 0;
89 switch (soc_type) {
90 case K_SYS_SOC_TYPE_BCM1x80:
91 if (part_type == K_SYS_PART_BCM1480)
92 soc_str = "BCM1480";
93 else if (part_type == K_SYS_PART_BCM1280)
94 soc_str = "BCM1280";
95 else
96 soc_str = "BCM1x80";
97 ret = setup_bcm1x80_bcm1x55();
98 break;
100 case K_SYS_SOC_TYPE_BCM1x55:
101 if (part_type == K_SYS_PART_BCM1455)
102 soc_str = "BCM1455";
103 else if (part_type == K_SYS_PART_BCM1255)
104 soc_str = "BCM1255";
105 else
106 soc_str = "BCM1x55";
107 ret = setup_bcm1x80_bcm1x55();
108 break;
110 default:
111 printk("Unknown part type %x\n", part_type);
112 ret = 1;
113 break;
116 return ret;
119 void __init bcm1480_setup(void)
121 uint64_t sys_rev;
122 int plldiv;
124 sb1_pass = read_c0_prid() & PRID_REV_MASK;
125 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
126 soc_type = SYS_SOC_TYPE(sys_rev);
127 part_type = G_SYS_PART(sys_rev);
128 soc_pass = G_SYS_REVISION(sys_rev);
130 if (sys_rev_decode()) {
131 printk("Restart after failure to identify SiByte chip\n");
132 machine_restart(NULL);
135 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
136 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
138 printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
139 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
140 printk("Board type: %s\n", get_system_type());