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MIPS: eBPF: Fix icache flush end address
[linux/fpc-iii.git] / drivers / bus / ti-sysc.c
bloba3a2d39280d952e5c51d812a041f61916310c318
1 /*
2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/io.h>
15 #include <linux/clk.h>
16 #include <linux/clkdev.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/reset.h>
23 #include <linux/of_address.h>
24 #include <linux/of_platform.h>
25 #include <linux/slab.h>
26 #include <linux/iopoll.h>
27
28 #include <linux/platform_data/ti-sysc.h>
29
30 #include <dt-bindings/bus/ti-sysc.h>
31
32 #define MAX_MODULE_SOFTRESET_WAIT 10000
33
34 static const char * const reg_names[] = { "rev", "sysc", "syss", };
35
36 enum sysc_clocks {
37 SYSC_FCK,
38 SYSC_ICK,
39 SYSC_OPTFCK0,
40 SYSC_OPTFCK1,
41 SYSC_OPTFCK2,
42 SYSC_OPTFCK3,
43 SYSC_OPTFCK4,
44 SYSC_OPTFCK5,
45 SYSC_OPTFCK6,
46 SYSC_OPTFCK7,
47 SYSC_MAX_CLOCKS,
48 };
49
50 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
51
52 #define SYSC_IDLEMODE_MASK 3
53 #define SYSC_CLOCKACTIVITY_MASK 3
54
55 /**
56 * struct sysc - TI sysc interconnect target module registers and capabilities
57 * @dev: struct device pointer
58 * @module_pa: physical address of the interconnect target module
59 * @module_size: size of the interconnect target module
60 * @module_va: virtual address of the interconnect target module
61 * @offsets: register offsets from module base
62 * @clocks: clocks used by the interconnect target module
63 * @clock_roles: clock role names for the found clocks
64 * @nr_clocks: number of clocks used by the interconnect target module
65 * @legacy_mode: configured for legacy mode if set
66 * @cap: interconnect target module capabilities
67 * @cfg: interconnect target module configuration
68 * @name: name if available
69 * @revision: interconnect target module revision
70 * @needs_resume: runtime resume needed on resume from suspend
71 */
72 struct sysc {
73 struct device *dev;
74 u64 module_pa;
75 u32 module_size;
76 void __iomem *module_va;
77 int offsets[SYSC_MAX_REGS];
78 struct clk **clocks;
79 const char **clock_roles;
80 int nr_clocks;
81 struct reset_control *rsts;
82 const char *legacy_mode;
83 const struct sysc_capabilities *cap;
84 struct sysc_config cfg;
85 struct ti_sysc_cookie cookie;
86 const char *name;
87 u32 revision;
88 bool enabled;
89 bool needs_resume;
90 bool child_needs_resume;
91 struct delayed_work idle_work;
92 };
93
94 void sysc_write(struct sysc *ddata, int offset, u32 value)
95 {
96 writel_relaxed(value, ddata->module_va + offset);
97 }
98
99 static u32 sysc_read(struct sysc *ddata, int offset)
100 {
101 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
102 u32 val;
103
104 val = readw_relaxed(ddata->module_va + offset);
105 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
106
107 return val;
108 }
109
110 return readl_relaxed(ddata->module_va + offset);
111 }
112
113 static bool sysc_opt_clks_needed(struct sysc *ddata)
114 {
115 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
116 }
117
118 static u32 sysc_read_revision(struct sysc *ddata)
119 {
120 int offset = ddata->offsets[SYSC_REVISION];
121
122 if (offset < 0)
123 return 0;
124
125 return sysc_read(ddata, offset);
126 }
127
128 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
129 {
130 int error, i, index = -ENODEV;
131
132 if (!strncmp(clock_names[SYSC_FCK], name, 3))
133 index = SYSC_FCK;
134 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
135 index = SYSC_ICK;
136
137 if (index < 0) {
138 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
139 if (!ddata->clocks[i]) {
140 index = i;
141 break;
142 }
143 }
144 }
145
146 if (index < 0) {
147 dev_err(ddata->dev, "clock %s not added\n", name);
148 return index;
149 }
150
151 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
152 if (IS_ERR(ddata->clocks[index])) {
153 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
154 return 0;
155
156 dev_err(ddata->dev, "clock get error for %s: %li\n",
157 name, PTR_ERR(ddata->clocks[index]));
158
159 return PTR_ERR(ddata->clocks[index]);
160 }
161
162 error = clk_prepare(ddata->clocks[index]);
163 if (error) {
164 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
165 name, error);
166
167 return error;
168 }
169
170 return 0;
171 }
172
173 static int sysc_get_clocks(struct sysc *ddata)
174 {
175 struct device_node *np = ddata->dev->of_node;
176 struct property *prop;
177 const char *name;
178 int nr_fck = 0, nr_ick = 0, i, error = 0;
179
180 ddata->clock_roles = devm_kcalloc(ddata->dev,
181 SYSC_MAX_CLOCKS,
182 sizeof(*ddata->clock_roles),
183 GFP_KERNEL);
184 if (!ddata->clock_roles)
185 return -ENOMEM;
186
187 of_property_for_each_string(np, "clock-names", prop, name) {
188 if (!strncmp(clock_names[SYSC_FCK], name, 3))
189 nr_fck++;
190 if (!strncmp(clock_names[SYSC_ICK], name, 3))
191 nr_ick++;
192 ddata->clock_roles[ddata->nr_clocks] = name;
193 ddata->nr_clocks++;
194 }
195
196 if (ddata->nr_clocks < 1)
197 return 0;
198
199 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
200 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
201
202 return -EINVAL;
203 }
204
205 if (nr_fck > 1 || nr_ick > 1) {
206 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
207
208 return -EINVAL;
209 }
210
211 ddata->clocks = devm_kcalloc(ddata->dev,
212 ddata->nr_clocks, sizeof(*ddata->clocks),
213 GFP_KERNEL);
214 if (!ddata->clocks)
215 return -ENOMEM;
216
217 for (i = 0; i < ddata->nr_clocks; i++) {
218 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
219 if (error && error != -ENOENT)
220 return error;
221 }
222
223 return 0;
224 }
225
226 /**
227 * sysc_init_resets - reset module on init
228 * @ddata: device driver data
229 *
230 * A module can have both OCP softreset control and external rstctrl.
231 * If more complicated rstctrl resets are needed, please handle these
232 * directly from the child device driver and map only the module reset
233 * for the parent interconnect target module device.
234 *
235 * Automatic reset of the module on init can be skipped with the
236 * "ti,no-reset-on-init" device tree property.
237 */
238 static int sysc_init_resets(struct sysc *ddata)
239 {
240 int error;
241
242 ddata->rsts =
243 devm_reset_control_array_get_optional_exclusive(ddata->dev);
244 if (IS_ERR(ddata->rsts))
245 return PTR_ERR(ddata->rsts);
246
247 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
248 goto deassert;
249
250 error = reset_control_assert(ddata->rsts);
251 if (error)
252 return error;
253
254 deassert:
255 error = reset_control_deassert(ddata->rsts);
256 if (error)
257 return error;
258
259 return 0;
260 }
261
262 /**
263 * sysc_parse_and_check_child_range - parses module IO region from ranges
264 * @ddata: device driver data
265 *
266 * In general we only need rev, syss, and sysc registers and not the whole
267 * module range. But we do want the offsets for these registers from the
268 * module base. This allows us to check them against the legacy hwmod
269 * platform data. Let's also check the ranges are configured properly.
270 */
271 static int sysc_parse_and_check_child_range(struct sysc *ddata)
272 {
273 struct device_node *np = ddata->dev->of_node;
274 const __be32 *ranges;
275 u32 nr_addr, nr_size;
276 int len, error;
277
278 ranges = of_get_property(np, "ranges", &len);
279 if (!ranges) {
280 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
281
282 return -ENOENT;
283 }
284
285 len /= sizeof(*ranges);
286
287 if (len < 3) {
288 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
289
290 return -EINVAL;
291 }
292
293 error = of_property_read_u32(np, "#address-cells", &nr_addr);
294 if (error)
295 return -ENOENT;
296
297 error = of_property_read_u32(np, "#size-cells", &nr_size);
298 if (error)
299 return -ENOENT;
300
301 if (nr_addr != 1 || nr_size != 1) {
302 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
303
304 return -EINVAL;
305 }
306
307 ranges++;
308 ddata->module_pa = of_translate_address(np, ranges++);
309 ddata->module_size = be32_to_cpup(ranges);
310
311 return 0;
312 }
313
314 static struct device_node *stdout_path;
315
316 static void sysc_init_stdout_path(struct sysc *ddata)
317 {
318 struct device_node *np = NULL;
319 const char *uart;
320
321 if (IS_ERR(stdout_path))
322 return;
323
324 if (stdout_path)
325 return;
326
327 np = of_find_node_by_path("/chosen");
328 if (!np)
329 goto err;
330
331 uart = of_get_property(np, "stdout-path", NULL);
332 if (!uart)
333 goto err;
334
335 np = of_find_node_by_path(uart);
336 if (!np)
337 goto err;
338
339 stdout_path = np;
340
341 return;
342
343 err:
344 stdout_path = ERR_PTR(-ENODEV);
345 }
346
347 static void sysc_check_quirk_stdout(struct sysc *ddata,
348 struct device_node *np)
349 {
350 sysc_init_stdout_path(ddata);
351 if (np != stdout_path)
352 return;
353
354 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
355 SYSC_QUIRK_NO_RESET_ON_INIT;
356 }
357
358 /**
359 * sysc_check_one_child - check child configuration
360 * @ddata: device driver data
361 * @np: child device node
362 *
363 * Let's avoid messy situations where we have new interconnect target
364 * node but children have "ti,hwmods". These belong to the interconnect
365 * target node and are managed by this driver.
366 */
367 static int sysc_check_one_child(struct sysc *ddata,
368 struct device_node *np)
369 {
370 const char *name;
371
372 name = of_get_property(np, "ti,hwmods", NULL);
373 if (name)
374 dev_warn(ddata->dev, "really a child ti,hwmods property?");
375
376 sysc_check_quirk_stdout(ddata, np);
377
378 return 0;
379 }
380
381 static int sysc_check_children(struct sysc *ddata)
382 {
383 struct device_node *child;
384 int error;
385
386 for_each_child_of_node(ddata->dev->of_node, child) {
387 error = sysc_check_one_child(ddata, child);
388 if (error)
389 return error;
390 }
391
392 return 0;
393 }
394
395 /*
396 * So far only I2C uses 16-bit read access with clockactivity with revision
397 * in two registers with stride of 4. We can detect this based on the rev
398 * register size to configure things far enough to be able to properly read
399 * the revision register.
400 */
401 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
402 {
403 if (resource_size(res) == 8)
404 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
405 }
406
407 /**
408 * sysc_parse_one - parses the interconnect target module registers
409 * @ddata: device driver data
410 * @reg: register to parse
411 */
412 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
413 {
414 struct resource *res;
415 const char *name;
416
417 switch (reg) {
418 case SYSC_REVISION:
419 case SYSC_SYSCONFIG:
420 case SYSC_SYSSTATUS:
421 name = reg_names[reg];
422 break;
423 default:
424 return -EINVAL;
425 }
426
427 res = platform_get_resource_byname(to_platform_device(ddata->dev),
428 IORESOURCE_MEM, name);
429 if (!res) {
430 ddata->offsets[reg] = -ENODEV;
431
432 return 0;
433 }
434
435 ddata->offsets[reg] = res->start - ddata->module_pa;
436 if (reg == SYSC_REVISION)
437 sysc_check_quirk_16bit(ddata, res);
438
439 return 0;
440 }
441
442 static int sysc_parse_registers(struct sysc *ddata)
443 {
444 int i, error;
445
446 for (i = 0; i < SYSC_MAX_REGS; i++) {
447 error = sysc_parse_one(ddata, i);
448 if (error)
449 return error;
450 }
451
452 return 0;
453 }
454
455 /**
456 * sysc_check_registers - check for misconfigured register overlaps
457 * @ddata: device driver data
458 */
459 static int sysc_check_registers(struct sysc *ddata)
460 {
461 int i, j, nr_regs = 0, nr_matches = 0;
462
463 for (i = 0; i < SYSC_MAX_REGS; i++) {
464 if (ddata->offsets[i] < 0)
465 continue;
466
467 if (ddata->offsets[i] > (ddata->module_size - 4)) {
468 dev_err(ddata->dev, "register outside module range");
469
470 return -EINVAL;
471 }
472
473 for (j = 0; j < SYSC_MAX_REGS; j++) {
474 if (ddata->offsets[j] < 0)
475 continue;
476
477 if (ddata->offsets[i] == ddata->offsets[j])
478 nr_matches++;
479 }
480 nr_regs++;
481 }
482
483 if (nr_regs < 1) {
484 dev_err(ddata->dev, "missing registers\n");
485
486 return -EINVAL;
487 }
488
489 if (nr_matches > nr_regs) {
490 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
491 nr_regs, nr_matches);
492
493 return -EINVAL;
494 }
495
496 return 0;
497 }
498
499 /**
500 * syc_ioremap - ioremap register space for the interconnect target module
501 * @ddata: device driver data
502 *
503 * Note that the interconnect target module registers can be anywhere
504 * within the interconnect target module range. For example, SGX has
505 * them at offset 0x1fc00 in the 32MB module address space. And cpsw
506 * has them at offset 0x1200 in the CPSW_WR child. Usually the
507 * the interconnect target module registers are at the beginning of
508 * the module range though.
509 */
510 static int sysc_ioremap(struct sysc *ddata)
511 {
512 int size;
513
514 size = max3(ddata->offsets[SYSC_REVISION],
515 ddata->offsets[SYSC_SYSCONFIG],
516 ddata->offsets[SYSC_SYSSTATUS]);
517
518 if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
519 return -EINVAL;
520
521 ddata->module_va = devm_ioremap(ddata->dev,
522 ddata->module_pa,
523 size + sizeof(u32));
524 if (!ddata->module_va)
525 return -EIO;
526
527 return 0;
528 }
529
530 /**
531 * sysc_map_and_check_registers - ioremap and check device registers
532 * @ddata: device driver data
533 */
534 static int sysc_map_and_check_registers(struct sysc *ddata)
535 {
536 int error;
537
538 error = sysc_parse_and_check_child_range(ddata);
539 if (error)
540 return error;
541
542 error = sysc_check_children(ddata);
543 if (error)
544 return error;
545
546 error = sysc_parse_registers(ddata);
547 if (error)
548 return error;
549
550 error = sysc_ioremap(ddata);
551 if (error)
552 return error;
553
554 error = sysc_check_registers(ddata);
555 if (error)
556 return error;
557
558 return 0;
559 }
560
561 /**
562 * sysc_show_rev - read and show interconnect target module revision
563 * @bufp: buffer to print the information to
564 * @ddata: device driver data
565 */
566 static int sysc_show_rev(char *bufp, struct sysc *ddata)
567 {
568 int len;
569
570 if (ddata->offsets[SYSC_REVISION] < 0)
571 return sprintf(bufp, ":NA");
572
573 len = sprintf(bufp, ":%08x", ddata->revision);
574
575 return len;
576 }
577
578 static int sysc_show_reg(struct sysc *ddata,
579 char *bufp, enum sysc_registers reg)
580 {
581 if (ddata->offsets[reg] < 0)
582 return sprintf(bufp, ":NA");
583
584 return sprintf(bufp, ":%x", ddata->offsets[reg]);
585 }
586
587 static int sysc_show_name(char *bufp, struct sysc *ddata)
588 {
589 if (!ddata->name)
590 return 0;
591
592 return sprintf(bufp, ":%s", ddata->name);
593 }
594
595 /**
596 * sysc_show_registers - show information about interconnect target module
597 * @ddata: device driver data
598 */
599 static void sysc_show_registers(struct sysc *ddata)
600 {
601 char buf[128];
602 char *bufp = buf;
603 int i;
604
605 for (i = 0; i < SYSC_MAX_REGS; i++)
606 bufp += sysc_show_reg(ddata, bufp, i);
607
608 bufp += sysc_show_rev(bufp, ddata);
609 bufp += sysc_show_name(bufp, ddata);
610
611 dev_dbg(ddata->dev, "%llx:%x%s\n",
612 ddata->module_pa, ddata->module_size,
613 buf);
614 }
615
616 static int __maybe_unused sysc_runtime_suspend(struct device *dev)
617 {
618 struct ti_sysc_platform_data *pdata;
619 struct sysc *ddata;
620 int error = 0, i;
621
622 ddata = dev_get_drvdata(dev);
623
624 if (!ddata->enabled)
625 return 0;
626
627 if (ddata->legacy_mode) {
628 pdata = dev_get_platdata(ddata->dev);
629 if (!pdata)
630 return 0;
631
632 if (!pdata->idle_module)
633 return -ENODEV;
634
635 error = pdata->idle_module(dev, &ddata->cookie);
636 if (error)
637 dev_err(dev, "%s: could not idle: %i\n",
638 __func__, error);
639
640 goto idled;
641 }
642
643 for (i = 0; i < ddata->nr_clocks; i++) {
644 if (IS_ERR_OR_NULL(ddata->clocks[i]))
645 continue;
646
647 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
648 break;
649
650 clk_disable(ddata->clocks[i]);
651 }
652
653 idled:
654 ddata->enabled = false;
655
656 return error;
657 }
658
659 static int __maybe_unused sysc_runtime_resume(struct device *dev)
660 {
661 struct ti_sysc_platform_data *pdata;
662 struct sysc *ddata;
663 int error = 0, i;
664
665 ddata = dev_get_drvdata(dev);
666
667 if (ddata->enabled)
668 return 0;
669
670 if (ddata->legacy_mode) {
671 pdata = dev_get_platdata(ddata->dev);
672 if (!pdata)
673 return 0;
674
675 if (!pdata->enable_module)
676 return -ENODEV;
677
678 error = pdata->enable_module(dev, &ddata->cookie);
679 if (error)
680 dev_err(dev, "%s: could not enable: %i\n",
681 __func__, error);
682
683 goto awake;
684 }
685
686 for (i = 0; i < ddata->nr_clocks; i++) {
687 if (IS_ERR_OR_NULL(ddata->clocks[i]))
688 continue;
689
690 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
691 break;
692
693 error = clk_enable(ddata->clocks[i]);
694 if (error)
695 return error;
696 }
697
698 awake:
699 ddata->enabled = true;
700
701 return error;
702 }
703
704 static int __maybe_unused sysc_noirq_suspend(struct device *dev)
705 {
706 struct sysc *ddata;
707
708 ddata = dev_get_drvdata(dev);
709
710 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
711 return 0;
712
713 return pm_runtime_force_suspend(dev);
714 }
715
716 static int __maybe_unused sysc_noirq_resume(struct device *dev)
717 {
718 struct sysc *ddata;
719
720 ddata = dev_get_drvdata(dev);
721
722 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
723 return 0;
724
725 return pm_runtime_force_resume(dev);
726 }
727
728 static const struct dev_pm_ops sysc_pm_ops = {
729 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
730 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
731 sysc_runtime_resume,
732 NULL)
733 };
734
735 /* Module revision register based quirks */
736 struct sysc_revision_quirk {
737 const char *name;
738 u32 base;
739 int rev_offset;
740 int sysc_offset;
741 int syss_offset;
742 u32 revision;
743 u32 revision_mask;
744 u32 quirks;
745 };
746
747 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
748 optrev_val, optrevmask, optquirkmask) \
749 { \
750 .name = (optname), \
751 .base = (optbase), \
752 .rev_offset = (optrev), \
753 .sysc_offset = (optsysc), \
754 .syss_offset = (optsyss), \
755 .revision = (optrev_val), \
756 .revision_mask = (optrevmask), \
757 .quirks = (optquirkmask), \
758 }
759
760 static const struct sysc_revision_quirk sysc_revision_quirks[] = {
761 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
762 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffff00ff,
763 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
764 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
765 SYSC_QUIRK_LEGACY_IDLE),
766 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
767 SYSC_QUIRK_LEGACY_IDLE),
768 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
769 SYSC_QUIRK_LEGACY_IDLE),
770 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
771 SYSC_QUIRK_LEGACY_IDLE),
772 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
773 SYSC_QUIRK_LEGACY_IDLE),
774 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
775 SYSC_QUIRK_LEGACY_IDLE),
776 /* Some timers on omap4 and later */
777 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff,
778 SYSC_QUIRK_LEGACY_IDLE),
779 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff,
780 SYSC_QUIRK_LEGACY_IDLE),
781 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
782 SYSC_QUIRK_LEGACY_IDLE),
783 /* Uarts on omap4 and later */
784 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
785 SYSC_QUIRK_LEGACY_IDLE),
786 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
787 SYSC_QUIRK_LEGACY_IDLE),
788
789 #ifdef DEBUG
790 SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0),
791 SYSC_QUIRK("atl", 0, 0, -1, -1, 0x0a070100, 0xffffffff, 0),
792 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
793 SYSC_QUIRK("cm", 0, 0, -1, -1, 0x40000301, 0xffffffff, 0),
794 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
795 SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
796 0xffff00f0, 0),
797 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0),
798 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0),
799 SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
800 SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
801 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
802 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
803 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff, 0),
804 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
805 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
806 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0, 0),
807 SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0),
808 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
809 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44307b02, 0xffffffff, 0),
810 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
811 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffff00ff, 0),
812 SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0),
813 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
814 SYSC_QUIRK("m3", 0, 0, -1, -1, 0x5f580105, 0x0fff0f00, 0),
815 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xfffffff0, 0),
816 SYSC_QUIRK("ocp2scp", 0, 0, -1, -1, 0x50060007, 0xffffffff, 0),
817 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 0),
818 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 0),
819 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x00004102, 0xffffffff, 0),
820 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000400, 0xffffffff, 0),
821 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
822 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4e8b0100, 0xffffffff, 0),
823 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4f000100, 0xffffffff, 0),
824 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x40000900, 0xffffffff, 0),
825 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 0),
826 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffff0ff0, 0),
827 SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0),
828 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
829 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
830 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
831 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
832 SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -1, 0x00000020, 0xffffffff, 0),
833 SYSC_QUIRK("rtc", 0, 0x74, 0x78, -1, 0x4eb01908, 0xffff00f0, 0),
834 SYSC_QUIRK("timer32k", 0, 0, 0x4, -1, 0x00000060, 0xffffffff, 0),
835 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
836 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
837 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
838 0xffffffff, 0),
839 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, 0),
840 SYSC_QUIRK("vfpe", 0, 0, 0x104, -1, 0x4d001200, 0xffffffff, 0),
841 #endif
842 };
843
844 static void sysc_init_revision_quirks(struct sysc *ddata)
845 {
846 const struct sysc_revision_quirk *q;
847 int i;
848
849 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
850 q = &sysc_revision_quirks[i];
851
852 if (q->base && q->base != ddata->module_pa)
853 continue;
854
855 if (q->rev_offset >= 0 &&
856 q->rev_offset != ddata->offsets[SYSC_REVISION])
857 continue;
858
859 if (q->sysc_offset >= 0 &&
860 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
861 continue;
862
863 if (q->syss_offset >= 0 &&
864 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
865 continue;
866
867 if (q->revision == ddata->revision ||
868 (q->revision & q->revision_mask) ==
869 (ddata->revision & q->revision_mask)) {
870 ddata->name = q->name;
871 ddata->cfg.quirks |= q->quirks;
872 }
873 }
874 }
875
876 static int sysc_reset(struct sysc *ddata)
877 {
878 int offset = ddata->offsets[SYSC_SYSCONFIG];
879 int val;
880
881 if (ddata->legacy_mode || offset < 0 ||
882 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
883 return 0;
884
885 /*
886 * Currently only support reset status in sysstatus.
887 * Warn and return error in all other cases
888 */
889 if (!ddata->cfg.syss_mask) {
890 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n");
891 return -EINVAL;
892 }
893
894 val = sysc_read(ddata, offset);
895 val |= (0x1 << ddata->cap->regbits->srst_shift);
896 sysc_write(ddata, offset, val);
897
898 /* Poll on reset status */
899 offset = ddata->offsets[SYSC_SYSSTATUS];
900
901 return readl_poll_timeout(ddata->module_va + offset, val,
902 (val & ddata->cfg.syss_mask) == 0x0,
903 100, MAX_MODULE_SOFTRESET_WAIT);
904 }
905
906 /* At this point the module is configured enough to read the revision */
907 static int sysc_init_module(struct sysc *ddata)
908 {
909 int error;
910
911 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
912 ddata->revision = sysc_read_revision(ddata);
913 goto rev_quirks;
914 }
915
916 error = pm_runtime_get_sync(ddata->dev);
917 if (error < 0) {
918 pm_runtime_put_noidle(ddata->dev);
919
920 return 0;
921 }
922
923 error = sysc_reset(ddata);
924 if (error) {
925 dev_err(ddata->dev, "Reset failed with %d\n", error);
926 pm_runtime_put_sync(ddata->dev);
927
928 return error;
929 }
930
931 ddata->revision = sysc_read_revision(ddata);
932 pm_runtime_put_sync(ddata->dev);
933
934 rev_quirks:
935 sysc_init_revision_quirks(ddata);
936
937 return 0;
938 }
939
940 static int sysc_init_sysc_mask(struct sysc *ddata)
941 {
942 struct device_node *np = ddata->dev->of_node;
943 int error;
944 u32 val;
945
946 error = of_property_read_u32(np, "ti,sysc-mask", &val);
947 if (error)
948 return 0;
949
950 if (val)
951 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
952 else
953 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
954
955 return 0;
956 }
957
958 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
959 const char *name)
960 {
961 struct device_node *np = ddata->dev->of_node;
962 struct property *prop;
963 const __be32 *p;
964 u32 val;
965
966 of_property_for_each_u32(np, name, prop, p, val) {
967 if (val >= SYSC_NR_IDLEMODES) {
968 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
969 return -EINVAL;
970 }
971 *idlemodes |= (1 << val);
972 }
973
974 return 0;
975 }
976
977 static int sysc_init_idlemodes(struct sysc *ddata)
978 {
979 int error;
980
981 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
982 "ti,sysc-midle");
983 if (error)
984 return error;
985
986 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
987 "ti,sysc-sidle");
988 if (error)
989 return error;
990
991 return 0;
992 }
993
994 /*
995 * Only some devices on omap4 and later have SYSCONFIG reset done
996 * bit. We can detect this if there is no SYSSTATUS at all, or the
997 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
998 * have multiple bits for the child devices like OHCI and EHCI.
999 * Depends on SYSC being parsed first.
1000 */
1001 static int sysc_init_syss_mask(struct sysc *ddata)
1002 {
1003 struct device_node *np = ddata->dev->of_node;
1004 int error;
1005 u32 val;
1006
1007 error = of_property_read_u32(np, "ti,syss-mask", &val);
1008 if (error) {
1009 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1010 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1011 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1012 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1013
1014 return 0;
1015 }
1016
1017 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1018 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1019
1020 ddata->cfg.syss_mask = val;
1021
1022 return 0;
1023 }
1024
1025 /*
1026 * Many child device drivers need to have fck and opt clocks available
1027 * to get the clock rate for device internal configuration etc.
1028 */
1029 static int sysc_child_add_named_clock(struct sysc *ddata,
1030 struct device *child,
1031 const char *name)
1032 {
1033 struct clk *clk;
1034 struct clk_lookup *l;
1035 int error = 0;
1036
1037 if (!name)
1038 return 0;
1039
1040 clk = clk_get(child, name);
1041 if (!IS_ERR(clk)) {
1042 clk_put(clk);
1043
1044 return -EEXIST;
1045 }
1046
1047 clk = clk_get(ddata->dev, name);
1048 if (IS_ERR(clk))
1049 return -ENODEV;
1050
1051 l = clkdev_create(clk, name, dev_name(child));
1052 if (!l)
1053 error = -ENOMEM;
1054
1055 clk_put(clk);
1056
1057 return error;
1058 }
1059
1060 static int sysc_child_add_clocks(struct sysc *ddata,
1061 struct device *child)
1062 {
1063 int i, error;
1064
1065 for (i = 0; i < ddata->nr_clocks; i++) {
1066 error = sysc_child_add_named_clock(ddata,
1067 child,
1068 ddata->clock_roles[i]);
1069 if (error && error != -EEXIST) {
1070 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1071 ddata->clock_roles[i], error);
1072
1073 return error;
1074 }
1075 }
1076
1077 return 0;
1078 }
1079
1080 static struct device_type sysc_device_type = {
1081 };
1082
1083 static struct sysc *sysc_child_to_parent(struct device *dev)
1084 {
1085 struct device *parent = dev->parent;
1086
1087 if (!parent || parent->type != &sysc_device_type)
1088 return NULL;
1089
1090 return dev_get_drvdata(parent);
1091 }
1092
1093 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1094 {
1095 struct sysc *ddata;
1096 int error;
1097
1098 ddata = sysc_child_to_parent(dev);
1099
1100 error = pm_generic_runtime_suspend(dev);
1101 if (error)
1102 return error;
1103
1104 if (!ddata->enabled)
1105 return 0;
1106
1107 return sysc_runtime_suspend(ddata->dev);
1108 }
1109
1110 static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1111 {
1112 struct sysc *ddata;
1113 int error;
1114
1115 ddata = sysc_child_to_parent(dev);
1116
1117 if (!ddata->enabled) {
1118 error = sysc_runtime_resume(ddata->dev);
1119 if (error < 0)
1120 dev_err(ddata->dev,
1121 "%s error: %i\n", __func__, error);
1122 }
1123
1124 return pm_generic_runtime_resume(dev);
1125 }
1126
1127 #ifdef CONFIG_PM_SLEEP
1128 static int sysc_child_suspend_noirq(struct device *dev)
1129 {
1130 struct sysc *ddata;
1131 int error;
1132
1133 ddata = sysc_child_to_parent(dev);
1134
1135 dev_dbg(ddata->dev, "%s %s\n", __func__,
1136 ddata->name ? ddata->name : "");
1137
1138 error = pm_generic_suspend_noirq(dev);
1139 if (error) {
1140 dev_err(dev, "%s error at %i: %i\n",
1141 __func__, __LINE__, error);
1142
1143 return error;
1144 }
1145
1146 if (!pm_runtime_status_suspended(dev)) {
1147 error = pm_generic_runtime_suspend(dev);
1148 if (error) {
1149 dev_dbg(dev, "%s busy at %i: %i\n",
1150 __func__, __LINE__, error);
1151
1152 return 0;
1153 }
1154
1155 error = sysc_runtime_suspend(ddata->dev);
1156 if (error) {
1157 dev_err(dev, "%s error at %i: %i\n",
1158 __func__, __LINE__, error);
1159
1160 return error;
1161 }
1162
1163 ddata->child_needs_resume = true;
1164 }
1165
1166 return 0;
1167 }
1168
1169 static int sysc_child_resume_noirq(struct device *dev)
1170 {
1171 struct sysc *ddata;
1172 int error;
1173
1174 ddata = sysc_child_to_parent(dev);
1175
1176 dev_dbg(ddata->dev, "%s %s\n", __func__,
1177 ddata->name ? ddata->name : "");
1178
1179 if (ddata->child_needs_resume) {
1180 ddata->child_needs_resume = false;
1181
1182 error = sysc_runtime_resume(ddata->dev);
1183 if (error)
1184 dev_err(ddata->dev,
1185 "%s runtime resume error: %i\n",
1186 __func__, error);
1187
1188 error = pm_generic_runtime_resume(dev);
1189 if (error)
1190 dev_err(ddata->dev,
1191 "%s generic runtime resume: %i\n",
1192 __func__, error);
1193 }
1194
1195 return pm_generic_resume_noirq(dev);
1196 }
1197 #endif
1198
1199 struct dev_pm_domain sysc_child_pm_domain = {
1200 .ops = {
1201 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1202 sysc_child_runtime_resume,
1203 NULL)
1204 USE_PLATFORM_PM_SLEEP_OPS
1205 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1206 sysc_child_resume_noirq)
1207 }
1208 };
1209
1210 /**
1211 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1212 * @ddata: device driver data
1213 * @child: child device driver
1214 *
1215 * Allow idle for child devices as done with _od_runtime_suspend().
1216 * Otherwise many child devices will not idle because of the permanent
1217 * parent usecount set in pm_runtime_irq_safe().
1218 *
1219 * Note that the long term solution is to just modify the child device
1220 * drivers to not set pm_runtime_irq_safe() and then this can be just
1221 * dropped.
1222 */
1223 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1224 {
1225 if (!ddata->legacy_mode)
1226 return;
1227
1228 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1229 dev_pm_domain_set(child, &sysc_child_pm_domain);
1230 }
1231
1232 static int sysc_notifier_call(struct notifier_block *nb,
1233 unsigned long event, void *device)
1234 {
1235 struct device *dev = device;
1236 struct sysc *ddata;
1237 int error;
1238
1239 ddata = sysc_child_to_parent(dev);
1240 if (!ddata)
1241 return NOTIFY_DONE;
1242
1243 switch (event) {
1244 case BUS_NOTIFY_ADD_DEVICE:
1245 error = sysc_child_add_clocks(ddata, dev);
1246 if (error)
1247 return error;
1248 sysc_legacy_idle_quirk(ddata, dev);
1249 break;
1250 default:
1251 break;
1252 }
1253
1254 return NOTIFY_DONE;
1255 }
1256
1257 static struct notifier_block sysc_nb = {
1258 .notifier_call = sysc_notifier_call,
1259 };
1260
1261 /* Device tree configured quirks */
1262 struct sysc_dts_quirk {
1263 const char *name;
1264 u32 mask;
1265 };
1266
1267 static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1268 { .name = "ti,no-idle-on-init",
1269 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1270 { .name = "ti,no-reset-on-init",
1271 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1272 };
1273
1274 static int sysc_init_dts_quirks(struct sysc *ddata)
1275 {
1276 struct device_node *np = ddata->dev->of_node;
1277 const struct property *prop;
1278 int i, len, error;
1279 u32 val;
1280
1281 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1282
1283 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1284 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1285 if (!prop)
1286 continue;
1287
1288 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1289 }
1290
1291 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1292 if (!error) {
1293 if (val > 255) {
1294 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1295 val);
1296 }
1297
1298 ddata->cfg.srst_udelay = (u8)val;
1299 }
1300
1301 return 0;
1302 }
1303
1304 static void sysc_unprepare(struct sysc *ddata)
1305 {
1306 int i;
1307
1308 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1309 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1310 clk_unprepare(ddata->clocks[i]);
1311 }
1312 }
1313
1314 /*
1315 * Common sysc register bits found on omap2, also known as type1
1316 */
1317 static const struct sysc_regbits sysc_regbits_omap2 = {
1318 .dmadisable_shift = -ENODEV,
1319 .midle_shift = 12,
1320 .sidle_shift = 3,
1321 .clkact_shift = 8,
1322 .emufree_shift = 5,
1323 .enwkup_shift = 2,
1324 .srst_shift = 1,
1325 .autoidle_shift = 0,
1326 };
1327
1328 static const struct sysc_capabilities sysc_omap2 = {
1329 .type = TI_SYSC_OMAP2,
1330 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1331 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1332 SYSC_OMAP2_AUTOIDLE,
1333 .regbits = &sysc_regbits_omap2,
1334 };
1335
1336 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1337 static const struct sysc_capabilities sysc_omap2_timer = {
1338 .type = TI_SYSC_OMAP2_TIMER,
1339 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1340 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1341 SYSC_OMAP2_AUTOIDLE,
1342 .regbits = &sysc_regbits_omap2,
1343 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1344 };
1345
1346 /*
1347 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1348 * with different sidle position
1349 */
1350 static const struct sysc_regbits sysc_regbits_omap3_sham = {
1351 .dmadisable_shift = -ENODEV,
1352 .midle_shift = -ENODEV,
1353 .sidle_shift = 4,
1354 .clkact_shift = -ENODEV,
1355 .enwkup_shift = -ENODEV,
1356 .srst_shift = 1,
1357 .autoidle_shift = 0,
1358 .emufree_shift = -ENODEV,
1359 };
1360
1361 static const struct sysc_capabilities sysc_omap3_sham = {
1362 .type = TI_SYSC_OMAP3_SHAM,
1363 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1364 .regbits = &sysc_regbits_omap3_sham,
1365 };
1366
1367 /*
1368 * AES register bits found on omap3 and later, a variant of
1369 * sysc_regbits_omap2 with different sidle position
1370 */
1371 static const struct sysc_regbits sysc_regbits_omap3_aes = {
1372 .dmadisable_shift = -ENODEV,
1373 .midle_shift = -ENODEV,
1374 .sidle_shift = 6,
1375 .clkact_shift = -ENODEV,
1376 .enwkup_shift = -ENODEV,
1377 .srst_shift = 1,
1378 .autoidle_shift = 0,
1379 .emufree_shift = -ENODEV,
1380 };
1381
1382 static const struct sysc_capabilities sysc_omap3_aes = {
1383 .type = TI_SYSC_OMAP3_AES,
1384 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1385 .regbits = &sysc_regbits_omap3_aes,
1386 };
1387
1388 /*
1389 * Common sysc register bits found on omap4, also known as type2
1390 */
1391 static const struct sysc_regbits sysc_regbits_omap4 = {
1392 .dmadisable_shift = 16,
1393 .midle_shift = 4,
1394 .sidle_shift = 2,
1395 .clkact_shift = -ENODEV,
1396 .enwkup_shift = -ENODEV,
1397 .emufree_shift = 1,
1398 .srst_shift = 0,
1399 .autoidle_shift = -ENODEV,
1400 };
1401
1402 static const struct sysc_capabilities sysc_omap4 = {
1403 .type = TI_SYSC_OMAP4,
1404 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1405 SYSC_OMAP4_SOFTRESET,
1406 .regbits = &sysc_regbits_omap4,
1407 };
1408
1409 static const struct sysc_capabilities sysc_omap4_timer = {
1410 .type = TI_SYSC_OMAP4_TIMER,
1411 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1412 SYSC_OMAP4_SOFTRESET,
1413 .regbits = &sysc_regbits_omap4,
1414 };
1415
1416 /*
1417 * Common sysc register bits found on omap4, also known as type3
1418 */
1419 static const struct sysc_regbits sysc_regbits_omap4_simple = {
1420 .dmadisable_shift = -ENODEV,
1421 .midle_shift = 2,
1422 .sidle_shift = 0,
1423 .clkact_shift = -ENODEV,
1424 .enwkup_shift = -ENODEV,
1425 .srst_shift = -ENODEV,
1426 .emufree_shift = -ENODEV,
1427 .autoidle_shift = -ENODEV,
1428 };
1429
1430 static const struct sysc_capabilities sysc_omap4_simple = {
1431 .type = TI_SYSC_OMAP4_SIMPLE,
1432 .regbits = &sysc_regbits_omap4_simple,
1433 };
1434
1435 /*
1436 * SmartReflex sysc found on omap34xx
1437 */
1438 static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1439 .dmadisable_shift = -ENODEV,
1440 .midle_shift = -ENODEV,
1441 .sidle_shift = -ENODEV,
1442 .clkact_shift = 20,
1443 .enwkup_shift = -ENODEV,
1444 .srst_shift = -ENODEV,
1445 .emufree_shift = -ENODEV,
1446 .autoidle_shift = -ENODEV,
1447 };
1448
1449 static const struct sysc_capabilities sysc_34xx_sr = {
1450 .type = TI_SYSC_OMAP34XX_SR,
1451 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1452 .regbits = &sysc_regbits_omap34xx_sr,
1453 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1454 SYSC_QUIRK_LEGACY_IDLE,
1455 };
1456
1457 /*
1458 * SmartReflex sysc found on omap36xx and later
1459 */
1460 static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1461 .dmadisable_shift = -ENODEV,
1462 .midle_shift = -ENODEV,
1463 .sidle_shift = 24,
1464 .clkact_shift = -ENODEV,
1465 .enwkup_shift = 26,
1466 .srst_shift = -ENODEV,
1467 .emufree_shift = -ENODEV,
1468 .autoidle_shift = -ENODEV,
1469 };
1470
1471 static const struct sysc_capabilities sysc_36xx_sr = {
1472 .type = TI_SYSC_OMAP36XX_SR,
1473 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
1474 .regbits = &sysc_regbits_omap36xx_sr,
1475 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
1476 };
1477
1478 static const struct sysc_capabilities sysc_omap4_sr = {
1479 .type = TI_SYSC_OMAP4_SR,
1480 .regbits = &sysc_regbits_omap36xx_sr,
1481 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
1482 };
1483
1484 /*
1485 * McASP register bits found on omap4 and later
1486 */
1487 static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1488 .dmadisable_shift = -ENODEV,
1489 .midle_shift = -ENODEV,
1490 .sidle_shift = 0,
1491 .clkact_shift = -ENODEV,
1492 .enwkup_shift = -ENODEV,
1493 .srst_shift = -ENODEV,
1494 .emufree_shift = -ENODEV,
1495 .autoidle_shift = -ENODEV,
1496 };
1497
1498 static const struct sysc_capabilities sysc_omap4_mcasp = {
1499 .type = TI_SYSC_OMAP4_MCASP,
1500 .regbits = &sysc_regbits_omap4_mcasp,
1501 };
1502
1503 /*
1504 * FS USB host found on omap4 and later
1505 */
1506 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1507 .dmadisable_shift = -ENODEV,
1508 .midle_shift = -ENODEV,
1509 .sidle_shift = 24,
1510 .clkact_shift = -ENODEV,
1511 .enwkup_shift = 26,
1512 .srst_shift = -ENODEV,
1513 .emufree_shift = -ENODEV,
1514 .autoidle_shift = -ENODEV,
1515 };
1516
1517 static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1518 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1519 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1520 .regbits = &sysc_regbits_omap4_usb_host_fs,
1521 };
1522
1523 static const struct sysc_regbits sysc_regbits_dra7_mcan = {
1524 .dmadisable_shift = -ENODEV,
1525 .midle_shift = -ENODEV,
1526 .sidle_shift = -ENODEV,
1527 .clkact_shift = -ENODEV,
1528 .enwkup_shift = 4,
1529 .srst_shift = 0,
1530 .emufree_shift = -ENODEV,
1531 .autoidle_shift = -ENODEV,
1532 };
1533
1534 static const struct sysc_capabilities sysc_dra7_mcan = {
1535 .type = TI_SYSC_DRA7_MCAN,
1536 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET,
1537 .regbits = &sysc_regbits_dra7_mcan,
1538 };
1539
1540 static int sysc_init_pdata(struct sysc *ddata)
1541 {
1542 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1543 struct ti_sysc_module_data mdata;
1544 int error = 0;
1545
1546 if (!pdata || !ddata->legacy_mode)
1547 return 0;
1548
1549 mdata.name = ddata->legacy_mode;
1550 mdata.module_pa = ddata->module_pa;
1551 mdata.module_size = ddata->module_size;
1552 mdata.offsets = ddata->offsets;
1553 mdata.nr_offsets = SYSC_MAX_REGS;
1554 mdata.cap = ddata->cap;
1555 mdata.cfg = &ddata->cfg;
1556
1557 if (!pdata->init_module)
1558 return -ENODEV;
1559
1560 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1561 if (error == -EEXIST)
1562 error = 0;
1563
1564 return error;
1565 }
1566
1567 static int sysc_init_match(struct sysc *ddata)
1568 {
1569 const struct sysc_capabilities *cap;
1570
1571 cap = of_device_get_match_data(ddata->dev);
1572 if (!cap)
1573 return -EINVAL;
1574
1575 ddata->cap = cap;
1576 if (ddata->cap)
1577 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1578
1579 return 0;
1580 }
1581
1582 static void ti_sysc_idle(struct work_struct *work)
1583 {
1584 struct sysc *ddata;
1585
1586 ddata = container_of(work, struct sysc, idle_work.work);
1587
1588 if (pm_runtime_active(ddata->dev))
1589 pm_runtime_put_sync(ddata->dev);
1590 }
1591
1592 static const struct of_device_id sysc_match_table[] = {
1593 { .compatible = "simple-bus", },
1594 { /* sentinel */ },
1595 };
1596
1597 static int sysc_probe(struct platform_device *pdev)
1598 {
1599 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
1600 struct sysc *ddata;
1601 int error;
1602
1603 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1604 if (!ddata)
1605 return -ENOMEM;
1606
1607 ddata->dev = &pdev->dev;
1608 platform_set_drvdata(pdev, ddata);
1609
1610 error = sysc_init_match(ddata);
1611 if (error)
1612 return error;
1613
1614 error = sysc_init_dts_quirks(ddata);
1615 if (error)
1616 goto unprepare;
1617
1618 error = sysc_get_clocks(ddata);
1619 if (error)
1620 return error;
1621
1622 error = sysc_map_and_check_registers(ddata);
1623 if (error)
1624 goto unprepare;
1625
1626 error = sysc_init_sysc_mask(ddata);
1627 if (error)
1628 goto unprepare;
1629
1630 error = sysc_init_idlemodes(ddata);
1631 if (error)
1632 goto unprepare;
1633
1634 error = sysc_init_syss_mask(ddata);
1635 if (error)
1636 goto unprepare;
1637
1638 error = sysc_init_pdata(ddata);
1639 if (error)
1640 goto unprepare;
1641
1642 error = sysc_init_resets(ddata);
1643 if (error)
1644 return error;
1645
1646 pm_runtime_enable(ddata->dev);
1647 error = sysc_init_module(ddata);
1648 if (error)
1649 goto unprepare;
1650
1651 error = pm_runtime_get_sync(ddata->dev);
1652 if (error < 0) {
1653 pm_runtime_put_noidle(ddata->dev);
1654 pm_runtime_disable(ddata->dev);
1655 goto unprepare;
1656 }
1657
1658 sysc_show_registers(ddata);
1659
1660 ddata->dev->type = &sysc_device_type;
1661 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1662 pdata ? pdata->auxdata : NULL,
1663 ddata->dev);
1664 if (error)
1665 goto err;
1666
1667 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1668
1669 /* At least earlycon won't survive without deferred idle */
1670 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1671 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1672 schedule_delayed_work(&ddata->idle_work, 3000);
1673 } else {
1674 pm_runtime_put(&pdev->dev);
1675 }
1676
1677 if (!of_get_available_child_count(ddata->dev->of_node))
1678 reset_control_assert(ddata->rsts);
1679
1680 return 0;
1681
1682 err:
1683 pm_runtime_put_sync(&pdev->dev);
1684 pm_runtime_disable(&pdev->dev);
1685 unprepare:
1686 sysc_unprepare(ddata);
1687
1688 return error;
1689 }
1690
1691 static int sysc_remove(struct platform_device *pdev)
1692 {
1693 struct sysc *ddata = platform_get_drvdata(pdev);
1694 int error;
1695
1696 cancel_delayed_work_sync(&ddata->idle_work);
1697
1698 error = pm_runtime_get_sync(ddata->dev);
1699 if (error < 0) {
1700 pm_runtime_put_noidle(ddata->dev);
1701 pm_runtime_disable(ddata->dev);
1702 goto unprepare;
1703 }
1704
1705 of_platform_depopulate(&pdev->dev);
1706
1707 pm_runtime_put_sync(&pdev->dev);
1708 pm_runtime_disable(&pdev->dev);
1709 reset_control_assert(ddata->rsts);
1710
1711 unprepare:
1712 sysc_unprepare(ddata);
1713
1714 return 0;
1715 }
1716
1717 static const struct of_device_id sysc_match[] = {
1718 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1719 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1720 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1721 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1722 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1723 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1724 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1725 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1726 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1727 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1728 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1729 { .compatible = "ti,sysc-usb-host-fs",
1730 .data = &sysc_omap4_usb_host_fs, },
1731 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
1732 { },
1733 };
1734 MODULE_DEVICE_TABLE(of, sysc_match);
1735
1736 static struct platform_driver sysc_driver = {
1737 .probe = sysc_probe,
1738 .remove = sysc_remove,
1739 .driver = {
1740 .name = "ti-sysc",
1741 .of_match_table = sysc_match,
1742 .pm = &sysc_pm_ops,
1743 },
1744 };
1745
1746 static int __init sysc_init(void)
1747 {
1748 bus_register_notifier(&platform_bus_type, &sysc_nb);
1749
1750 return platform_driver_register(&sysc_driver);
1751 }
1752 module_init(sysc_init);
1753
1754 static void __exit sysc_exit(void)
1755 {
1756 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1757 platform_driver_unregister(&sysc_driver);
1758 }
1759 module_exit(sysc_exit);
1760
1761 MODULE_DESCRIPTION("TI sysc interconnect target driver");
1762 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support