ARM: mmp: fix potential NULL dereference
[linux/fpc-iii.git] / arch / score / include / asm / irqflags.h
blob37c6ac9dd6e846cd7cf2adf988296884ecadaf4a
1 #ifndef _ASM_SCORE_IRQFLAGS_H
2 #define _ASM_SCORE_IRQFLAGS_H
4 #ifndef __ASSEMBLY__
6 #include <linux/types.h>
8 static inline unsigned long arch_local_save_flags(void)
10 unsigned long flags;
12 asm volatile(
13 " mfcr r8, cr0 \n"
14 " nop \n"
15 " nop \n"
16 " mv %0, r8 \n"
17 " nop \n"
18 " nop \n"
19 " nop \n"
20 " nop \n"
21 " nop \n"
22 " ldi r9, 0x1 \n"
23 " and %0, %0, r9 \n"
24 : "=r" (flags)
26 : "r8", "r9");
27 return flags;
30 static inline unsigned long arch_local_irq_save(void)
32 unsigned long flags;
34 asm volatile(
35 " mfcr r8, cr0 \n"
36 " li r9, 0xfffffffe \n"
37 " nop \n"
38 " mv %0, r8 \n"
39 " and r8, r8, r9 \n"
40 " mtcr r8, cr0 \n"
41 " nop \n"
42 " nop \n"
43 " nop \n"
44 " nop \n"
45 " nop \n"
46 : "=r" (flags)
48 : "r8", "r9", "memory");
50 return flags;
53 static inline void arch_local_irq_restore(unsigned long flags)
55 asm volatile(
56 " mfcr r8, cr0 \n"
57 " ldi r9, 0x1 \n"
58 " and %0, %0, r9 \n"
59 " or r8, r8, %0 \n"
60 " mtcr r8, cr0 \n"
61 " nop \n"
62 " nop \n"
63 " nop \n"
64 " nop \n"
65 " nop \n"
67 : "r"(flags)
68 : "r8", "r9", "memory");
71 static inline void arch_local_irq_enable(void)
73 asm volatile(
74 " mfcr r8,cr0 \n"
75 " nop \n"
76 " nop \n"
77 " ori r8,0x1 \n"
78 " mtcr r8,cr0 \n"
79 " nop \n"
80 " nop \n"
81 " nop \n"
82 " nop \n"
83 " nop \n"
86 : "r8", "memory");
89 static inline void arch_local_irq_disable(void)
91 asm volatile(
92 " mfcr r8,cr0 \n"
93 " nop \n"
94 " nop \n"
95 " srli r8,r8,1 \n"
96 " slli r8,r8,1 \n"
97 " mtcr r8,cr0 \n"
98 " nop \n"
99 " nop \n"
100 " nop \n"
101 " nop \n"
102 " nop \n"
105 : "r8", "memory");
108 static inline bool arch_irqs_disabled_flags(unsigned long flags)
110 return !(flags & 1);
113 static inline bool arch_irqs_disabled(void)
115 return arch_irqs_disabled_flags(arch_local_save_flags());
118 #endif /* __ASSEMBLY__ */
120 #endif /* _ASM_SCORE_IRQFLAGS_H */