ARM: mmp: fix potential NULL dereference
[linux/fpc-iii.git] / arch / x86 / kernel / apic / apic_numachip.c
blobbc552cff257834bee7a8c1078112ea46380892d4
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Numascale NumaConnect-Specific APIC Code
8 * Copyright (C) 2011 Numascale AS. All rights reserved.
10 * Send feedback to <support@numascale.com>
14 #include <linux/errno.h>
15 #include <linux/threads.h>
16 #include <linux/cpumask.h>
17 #include <linux/string.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/ctype.h>
21 #include <linux/init.h>
22 #include <linux/hardirq.h>
23 #include <linux/delay.h>
25 #include <asm/numachip/numachip_csr.h>
26 #include <asm/smp.h>
27 #include <asm/apic.h>
28 #include <asm/ipi.h>
29 #include <asm/apic_flat_64.h>
31 static int numachip_system __read_mostly;
33 static struct apic apic_numachip __read_mostly;
35 static unsigned int get_apic_id(unsigned long x)
37 unsigned long value;
38 unsigned int id;
40 rdmsrl(MSR_FAM10H_NODE_ID, value);
41 id = ((x >> 24) & 0xffU) | ((value << 2) & 0x3f00U);
43 return id;
46 static unsigned long set_apic_id(unsigned int id)
48 unsigned long x;
50 x = ((id & 0xffU) << 24);
51 return x;
54 static unsigned int read_xapic_id(void)
56 return get_apic_id(apic_read(APIC_ID));
59 static int numachip_apic_id_valid(int apicid)
61 /* Trust what bootloader passes in MADT */
62 return 1;
65 static int numachip_apic_id_registered(void)
67 return physid_isset(read_xapic_id(), phys_cpu_present_map);
70 static int numachip_phys_pkg_id(int initial_apic_id, int index_msb)
72 return initial_apic_id >> index_msb;
75 static int __cpuinit numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
77 union numachip_csr_g3_ext_irq_gen int_gen;
79 int_gen.s._destination_apic_id = phys_apicid;
80 int_gen.s._vector = 0;
81 int_gen.s._msgtype = APIC_DM_INIT >> 8;
82 int_gen.s._index = 0;
84 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
86 int_gen.s._msgtype = APIC_DM_STARTUP >> 8;
87 int_gen.s._vector = start_rip >> 12;
89 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
91 atomic_set(&init_deasserted, 1);
92 return 0;
95 static void numachip_send_IPI_one(int cpu, int vector)
97 union numachip_csr_g3_ext_irq_gen int_gen;
98 int apicid = per_cpu(x86_cpu_to_apicid, cpu);
100 int_gen.s._destination_apic_id = apicid;
101 int_gen.s._vector = vector;
102 int_gen.s._msgtype = (vector == NMI_VECTOR ? APIC_DM_NMI : APIC_DM_FIXED) >> 8;
103 int_gen.s._index = 0;
105 write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
108 static void numachip_send_IPI_mask(const struct cpumask *mask, int vector)
110 unsigned int cpu;
112 for_each_cpu(cpu, mask)
113 numachip_send_IPI_one(cpu, vector);
116 static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask,
117 int vector)
119 unsigned int this_cpu = smp_processor_id();
120 unsigned int cpu;
122 for_each_cpu(cpu, mask) {
123 if (cpu != this_cpu)
124 numachip_send_IPI_one(cpu, vector);
128 static void numachip_send_IPI_allbutself(int vector)
130 unsigned int this_cpu = smp_processor_id();
131 unsigned int cpu;
133 for_each_online_cpu(cpu) {
134 if (cpu != this_cpu)
135 numachip_send_IPI_one(cpu, vector);
139 static void numachip_send_IPI_all(int vector)
141 numachip_send_IPI_mask(cpu_online_mask, vector);
144 static void numachip_send_IPI_self(int vector)
146 __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
149 static int __init numachip_probe(void)
151 return apic == &apic_numachip;
154 static void __init map_csrs(void)
156 printk(KERN_INFO "NumaChip: Mapping local CSR space (%016llx - %016llx)\n",
157 NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_BASE + NUMACHIP_LCSR_SIZE - 1);
158 init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE);
160 printk(KERN_INFO "NumaChip: Mapping global CSR space (%016llx - %016llx)\n",
161 NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_BASE + NUMACHIP_GCSR_SIZE - 1);
162 init_extra_mapping_uc(NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_SIZE);
165 static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
168 if (c->phys_proc_id != node) {
169 c->phys_proc_id = node;
170 per_cpu(cpu_llc_id, smp_processor_id()) = node;
174 static int __init numachip_system_init(void)
176 unsigned int val;
178 if (!numachip_system)
179 return 0;
181 x86_cpuinit.fixup_cpu_id = fixup_cpu_id;
183 map_csrs();
185 val = read_lcsr(CSR_G0_NODE_IDS);
186 printk(KERN_INFO "NumaChip: Local NodeID = %08x\n", val);
188 return 0;
190 early_initcall(numachip_system_init);
192 static int numachip_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
194 if (!strncmp(oem_id, "NUMASC", 6)) {
195 numachip_system = 1;
196 return 1;
199 return 0;
202 static struct apic apic_numachip __refconst = {
204 .name = "NumaConnect system",
205 .probe = numachip_probe,
206 .acpi_madt_oem_check = numachip_acpi_madt_oem_check,
207 .apic_id_valid = numachip_apic_id_valid,
208 .apic_id_registered = numachip_apic_id_registered,
210 .irq_delivery_mode = dest_Fixed,
211 .irq_dest_mode = 0, /* physical */
213 .target_cpus = online_target_cpus,
214 .disable_esr = 0,
215 .dest_logical = 0,
216 .check_apicid_used = NULL,
217 .check_apicid_present = NULL,
219 .vector_allocation_domain = default_vector_allocation_domain,
220 .init_apic_ldr = flat_init_apic_ldr,
222 .ioapic_phys_id_map = NULL,
223 .setup_apic_routing = NULL,
224 .multi_timer_check = NULL,
225 .cpu_present_to_apicid = default_cpu_present_to_apicid,
226 .apicid_to_cpu_present = NULL,
227 .setup_portio_remap = NULL,
228 .check_phys_apicid_present = default_check_phys_apicid_present,
229 .enable_apic_mode = NULL,
230 .phys_pkg_id = numachip_phys_pkg_id,
231 .mps_oem_check = NULL,
233 .get_apic_id = get_apic_id,
234 .set_apic_id = set_apic_id,
235 .apic_id_mask = 0xffU << 24,
237 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
239 .send_IPI_mask = numachip_send_IPI_mask,
240 .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself,
241 .send_IPI_allbutself = numachip_send_IPI_allbutself,
242 .send_IPI_all = numachip_send_IPI_all,
243 .send_IPI_self = numachip_send_IPI_self,
245 .wakeup_secondary_cpu = numachip_wakeup_secondary,
246 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
247 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
248 .wait_for_init_deassert = NULL,
249 .smp_callin_clear_local_apic = NULL,
250 .inquire_remote_apic = NULL, /* REMRD not supported */
252 .read = native_apic_mem_read,
253 .write = native_apic_mem_write,
254 .eoi_write = native_apic_mem_write,
255 .icr_read = native_apic_icr_read,
256 .icr_write = native_apic_icr_write,
257 .wait_icr_idle = native_apic_wait_icr_idle,
258 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
260 apic_driver(apic_numachip);