| blob | d42ab17b739729c4b27d3f3fe02fdea2633f2f5a |
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
24 #include <asm/nops.h>
26 /* Physical address */
27 #define pa(X) ((X) - __PAGE_OFFSET)
29 /*
30 * References to members of the new_cpu_data structure.
31 */
33 #define X86 new_cpu_data+CPUINFO_x86
34 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
35 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
36 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
37 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
38 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
39 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
40 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
42 /*
43 * This is how much memory in addition to the memory covered up to
44 * and including _end we need mapped initially.
45 * We need:
46 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
47 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
48 *
49 * Modulo rounding, each megabyte assigned here requires a kilobyte of
50 * memory, which is currently unreclaimed.
51 *
52 * This should be a multiple of a page.
53 *
54 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
55 * and small than max_low_pfn, otherwise will waste some page table entries
56 */
58 #if PTRS_PER_PMD > 1
59 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
60 #else
61 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
62 #endif
64 /* Number of possible pages in the lowmem region */
65 LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
67 /* Enough space to fit pagetables for the low memory linear map */
68 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
70 /*
71 * Worst-case size of the kernel mapping we need to make:
72 * a relocatable kernel can live anywhere in lowmem, so we need to be able
73 * to map all of lowmem.
74 */
75 KERNEL_PAGES = LOWMEM_PAGES
77 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
78 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
80 /*
81 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
82 * %esi points to the real-mode code as a 32-bit pointer.
83 * CS and DS must be 4 GB flat segments, but we don't depend on
84 * any particular GDT layout, because we load our own as soon as we
85 * can.
86 */
87 __HEAD
88 ENTRY(startup_32)
89 movl pa(stack_start),%ecx
91 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
92 us to not reload segments */
93 testb $(1<<6), BP_loadflags(%esi)
94 jnz 2f
96 /*
97 * Set segments to known values.
98 */
99 lgdt pa(boot_gdt_descr)
100 movl $(__BOOT_DS),%eax
101 movl %eax,%ds
102 movl %eax,%es
103 movl %eax,%fs
104 movl %eax,%gs
105 movl %eax,%ss
106 2:
107 leal -__PAGE_OFFSET(%ecx),%esp
109 /*
110 * Clear BSS first so that there are no surprises...
111 */
112 cld
113 xorl %eax,%eax
114 movl $pa(__bss_start),%edi
115 movl $pa(__bss_stop),%ecx
116 subl %edi,%ecx
117 shrl $2,%ecx
118 rep ; stosl
119 /*
120 * Copy bootup parameters out of the way.
121 * Note: %esi still has the pointer to the real-mode data.
122 * With the kexec as boot loader, parameter segment might be loaded beyond
123 * kernel image and might not even be addressable by early boot page tables.
124 * (kexec on panic case). Hence copy out the parameters before initializing
125 * page tables.
126 */
127 movl $pa(boot_params),%edi
128 movl $(PARAM_SIZE/4),%ecx
129 cld
130 rep
131 movsl
132 movl pa(boot_params) + NEW_CL_POINTER,%esi
133 andl %esi,%esi
134 jz 1f # No command line
135 movl $pa(boot_command_line),%edi
136 movl $(COMMAND_LINE_SIZE/4),%ecx
137 rep
138 movsl
139 1:
141 #ifdef CONFIG_OLPC
142 /* save OFW's pgdir table for later use when calling into OFW */
143 movl %cr3, %eax
144 movl %eax, pa(olpc_ofw_pgd)
145 #endif
147 /*
148 * Initialize page tables. This creates a PDE and a set of page
149 * tables, which are located immediately beyond __brk_base. The variable
150 * _brk_end is set up to point to the first "safe" location.
151 * Mappings are created both at virtual address 0 (identity mapping)
152 * and PAGE_OFFSET for up to _end.
153 */
154 #ifdef CONFIG_X86_PAE
156 /*
157 * In PAE mode initial_page_table is statically defined to contain
158 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
159 * entries). The identity mapping is handled by pointing two PGD entries
160 * to the first kernel PMD.
161 *
162 * Note the upper half of each PMD or PTE are always zero at this stage.
163 */
165 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
167 xorl %ebx,%ebx /* %ebx is kept at zero */
169 movl $pa(__brk_base), %edi
170 movl $pa(initial_pg_pmd), %edx
171 movl $PTE_IDENT_ATTR, %eax
172 10:
173 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
174 movl %ecx,(%edx) /* Store PMD entry */
175 /* Upper half already zero */
176 addl $8,%edx
177 movl $512,%ecx
178 11:
179 stosl
180 xchgl %eax,%ebx
181 stosl
182 xchgl %eax,%ebx
183 addl $0x1000,%eax
184 loop 11b
186 /*
187 * End condition: we must map up to the end + MAPPING_BEYOND_END.
188 */
189 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
190 cmpl %ebp,%eax
191 jb 10b
192 1:
193 addl $__PAGE_OFFSET, %edi
194 movl %edi, pa(_brk_end)
195 shrl $12, %eax
196 movl %eax, pa(max_pfn_mapped)
198 /* Do early initialization of the fixmap area */
199 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
200 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
201 #else /* Not PAE */
203 page_pde_offset = (__PAGE_OFFSET >> 20);
205 movl $pa(__brk_base), %edi
206 movl $pa(initial_page_table), %edx
207 movl $PTE_IDENT_ATTR, %eax
208 10:
209 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
210 movl %ecx,(%edx) /* Store identity PDE entry */
211 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
212 addl $4,%edx
213 movl $1024, %ecx
214 11:
215 stosl
216 addl $0x1000,%eax
217 loop 11b
218 /*
219 * End condition: we must map up to the end + MAPPING_BEYOND_END.
220 */
221 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
222 cmpl %ebp,%eax
223 jb 10b
224 addl $__PAGE_OFFSET, %edi
225 movl %edi, pa(_brk_end)
226 shrl $12, %eax
227 movl %eax, pa(max_pfn_mapped)
229 /* Do early initialization of the fixmap area */
230 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
231 movl %eax,pa(initial_page_table+0xffc)
232 #endif
234 #ifdef CONFIG_PARAVIRT
235 /* This is can only trip for a broken bootloader... */
236 cmpw $0x207, pa(boot_params + BP_version)
237 jb default_entry
239 /* Paravirt-compatible boot parameters. Look to see what architecture
240 we're booting under. */
241 movl pa(boot_params + BP_hardware_subarch), %eax
242 cmpl $num_subarch_entries, %eax
243 jae bad_subarch
245 movl pa(subarch_entries)(,%eax,4), %eax
246 subl $__PAGE_OFFSET, %eax
247 jmp *%eax
249 bad_subarch:
250 WEAK(lguest_entry)
251 WEAK(xen_entry)
252 /* Unknown implementation; there's really
253 nothing we can do at this point. */
254 ud2a
256 __INITDATA
258 subarch_entries:
259 .long default_entry /* normal x86/PC */
260 .long lguest_entry /* lguest hypervisor */
261 .long xen_entry /* Xen hypervisor */
262 .long default_entry /* Moorestown MID */
263 num_subarch_entries = (. - subarch_entries) / 4
264 .previous
265 #else
266 jmp default_entry
267 #endif /* CONFIG_PARAVIRT */
269 /*
270 * Non-boot CPU entry point; entered from trampoline.S
271 * We can't lgdt here, because lgdt itself uses a data segment, but
272 * we know the trampoline has already loaded the boot_gdt for us.
273 *
274 * If cpu hotplug is not supported then this code can go in init section
275 * which will be freed later
276 */
277 __CPUINIT
278 ENTRY(startup_32_smp)
279 cld
280 movl $(__BOOT_DS),%eax
281 movl %eax,%ds
282 movl %eax,%es
283 movl %eax,%fs
284 movl %eax,%gs
285 movl pa(stack_start),%ecx
286 movl %eax,%ss
287 leal -__PAGE_OFFSET(%ecx),%esp
289 default_entry:
291 /*
292 * New page tables may be in 4Mbyte page mode and may
293 * be using the global pages.
294 *
295 * NOTE! If we are on a 486 we may have no cr4 at all!
296 * So we do not try to touch it unless we really have
297 * some bits in it to set. This won't work if the BSP
298 * implements cr4 but this AP does not -- very unlikely
299 * but be warned! The same applies to the pse feature
300 * if not equally supported. --macro
301 *
302 * NOTE! We have to correct for the fact that we're
303 * not yet offset PAGE_OFFSET..
304 */
305 #define cr4_bits pa(mmu_cr4_features)
306 movl cr4_bits,%edx
307 andl %edx,%edx
308 jz 6f
309 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
310 orl %edx,%eax
311 movl %eax,%cr4
313 testb $X86_CR4_PAE, %al # check if PAE is enabled
314 jz 6f
316 /* Check if extended functions are implemented */
317 movl $0x80000000, %eax
318 cpuid
319 /* Value must be in the range 0x80000001 to 0x8000ffff */
320 subl $0x80000001, %eax
321 cmpl $(0x8000ffff-0x80000001), %eax
322 ja 6f
324 /* Clear bogus XD_DISABLE bits */
325 call verify_cpu
327 mov $0x80000001, %eax
328 cpuid
329 /* Execute Disable bit supported? */
330 btl $(X86_FEATURE_NX & 31), %edx
331 jnc 6f
333 /* Setup EFER (Extended Feature Enable Register) */
334 movl $MSR_EFER, %ecx
335 rdmsr
337 btsl $_EFER_NX, %eax
338 /* Make changes effective */
339 wrmsr
341 6:
343 /*
344 * Enable paging
345 */
346 movl $pa(initial_page_table), %eax
347 movl %eax,%cr3 /* set the page table pointer.. */
348 movl %cr0,%eax
349 orl $X86_CR0_PG,%eax
350 movl %eax,%cr0 /* ..and set paging (PG) bit */
351 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
352 1:
353 /* Shift the stack pointer to a virtual address */
354 addl $__PAGE_OFFSET, %esp
356 /*
357 * Initialize eflags. Some BIOS's leave bits like NT set. This would
358 * confuse the debugger if this code is traced.
359 * XXX - best to initialize before switching to protected mode.
360 */
361 pushl $0
362 popfl
364 /*
365 * start system 32-bit setup. We need to re-do some of the things done
366 * in 16-bit mode for the "real" operations.
367 */
368 movl setup_once_ref,%eax
369 andl %eax,%eax
370 jz 1f # Did we do this already?
371 call *%eax
372 1:
374 /* check if it is 486 or 386. */
375 /*
376 * XXX - this does a lot of unnecessary setup. Alignment checks don't
377 * apply at our cpl of 0 and the stack ought to be aligned already, and
378 * we don't need to preserve eflags.
379 */
380 movl $-1,X86_CPUID # -1 for no CPUID initially
381 movb $3,X86 # at least 386
382 pushfl # push EFLAGS
383 popl %eax # get EFLAGS
384 movl %eax,%ecx # save original EFLAGS
385 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
386 pushl %eax # copy to EFLAGS
387 popfl # set EFLAGS
388 pushfl # get new EFLAGS
389 popl %eax # put it in eax
390 xorl %ecx,%eax # change in flags
391 pushl %ecx # restore original EFLAGS
392 popfl
393 testl $0x40000,%eax # check if AC bit changed
394 je is386
396 movb $4,X86 # at least 486
397 testl $0x200000,%eax # check if ID bit changed
398 je is486
400 /* get vendor info */
401 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
402 cpuid
403 movl %eax,X86_CPUID # save CPUID level
404 movl %ebx,X86_VENDOR_ID # lo 4 chars
405 movl %edx,X86_VENDOR_ID+4 # next 4 chars
406 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
408 orl %eax,%eax # do we have processor info as well?
409 je is486
411 movl $1,%eax # Use the CPUID instruction to get CPU type
412 cpuid
413 movb %al,%cl # save reg for future use
414 andb $0x0f,%ah # mask processor family
415 movb %ah,X86
416 andb $0xf0,%al # mask model
417 shrb $4,%al
418 movb %al,X86_MODEL
419 andb $0x0f,%cl # mask mask revision
420 movb %cl,X86_MASK
421 movl %edx,X86_CAPABILITY
423 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
424 jmp 2f
426 is386: movl $2,%ecx # set MP
427 2: movl %cr0,%eax
428 andl $0x80000011,%eax # Save PG,PE,ET
429 orl %ecx,%eax
430 movl %eax,%cr0
432 call check_x87
433 lgdt early_gdt_descr
434 lidt idt_descr
435 ljmp $(__KERNEL_CS),$1f
436 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
437 movl %eax,%ss # after changing gdt.
439 movl $(__USER_DS),%eax # DS/ES contains default USER segment
440 movl %eax,%ds
441 movl %eax,%es
443 movl $(__KERNEL_PERCPU), %eax
444 movl %eax,%fs # set this cpu's percpu
446 movl $(__KERNEL_STACK_CANARY),%eax
447 movl %eax,%gs
449 xorl %eax,%eax # Clear LDT
450 lldt %ax
452 cld # gcc2 wants the direction flag cleared at all times
453 pushl $0 # fake return address for unwinder
454 jmp *(initial_code)
456 /*
457 * We depend on ET to be correct. This checks for 287/387.
458 */
459 check_x87:
460 movb $0,X86_HARD_MATH
461 clts
462 fninit
463 fstsw %ax
464 cmpb $0,%al
465 je 1f
466 movl %cr0,%eax /* no coprocessor: have to set bits */
467 xorl $4,%eax /* set EM */
468 movl %eax,%cr0
469 ret
470 ALIGN
471 1: movb $1,X86_HARD_MATH
472 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
473 ret
476 #include "verify_cpu.S"
478 /*
479 * setup_once
480 *
481 * The setup work we only want to run on the BSP.
482 *
483 * Warning: %esi is live across this function.
484 */
485 __INIT
486 setup_once:
487 /*
488 * Set up a idt with 256 entries pointing to ignore_int,
489 * interrupt gates. It doesn't actually load idt - that needs
490 * to be done on each CPU. Interrupts are enabled elsewhere,
491 * when we can be relatively sure everything is ok.
492 */
494 movl $idt_table,%edi
495 movl $early_idt_handlers,%eax
496 movl $NUM_EXCEPTION_VECTORS,%ecx
497 1:
498 movl %eax,(%edi)
499 movl %eax,4(%edi)
500 /* interrupt gate, dpl=0, present */
501 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
502 addl $9,%eax
503 addl $8,%edi
504 loop 1b
506 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
507 movl $ignore_int,%edx
508 movl $(__KERNEL_CS << 16),%eax
509 movw %dx,%ax /* selector = 0x0010 = cs */
510 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
511 2:
512 movl %eax,(%edi)
513 movl %edx,4(%edi)
514 addl $8,%edi
515 loop 2b
517 #ifdef CONFIG_CC_STACKPROTECTOR
518 /*
519 * Configure the stack canary. The linker can't handle this by
520 * relocation. Manually set base address in stack canary
521 * segment descriptor.
522 */
523 movl $gdt_page,%eax
524 movl $stack_canary,%ecx
525 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
526 shrl $16, %ecx
527 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
528 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
529 #endif
531 andl $0,setup_once_ref /* Once is enough, thanks */
532 ret
534 ENTRY(early_idt_handlers)
535 # 36(%esp) %eflags
536 # 32(%esp) %cs
537 # 28(%esp) %eip
538 # 24(%rsp) error code
539 i = 0
540 .rept NUM_EXCEPTION_VECTORS
541 .if (EXCEPTION_ERRCODE_MASK >> i) & 1
542 ASM_NOP2
543 .else
544 pushl $0 # Dummy error code, to make stack frame uniform
545 .endif
546 pushl $i # 20(%esp) Vector number
547 jmp early_idt_handler
548 i = i + 1
549 .endr
550 ENDPROC(early_idt_handlers)
552 /* This is global to keep gas from relaxing the jumps */
553 ENTRY(early_idt_handler)
554 cld
555 cmpl $2,%ss:early_recursion_flag
556 je hlt_loop
557 incl %ss:early_recursion_flag
559 push %eax # 16(%esp)
560 push %ecx # 12(%esp)
561 push %edx # 8(%esp)
562 push %ds # 4(%esp)
563 push %es # 0(%esp)
564 movl $(__KERNEL_DS),%eax
565 movl %eax,%ds
566 movl %eax,%es
568 cmpl $(__KERNEL_CS),32(%esp)
569 jne 10f
571 leal 28(%esp),%eax # Pointer to %eip
572 call early_fixup_exception
573 andl %eax,%eax
574 jnz ex_entry /* found an exception entry */
576 10:
577 #ifdef CONFIG_PRINTK
578 xorl %eax,%eax
579 movw %ax,2(%esp) /* clean up the segment values on some cpus */
580 movw %ax,6(%esp)
581 movw %ax,34(%esp)
582 leal 40(%esp),%eax
583 pushl %eax /* %esp before the exception */
584 pushl %ebx
585 pushl %ebp
586 pushl %esi
587 pushl %edi
588 movl %cr2,%eax
589 pushl %eax
590 pushl (20+6*4)(%esp) /* trapno */
591 pushl $fault_msg
592 call printk
593 #endif
594 call dump_stack
595 hlt_loop:
596 hlt
597 jmp hlt_loop
599 ex_entry:
600 pop %es
601 pop %ds
602 pop %edx
603 pop %ecx
604 pop %eax
605 addl $8,%esp /* drop vector number and error code */
606 decl %ss:early_recursion_flag
607 iret
608 ENDPROC(early_idt_handler)
610 /* This is the default interrupt "handler" :-) */
611 ALIGN
612 ignore_int:
613 cld
614 #ifdef CONFIG_PRINTK
615 pushl %eax
616 pushl %ecx
617 pushl %edx
618 pushl %es
619 pushl %ds
620 movl $(__KERNEL_DS),%eax
621 movl %eax,%ds
622 movl %eax,%es
623 cmpl $2,early_recursion_flag
624 je hlt_loop
625 incl early_recursion_flag
626 pushl 16(%esp)
627 pushl 24(%esp)
628 pushl 32(%esp)
629 pushl 40(%esp)
630 pushl $int_msg
631 call printk
633 call dump_stack
635 addl $(5*4),%esp
636 popl %ds
637 popl %es
638 popl %edx
639 popl %ecx
640 popl %eax
641 #endif
642 iret
643 ENDPROC(ignore_int)
644 __INITDATA
645 .align 4
646 early_recursion_flag:
647 .long 0
649 __REFDATA
650 .align 4
651 ENTRY(initial_code)
652 .long i386_start_kernel
653 ENTRY(setup_once_ref)
654 .long setup_once
656 /*
657 * BSS section
658 */
659 __PAGE_ALIGNED_BSS
660 .align PAGE_SIZE
661 #ifdef CONFIG_X86_PAE
662 initial_pg_pmd:
663 .fill 1024*KPMDS,4,0
664 #else
665 ENTRY(initial_page_table)
666 .fill 1024,4,0
667 #endif
668 initial_pg_fixmap:
669 .fill 1024,4,0
670 ENTRY(empty_zero_page)
671 .fill 4096,1,0
672 ENTRY(swapper_pg_dir)
673 .fill 1024,4,0
675 /*
676 * This starts the data section.
677 */
678 #ifdef CONFIG_X86_PAE
679 __PAGE_ALIGNED_DATA
680 /* Page-aligned for the benefit of paravirt? */
681 .align PAGE_SIZE
682 ENTRY(initial_page_table)
683 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
684 # if KPMDS == 3
685 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
686 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
687 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
688 # elif KPMDS == 2
689 .long 0,0
690 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
691 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
692 # elif KPMDS == 1
693 .long 0,0
694 .long 0,0
695 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
696 # else
697 # error "Kernel PMDs should be 1, 2 or 3"
698 # endif
699 .align PAGE_SIZE /* needs to be page-sized too */
700 #endif
702 .data
703 .balign 4
704 ENTRY(stack_start)
705 .long init_thread_union+THREAD_SIZE
707 __INITRODATA
708 int_msg:
709 .asciz "Unknown interrupt or fault at: %p %p %p\n"
711 fault_msg:
712 /* fault info: */
713 .ascii "BUG: Int %d: CR2 %p\n"
714 /* regs pushed in early_idt_handler: */
715 .ascii " EDI %p ESI %p EBP %p EBX %p\n"
716 .ascii " ESP %p ES %p DS %p\n"
717 .ascii " EDX %p ECX %p EAX %p\n"
718 /* fault frame: */
719 .ascii " vec %p err %p EIP %p CS %p flg %p\n"
720 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
721 .ascii " %p %p %p %p %p %p %p %p\n"
722 .asciz " %p %p %p %p %p %p %p %p\n"
724 #include "../../x86/xen/xen-head.S"
726 /*
727 * The IDT and GDT 'descriptors' are a strange 48-bit object
728 * only used by the lidt and lgdt instructions. They are not
729 * like usual segment descriptors - they consist of a 16-bit
730 * segment size, and 32-bit linear address value:
731 */
733 .data
734 .globl boot_gdt_descr
735 .globl idt_descr
737 ALIGN
738 # early boot GDT descriptor (must use 1:1 address mapping)
739 .word 0 # 32 bit align gdt_desc.address
740 boot_gdt_descr:
741 .word __BOOT_DS+7
742 .long boot_gdt - __PAGE_OFFSET
744 .word 0 # 32-bit align idt_desc.address
745 idt_descr:
746 .word IDT_ENTRIES*8-1 # idt contains 256 entries
747 .long idt_table
749 # boot GDT descriptor (later on used by CPU#0):
750 .word 0 # 32 bit align gdt_desc.address
751 ENTRY(early_gdt_descr)
752 .word GDT_ENTRIES*8-1
753 .long gdt_page /* Overwritten for secondary CPUs */
755 /*
756 * The boot_gdt must mirror the equivalent in setup.S and is
757 * used only for booting.
758 */
759 .align L1_CACHE_BYTES
760 ENTRY(boot_gdt)
761 .fill GDT_ENTRY_BOOT_CS,8,0
762 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
763 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */