ARM: mmp: fix potential NULL dereference
[linux/fpc-iii.git] / arch / x86 / mm / amdtopology.c
blob5247d01329ca96de7e9eacbb3f2511ff8f9c3a59
1 /*
2 * AMD NUMA support.
3 * Discover the memory map and associated nodes.
5 * This version reads it directly from the AMD northbridge.
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/string.h>
12 #include <linux/module.h>
13 #include <linux/nodemask.h>
14 #include <linux/memblock.h>
15 #include <linux/bootmem.h>
17 #include <asm/io.h>
18 #include <linux/pci_ids.h>
19 #include <linux/acpi.h>
20 #include <asm/types.h>
21 #include <asm/mmzone.h>
22 #include <asm/proto.h>
23 #include <asm/e820.h>
24 #include <asm/pci-direct.h>
25 #include <asm/numa.h>
26 #include <asm/mpspec.h>
27 #include <asm/apic.h>
28 #include <asm/amd_nb.h>
30 static unsigned char __initdata nodeids[8];
32 static __init int find_northbridge(void)
34 int num;
36 for (num = 0; num < 32; num++) {
37 u32 header;
39 header = read_pci_config(0, num, 0, 0x00);
40 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
42 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
43 continue;
45 header = read_pci_config(0, num, 1, 0x00);
46 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
48 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
49 continue;
50 return num;
53 return -ENOENT;
56 static __init void early_get_boot_cpu_id(void)
59 * need to get the APIC ID of the BSP so can use that to
60 * create apicid_to_node in amd_scan_nodes()
62 #ifdef CONFIG_X86_MPPARSE
64 * get boot-time SMP configuration:
66 if (smp_found_config)
67 early_get_smp_config();
68 #endif
71 int __init amd_numa_init(void)
73 u64 start = PFN_PHYS(0);
74 u64 end = PFN_PHYS(max_pfn);
75 unsigned numnodes;
76 u64 prevbase;
77 int i, j, nb;
78 u32 nodeid, reg;
79 unsigned int bits, cores, apicid_base;
81 if (!early_pci_allowed())
82 return -EINVAL;
84 nb = find_northbridge();
85 if (nb < 0)
86 return nb;
88 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
90 reg = read_pci_config(0, nb, 0, 0x60);
91 numnodes = ((reg >> 4) & 0xF) + 1;
92 if (numnodes <= 1)
93 return -ENOENT;
95 pr_info("Number of physical nodes %d\n", numnodes);
97 prevbase = 0;
98 for (i = 0; i < 8; i++) {
99 u64 base, limit;
101 base = read_pci_config(0, nb, 1, 0x40 + i*8);
102 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
104 nodeids[i] = nodeid = limit & 7;
105 if ((base & 3) == 0) {
106 if (i < numnodes)
107 pr_info("Skipping disabled node %d\n", i);
108 continue;
110 if (nodeid >= numnodes) {
111 pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
112 base, limit);
113 continue;
116 if (!limit) {
117 pr_info("Skipping node entry %d (base %Lx)\n",
118 i, base);
119 continue;
121 if ((base >> 8) & 3 || (limit >> 8) & 3) {
122 pr_err("Node %d using interleaving mode %Lx/%Lx\n",
123 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
124 return -EINVAL;
126 if (node_isset(nodeid, numa_nodes_parsed)) {
127 pr_info("Node %d already present, skipping\n",
128 nodeid);
129 continue;
132 limit >>= 16;
133 limit <<= 24;
134 limit |= (1<<24)-1;
135 limit++;
137 if (limit > end)
138 limit = end;
139 if (limit <= base)
140 continue;
142 base >>= 16;
143 base <<= 24;
145 if (base < start)
146 base = start;
147 if (limit > end)
148 limit = end;
149 if (limit == base) {
150 pr_err("Empty node %d\n", nodeid);
151 continue;
153 if (limit < base) {
154 pr_err("Node %d bogus settings %Lx-%Lx.\n",
155 nodeid, base, limit);
156 continue;
159 /* Could sort here, but pun for now. Should not happen anyroads. */
160 if (prevbase > base) {
161 pr_err("Node map not sorted %Lx,%Lx\n",
162 prevbase, base);
163 return -EINVAL;
166 pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
167 nodeid, base, limit);
169 prevbase = base;
170 numa_add_memblk(nodeid, base, limit);
171 node_set(nodeid, numa_nodes_parsed);
174 if (!nodes_weight(numa_nodes_parsed))
175 return -ENOENT;
178 * We seem to have valid NUMA configuration. Map apicids to nodes
179 * using the coreid bits from early_identify_cpu.
181 bits = boot_cpu_data.x86_coreid_bits;
182 cores = 1 << bits;
183 apicid_base = 0;
185 /* get the APIC ID of the BSP early for systems with apicid lifting */
186 early_get_boot_cpu_id();
187 if (boot_cpu_physical_apicid > 0) {
188 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
189 apicid_base = boot_cpu_physical_apicid;
192 for_each_node_mask(i, numa_nodes_parsed)
193 for (j = apicid_base; j < cores + apicid_base; j++)
194 set_apicid_to_node((i << bits) + j, i);
196 return 0;