2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 John Crispin <john@phrozen.org>
7 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
8 * Based on EP93xx wdt driver
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/module.h>
15 #include <linux/miscdevice.h>
16 #include <linux/watchdog.h>
17 #include <linux/of_platform.h>
18 #include <linux/uaccess.h>
19 #include <linux/clk.h>
21 #include <linux/regmap.h>
22 #include <linux/mfd/syscon.h>
24 #include <lantiq_soc.h>
26 #define LTQ_XRX_RCU_RST_STAT 0x0014
27 #define LTQ_XRX_RCU_RST_STAT_WDT BIT(31)
29 /* CPU0 Reset Source Register */
30 #define LTQ_FALCON_SYS1_CPU0RS 0x0060
31 /* reset cause mask */
32 #define LTQ_FALCON_SYS1_CPU0RS_MASK 0x0007
33 #define LTQ_FALCON_SYS1_CPU0RS_WDT 0x02
36 * Section 3.4 of the datasheet
37 * The password sequence protects the WDT control register from unintended
38 * write actions, which might cause malfunction of the WDT.
40 * essentially the following two magic passwords need to be written to allow
41 * IO access to the WDT core
43 #define LTQ_WDT_PW1 0x00BE0000
44 #define LTQ_WDT_PW2 0x00DC0000
46 #define LTQ_WDT_CR 0x0 /* watchdog control register */
47 #define LTQ_WDT_SR 0x8 /* watchdog status register */
49 #define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
50 #define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
51 #define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
52 /* divider to 0x40000 */
53 #define LTQ_WDT_DIVIDER 0x40000
54 #define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
56 static bool nowayout
= WATCHDOG_NOWAYOUT
;
58 static void __iomem
*ltq_wdt_membase
;
59 static unsigned long ltq_io_region_clk_rate
;
61 static unsigned long ltq_wdt_bootstatus
;
62 static unsigned long ltq_wdt_in_use
;
63 static int ltq_wdt_timeout
= 30;
64 static int ltq_wdt_ok_to_close
;
69 unsigned long int timeout
= ltq_wdt_timeout
*
70 (ltq_io_region_clk_rate
/ LTQ_WDT_DIVIDER
) + 0x1000;
71 if (timeout
> LTQ_MAX_TIMEOUT
)
72 timeout
= LTQ_MAX_TIMEOUT
;
74 /* write the first password magic */
75 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
76 /* write the second magic plus the configuration and new timeout */
77 ltq_w32(LTQ_WDT_SR_EN
| LTQ_WDT_SR_PWD
| LTQ_WDT_SR_CLKDIV
|
78 LTQ_WDT_PW2
| timeout
, ltq_wdt_membase
+ LTQ_WDT_CR
);
84 /* write the first password magic */
85 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
87 * write the second password magic with no config
88 * this turns the watchdog off
90 ltq_w32(LTQ_WDT_PW2
, ltq_wdt_membase
+ LTQ_WDT_CR
);
94 ltq_wdt_write(struct file
*file
, const char __user
*data
,
95 size_t len
, loff_t
*ppos
)
101 ltq_wdt_ok_to_close
= 0;
102 for (i
= 0; i
!= len
; i
++) {
105 if (get_user(c
, data
+ i
))
108 ltq_wdt_ok_to_close
= 1;
110 ltq_wdt_ok_to_close
= 0;
119 static struct watchdog_info ident
= {
120 .options
= WDIOF_MAGICCLOSE
| WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
|
122 .identity
= "ltq_wdt",
126 ltq_wdt_ioctl(struct file
*file
,
127 unsigned int cmd
, unsigned long arg
)
132 case WDIOC_GETSUPPORT
:
133 ret
= copy_to_user((struct watchdog_info __user
*)arg
, &ident
,
134 sizeof(ident
)) ? -EFAULT
: 0;
137 case WDIOC_GETBOOTSTATUS
:
138 ret
= put_user(ltq_wdt_bootstatus
, (int __user
*)arg
);
141 case WDIOC_GETSTATUS
:
142 ret
= put_user(0, (int __user
*)arg
);
145 case WDIOC_SETTIMEOUT
:
146 ret
= get_user(ltq_wdt_timeout
, (int __user
*)arg
);
149 /* intentional drop through */
150 case WDIOC_GETTIMEOUT
:
151 ret
= put_user(ltq_wdt_timeout
, (int __user
*)arg
);
154 case WDIOC_KEEPALIVE
:
163 ltq_wdt_open(struct inode
*inode
, struct file
*file
)
165 if (test_and_set_bit(0, <q_wdt_in_use
))
170 return nonseekable_open(inode
, file
);
174 ltq_wdt_release(struct inode
*inode
, struct file
*file
)
176 if (ltq_wdt_ok_to_close
)
179 pr_err("watchdog closed without warning\n");
180 ltq_wdt_ok_to_close
= 0;
181 clear_bit(0, <q_wdt_in_use
);
186 static const struct file_operations ltq_wdt_fops
= {
187 .owner
= THIS_MODULE
,
188 .write
= ltq_wdt_write
,
189 .unlocked_ioctl
= ltq_wdt_ioctl
,
190 .open
= ltq_wdt_open
,
191 .release
= ltq_wdt_release
,
195 static struct miscdevice ltq_wdt_miscdev
= {
196 .minor
= WATCHDOG_MINOR
,
198 .fops
= <q_wdt_fops
,
201 typedef int (*ltq_wdt_bootstatus_set
)(struct platform_device
*pdev
);
203 static int ltq_wdt_bootstatus_xrx(struct platform_device
*pdev
)
205 struct device
*dev
= &pdev
->dev
;
206 struct regmap
*rcu_regmap
;
210 rcu_regmap
= syscon_regmap_lookup_by_phandle(dev
->of_node
, "regmap");
211 if (IS_ERR(rcu_regmap
))
212 return PTR_ERR(rcu_regmap
);
214 err
= regmap_read(rcu_regmap
, LTQ_XRX_RCU_RST_STAT
, &val
);
218 if (val
& LTQ_XRX_RCU_RST_STAT_WDT
)
219 ltq_wdt_bootstatus
= WDIOF_CARDRESET
;
224 static int ltq_wdt_bootstatus_falcon(struct platform_device
*pdev
)
226 struct device
*dev
= &pdev
->dev
;
227 struct regmap
*rcu_regmap
;
231 rcu_regmap
= syscon_regmap_lookup_by_phandle(dev
->of_node
,
233 if (IS_ERR(rcu_regmap
))
234 return PTR_ERR(rcu_regmap
);
236 err
= regmap_read(rcu_regmap
, LTQ_FALCON_SYS1_CPU0RS
, &val
);
240 if ((val
& LTQ_FALCON_SYS1_CPU0RS_MASK
) == LTQ_FALCON_SYS1_CPU0RS_WDT
)
241 ltq_wdt_bootstatus
= WDIOF_CARDRESET
;
247 ltq_wdt_probe(struct platform_device
*pdev
)
249 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
251 ltq_wdt_bootstatus_set ltq_wdt_bootstatus_set
;
254 ltq_wdt_membase
= devm_ioremap_resource(&pdev
->dev
, res
);
255 if (IS_ERR(ltq_wdt_membase
))
256 return PTR_ERR(ltq_wdt_membase
);
258 ltq_wdt_bootstatus_set
= of_device_get_match_data(&pdev
->dev
);
259 if (ltq_wdt_bootstatus_set
) {
260 ret
= ltq_wdt_bootstatus_set(pdev
);
265 /* we do not need to enable the clock as it is always running */
268 dev_err(&pdev
->dev
, "Failed to get clock\n");
271 ltq_io_region_clk_rate
= clk_get_rate(clk
);
274 dev_info(&pdev
->dev
, "Init done\n");
275 return misc_register(<q_wdt_miscdev
);
279 ltq_wdt_remove(struct platform_device
*pdev
)
281 misc_deregister(<q_wdt_miscdev
);
286 static const struct of_device_id ltq_wdt_match
[] = {
287 { .compatible
= "lantiq,wdt", .data
= NULL
},
288 { .compatible
= "lantiq,xrx100-wdt", .data
= ltq_wdt_bootstatus_xrx
},
289 { .compatible
= "lantiq,falcon-wdt", .data
= ltq_wdt_bootstatus_falcon
},
292 MODULE_DEVICE_TABLE(of
, ltq_wdt_match
);
294 static struct platform_driver ltq_wdt_driver
= {
295 .probe
= ltq_wdt_probe
,
296 .remove
= ltq_wdt_remove
,
299 .of_match_table
= ltq_wdt_match
,
303 module_platform_driver(ltq_wdt_driver
);
305 module_param(nowayout
, bool, 0);
306 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started");
307 MODULE_AUTHOR("John Crispin <john@phrozen.org>");
308 MODULE_DESCRIPTION("Lantiq SoC Watchdog");
309 MODULE_LICENSE("GPL");