mm: make wait_on_page_writeback() wait for multiple pending writebacks
[linux/fpc-iii.git] / arch / arm / mach-omap1 / include / mach / usb.h
blob5429d86c7190d805ea003729837997751a772eaa
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * FIXME correct answer depends on hmc_mode,
4 * as does (on omap1) any nonzero value for config->otg port number
5 */
6 #if IS_ENABLED(CONFIG_USB_OMAP)
7 #define is_usb0_device(config) 1
8 #else
9 #define is_usb0_device(config) 0
10 #endif
12 #include <linux/platform_data/usb-omap1.h>
14 #if IS_ENABLED(CONFIG_USB_SUPPORT)
15 void omap1_usb_init(struct omap_usb_config *pdata);
16 #else
17 static inline void omap1_usb_init(struct omap_usb_config *pdata)
20 #endif
22 #define OMAP1_OTG_BASE 0xfffb0400
23 #define OMAP1_UDC_BASE 0xfffb4000
24 #define OMAP1_OHCI_BASE 0xfffba000
26 #define OMAP2_OHCI_BASE 0x4805e000
27 #define OMAP2_UDC_BASE 0x4805e200
28 #define OMAP2_OTG_BASE 0x4805e300
29 #define OTG_BASE OMAP1_OTG_BASE
30 #define UDC_BASE OMAP1_UDC_BASE
31 #define OMAP_OHCI_BASE OMAP1_OHCI_BASE
34 * OTG and transceiver registers, for OMAPs starting with ARM926
36 #define OTG_REV (OTG_BASE + 0x00)
37 #define OTG_SYSCON_1 (OTG_BASE + 0x04)
38 # define USB2_TRX_MODE(w) (((w)>>24)&0x07)
39 # define USB1_TRX_MODE(w) (((w)>>20)&0x07)
40 # define USB0_TRX_MODE(w) (((w)>>16)&0x07)
41 # define OTG_IDLE_EN (1 << 15)
42 # define HST_IDLE_EN (1 << 14)
43 # define DEV_IDLE_EN (1 << 13)
44 # define OTG_RESET_DONE (1 << 2)
45 # define OTG_SOFT_RESET (1 << 1)
46 #define OTG_SYSCON_2 (OTG_BASE + 0x08)
47 # define OTG_EN (1 << 31)
48 # define USBX_SYNCHRO (1 << 30)
49 # define OTG_MST16 (1 << 29)
50 # define SRP_GPDATA (1 << 28)
51 # define SRP_GPDVBUS (1 << 27)
52 # define SRP_GPUVBUS(w) (((w)>>24)&0x07)
53 # define A_WAIT_VRISE(w) (((w)>>20)&0x07)
54 # define B_ASE_BRST(w) (((w)>>16)&0x07)
55 # define SRP_DPW (1 << 14)
56 # define SRP_DATA (1 << 13)
57 # define SRP_VBUS (1 << 12)
58 # define OTG_PADEN (1 << 10)
59 # define HMC_PADEN (1 << 9)
60 # define UHOST_EN (1 << 8)
61 # define HMC_TLLSPEED (1 << 7)
62 # define HMC_TLLATTACH (1 << 6)
63 # define OTG_HMC(w) (((w)>>0)&0x3f)
64 #define OTG_CTRL (OTG_BASE + 0x0c)
65 # define OTG_USB2_EN (1 << 29)
66 # define OTG_USB2_DP (1 << 28)
67 # define OTG_USB2_DM (1 << 27)
68 # define OTG_USB1_EN (1 << 26)
69 # define OTG_USB1_DP (1 << 25)
70 # define OTG_USB1_DM (1 << 24)
71 # define OTG_USB0_EN (1 << 23)
72 # define OTG_USB0_DP (1 << 22)
73 # define OTG_USB0_DM (1 << 21)
74 # define OTG_ASESSVLD (1 << 20)
75 # define OTG_BSESSEND (1 << 19)
76 # define OTG_BSESSVLD (1 << 18)
77 # define OTG_VBUSVLD (1 << 17)
78 # define OTG_ID (1 << 16)
79 # define OTG_DRIVER_SEL (1 << 15)
80 # define OTG_A_SETB_HNPEN (1 << 12)
81 # define OTG_A_BUSREQ (1 << 11)
82 # define OTG_B_HNPEN (1 << 9)
83 # define OTG_B_BUSREQ (1 << 8)
84 # define OTG_BUSDROP (1 << 7)
85 # define OTG_PULLDOWN (1 << 5)
86 # define OTG_PULLUP (1 << 4)
87 # define OTG_DRV_VBUS (1 << 3)
88 # define OTG_PD_VBUS (1 << 2)
89 # define OTG_PU_VBUS (1 << 1)
90 # define OTG_PU_ID (1 << 0)
91 #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
92 # define DRIVER_SWITCH (1 << 15)
93 # define A_VBUS_ERR (1 << 13)
94 # define A_REQ_TMROUT (1 << 12)
95 # define A_SRP_DETECT (1 << 11)
96 # define B_HNP_FAIL (1 << 10)
97 # define B_SRP_TMROUT (1 << 9)
98 # define B_SRP_DONE (1 << 8)
99 # define B_SRP_STARTED (1 << 7)
100 # define OPRT_CHG (1 << 0)
101 #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
102 // same bits as in IRQ_EN
103 #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
104 # define OTGVPD (1 << 14)
105 # define OTGVPU (1 << 13)
106 # define OTGPUID (1 << 12)
107 # define USB2VDR (1 << 10)
108 # define USB2PDEN (1 << 9)
109 # define USB2PUEN (1 << 8)
110 # define USB1VDR (1 << 6)
111 # define USB1PDEN (1 << 5)
112 # define USB1PUEN (1 << 4)
113 # define USB0VDR (1 << 2)
114 # define USB0PDEN (1 << 1)
115 # define USB0PUEN (1 << 0)
116 #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
117 #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
119 /*-------------------------------------------------------------------------*/
121 /* OMAP1 */
122 #define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
123 # define CONF_USB2_UNI_R (1 << 8)
124 # define CONF_USB1_UNI_R (1 << 7)
125 # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
126 # define CONF_USB0_ISOLATE_R (1 << 3)
127 # define CONF_USB_PWRDN_DM_R (1 << 2)
128 # define CONF_USB_PWRDN_DP_R (1 << 1)