mm: make wait_on_page_writeback() wait for multiple pending writebacks
[linux/fpc-iii.git] / arch / arm / mach-omap2 / omap24xx.h
blobd9ecc057829215d9b9868550ca3d832f9908d331
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * This file contains the processor specific definitions
4 * of the TI OMAP24XX.
6 * Copyright (C) 2007 Texas Instruments.
7 * Copyright (C) 2007 Nokia Corporation.
8 */
10 #ifndef __ASM_ARCH_OMAP2_H
11 #define __ASM_ARCH_OMAP2_H
14 * Please place only base defines here and put the rest in device
15 * specific headers. Note also that some of these defines are needed
16 * for omap1 to compile without adding ifdefs.
19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
23 /* interrupt controller */
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
27 #define OMAP242X_CTRL_BASE L4_24XX_BASE
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
31 #define OMAP2420_PRM_BASE OMAP2420_CM_BASE
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
34 #define OMAP2420_GPMC_BASE 0x6800a000
36 #define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
37 #define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
38 #define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000)
39 #define OMAP2430_PRM_BASE OMAP2430_CM_BASE
41 #define OMAP243X_SMS_BASE 0x6C000000
42 #define OMAP243X_SDRC_BASE 0x6D000000
43 #define OMAP243X_GPMC_BASE 0x6E000000
44 #define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000)
45 #define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE
46 #define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000)
48 /* DSP SS */
49 #define OMAP2420_DSP_BASE 0x58000000
50 #define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0)
51 #define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000)
52 #define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000)
54 #define OMAP243X_DSP_BASE 0x5C000000
55 #define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0)
56 #define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000)
58 /* Mailbox */
59 #define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000)
61 /* Camera */
62 #define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000)
64 /* Security */
65 #define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000)
66 #define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000)
67 #define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000)
68 #define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000)
69 #define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000)
70 #define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000)
72 #endif /* __ASM_ARCH_OMAP2_H */