1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 // Copyright 2008 Openmoko, Inc.
5 // Copyright 2008 Simtec Electronics
6 // Ben Dooks <ben@simtec.co.uk>
7 // http://armlinux.simtec.co.uk/
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
12 #include <linux/gpio.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/dm9000.h>
16 #include <linux/mtd/mtd.h>
17 #include <linux/mtd/partitions.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial_s3c.h>
20 #include <linux/types.h>
22 #include <asm/mach-types.h>
23 #include <asm/mach/arch.h>
24 #include <asm/mach/map.h>
27 #include "regs-gpio.h"
28 #include "gpio-samsung.h"
30 #include <linux/soc/samsung/s3c-adc.h>
34 #include <linux/platform_data/mtd-nand-s3c2410.h>
35 #include <linux/platform_data/mmc-sdhci-s3c.h>
37 #include <linux/platform_data/touchscreen-s3c2410.h>
38 #include <mach/irqs.h>
40 #include <video/platform_lcd.h>
41 #include <video/samsung_fimd.h>
44 #include "regs-modem-s3c64xx.h"
45 #include "regs-srom-s3c64xx.h"
47 #define UCON S3C2410_UCON_DEFAULT
48 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
49 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
51 static struct s3c2410_uartcfg mini6410_uartcfgs
[] __initdata
= {
82 /* DM9000AEP 10/100 ethernet controller */
84 static struct resource mini6410_dm9k_resource
[] = {
85 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1
, 2),
86 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1
+ 4, 2),
87 [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL
, IORESOURCE_IRQ \
88 | IORESOURCE_IRQ_HIGHLEVEL
),
91 static struct dm9000_plat_data mini6410_dm9k_pdata
= {
92 .flags
= (DM9000_PLATF_16BITONLY
| DM9000_PLATF_NO_EEPROM
),
95 static struct platform_device mini6410_device_eth
= {
98 .num_resources
= ARRAY_SIZE(mini6410_dm9k_resource
),
99 .resource
= mini6410_dm9k_resource
,
101 .platform_data
= &mini6410_dm9k_pdata
,
105 static struct mtd_partition mini6410_nand_part
[] = {
118 .size
= MTDPART_SIZ_FULL
,
119 .offset
= SZ_1M
+ SZ_2M
,
123 static struct s3c2410_nand_set mini6410_nand_sets
[] = {
127 .nr_partitions
= ARRAY_SIZE(mini6410_nand_part
),
128 .partitions
= mini6410_nand_part
,
132 static struct s3c2410_platform_nand mini6410_nand_info
= {
136 .nr_sets
= ARRAY_SIZE(mini6410_nand_sets
),
137 .sets
= mini6410_nand_sets
,
138 .engine_type
= NAND_ECC_ENGINE_TYPE_SOFT
,
141 static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win
= {
148 static struct fb_videomode mini6410_lcd_type0_timing
= {
160 static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win
= {
167 static struct fb_videomode mini6410_lcd_type1_timing
= {
179 static struct s3c_fb_platdata mini6410_lcd_pdata
[] __initdata
= {
181 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
182 .vtiming
= &mini6410_lcd_type0_timing
,
183 .win
[0] = &mini6410_lcd_type0_fb_win
,
184 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
185 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
187 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
188 .vtiming
= &mini6410_lcd_type1_timing
,
189 .win
[0] = &mini6410_lcd_type1_fb_win
,
190 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
191 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
196 static void mini6410_lcd_power_set(struct plat_lcd_data
*pd
,
200 gpio_direction_output(S3C64XX_GPE(0), 1);
202 gpio_direction_output(S3C64XX_GPE(0), 0);
205 static struct plat_lcd_data mini6410_lcd_power_data
= {
206 .set_power
= mini6410_lcd_power_set
,
209 static struct platform_device mini6410_lcd_powerdev
= {
210 .name
= "platform-lcd",
211 .dev
.parent
= &s3c_device_fb
.dev
,
212 .dev
.platform_data
= &mini6410_lcd_power_data
,
215 static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata
= {
217 .cd_type
= S3C_SDHCI_CD_GPIO
,
218 .ext_cd_gpio
= S3C64XX_GPN(10),
219 .ext_cd_gpio_invert
= true,
222 static struct platform_device
*mini6410_devices
[] __initdata
= {
223 &mini6410_device_eth
,
229 &mini6410_lcd_powerdev
,
233 static void __init
mini6410_map_io(void)
237 s3c64xx_init_io(NULL
, 0);
238 s3c64xx_set_xtal_freq(12000000);
239 s3c24xx_init_uarts(mini6410_uartcfgs
, ARRAY_SIZE(mini6410_uartcfgs
));
240 s3c64xx_set_timer_source(S3C64XX_PWM3
, S3C64XX_PWM4
);
242 /* set the LCD type */
243 tmp
= __raw_readl(S3C64XX_SPCON
);
244 tmp
&= ~S3C64XX_SPCON_LCD_SEL_MASK
;
245 tmp
|= S3C64XX_SPCON_LCD_SEL_RGB
;
246 __raw_writel(tmp
, S3C64XX_SPCON
);
248 /* remove the LCD bypass */
249 tmp
= __raw_readl(S3C64XX_MODEM_MIFPCON
);
250 tmp
&= ~MIFPCON_LCD_BYPASS
;
251 __raw_writel(tmp
, S3C64XX_MODEM_MIFPCON
);
255 * mini6410_features string
257 * 0-9 LCD configuration
260 static char mini6410_features_str
[12] __initdata
= "0";
262 static int __init
mini6410_features_setup(char *str
)
265 strlcpy(mini6410_features_str
, str
,
266 sizeof(mini6410_features_str
));
270 __setup("mini6410=", mini6410_features_setup
);
272 #define FEATURE_SCREEN (1 << 0)
274 struct mini6410_features_t
{
279 static void mini6410_parse_features(
280 struct mini6410_features_t
*features
,
281 const char *features_str
)
283 const char *fp
= features_str
;
286 features
->lcd_index
= 0;
292 case '0'...'9': /* tft screen */
293 if (features
->done
& FEATURE_SCREEN
) {
294 printk(KERN_INFO
"MINI6410: '%c' ignored, "
295 "screen type already set\n", f
);
298 if (li
>= ARRAY_SIZE(mini6410_lcd_pdata
))
299 printk(KERN_INFO
"MINI6410: '%c' out "
300 "of range LCD mode\n", f
);
302 features
->lcd_index
= li
;
305 features
->done
|= FEATURE_SCREEN
;
311 static void __init
mini6410_machine_init(void)
314 struct mini6410_features_t features
= { 0 };
316 printk(KERN_INFO
"MINI6410: Option string mini6410=%s\n",
317 mini6410_features_str
);
319 /* Parse the feature string */
320 mini6410_parse_features(&features
, mini6410_features_str
);
322 printk(KERN_INFO
"MINI6410: selected LCD display is %dx%d\n",
323 mini6410_lcd_pdata
[features
.lcd_index
].win
[0]->xres
,
324 mini6410_lcd_pdata
[features
.lcd_index
].win
[0]->yres
);
326 s3c_nand_set_platdata(&mini6410_nand_info
);
327 s3c_fb_set_platdata(&mini6410_lcd_pdata
[features
.lcd_index
]);
328 s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata
);
329 s3c64xx_ts_set_platdata(NULL
);
331 /* configure nCS1 width to 16 bits */
333 cs1
= __raw_readl(S3C64XX_SROM_BW
) &
334 ~(S3C64XX_SROM_BW__CS_MASK
<< S3C64XX_SROM_BW__NCS1__SHIFT
);
335 cs1
|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT
) |
336 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT
) |
337 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT
)) <<
338 S3C64XX_SROM_BW__NCS1__SHIFT
;
339 __raw_writel(cs1
, S3C64XX_SROM_BW
);
341 /* set timing for nCS1 suitable for ethernet chip */
343 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT
) |
344 (6 << S3C64XX_SROM_BCX__TACP__SHIFT
) |
345 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT
) |
346 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT
) |
347 (13 << S3C64XX_SROM_BCX__TACC__SHIFT
) |
348 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT
) |
349 (0 << S3C64XX_SROM_BCX__TACS__SHIFT
), S3C64XX_SROM_BC1
);
351 gpio_request(S3C64XX_GPF(15), "LCD power");
352 gpio_request(S3C64XX_GPE(0), "LCD power");
354 platform_add_devices(mini6410_devices
, ARRAY_SIZE(mini6410_devices
));
357 MACHINE_START(MINI6410
, "MINI6410")
358 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
359 .atag_offset
= 0x100,
360 .nr_irqs
= S3C64XX_NR_IRQS
,
361 .init_irq
= s3c6410_init_irq
,
362 .map_io
= mini6410_map_io
,
363 .init_machine
= mini6410_machine_init
,
364 .init_time
= s3c64xx_timer_init
,