x86/ldt: Rework locking
[linux/fpc-iii.git] / arch / x86 / include / asm / mmu_context.h
blob4fdbe5efe535f43275c8cfb838d2d817f9b97593
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MMU_CONTEXT_H
3 #define _ASM_X86_MMU_CONTEXT_H
5 #include <asm/desc.h>
6 #include <linux/atomic.h>
7 #include <linux/mm_types.h>
8 #include <linux/pkeys.h>
10 #include <trace/events/tlb.h>
12 #include <asm/pgalloc.h>
13 #include <asm/tlbflush.h>
14 #include <asm/paravirt.h>
15 #include <asm/mpx.h>
17 extern atomic64_t last_mm_ctx_id;
19 #ifndef CONFIG_PARAVIRT
20 static inline void paravirt_activate_mm(struct mm_struct *prev,
21 struct mm_struct *next)
24 #endif /* !CONFIG_PARAVIRT */
26 #ifdef CONFIG_PERF_EVENTS
27 extern struct static_key rdpmc_always_available;
29 static inline void load_mm_cr4(struct mm_struct *mm)
31 if (static_key_false(&rdpmc_always_available) ||
32 atomic_read(&mm->context.perf_rdpmc_allowed))
33 cr4_set_bits(X86_CR4_PCE);
34 else
35 cr4_clear_bits(X86_CR4_PCE);
37 #else
38 static inline void load_mm_cr4(struct mm_struct *mm) {}
39 #endif
41 #ifdef CONFIG_MODIFY_LDT_SYSCALL
43 * ldt_structs can be allocated, used, and freed, but they are never
44 * modified while live.
46 struct ldt_struct {
48 * Xen requires page-aligned LDTs with special permissions. This is
49 * needed to prevent us from installing evil descriptors such as
50 * call gates. On native, we could merge the ldt_struct and LDT
51 * allocations, but it's not worth trying to optimize.
53 struct desc_struct *entries;
54 unsigned int nr_entries;
58 * Used for LDT copy/destruction.
60 int init_new_context_ldt(struct task_struct *tsk, struct mm_struct *mm);
61 void destroy_context_ldt(struct mm_struct *mm);
62 #else /* CONFIG_MODIFY_LDT_SYSCALL */
63 static inline int init_new_context_ldt(struct task_struct *tsk,
64 struct mm_struct *mm)
66 return 0;
68 static inline void destroy_context_ldt(struct mm_struct *mm) {}
69 #endif
71 static inline void load_mm_ldt(struct mm_struct *mm)
73 #ifdef CONFIG_MODIFY_LDT_SYSCALL
74 struct ldt_struct *ldt;
76 /* READ_ONCE synchronizes with smp_store_release */
77 ldt = READ_ONCE(mm->context.ldt);
80 * Any change to mm->context.ldt is followed by an IPI to all
81 * CPUs with the mm active. The LDT will not be freed until
82 * after the IPI is handled by all such CPUs. This means that,
83 * if the ldt_struct changes before we return, the values we see
84 * will be safe, and the new values will be loaded before we run
85 * any user code.
87 * NB: don't try to convert this to use RCU without extreme care.
88 * We would still need IRQs off, because we don't want to change
89 * the local LDT after an IPI loaded a newer value than the one
90 * that we can see.
93 if (unlikely(ldt))
94 set_ldt(ldt->entries, ldt->nr_entries);
95 else
96 clear_LDT();
97 #else
98 clear_LDT();
99 #endif
102 static inline void switch_ldt(struct mm_struct *prev, struct mm_struct *next)
104 #ifdef CONFIG_MODIFY_LDT_SYSCALL
106 * Load the LDT if either the old or new mm had an LDT.
108 * An mm will never go from having an LDT to not having an LDT. Two
109 * mms never share an LDT, so we don't gain anything by checking to
110 * see whether the LDT changed. There's also no guarantee that
111 * prev->context.ldt actually matches LDTR, but, if LDTR is non-NULL,
112 * then prev->context.ldt will also be non-NULL.
114 * If we really cared, we could optimize the case where prev == next
115 * and we're exiting lazy mode. Most of the time, if this happens,
116 * we don't actually need to reload LDTR, but modify_ldt() is mostly
117 * used by legacy code and emulators where we don't need this level of
118 * performance.
120 * This uses | instead of || because it generates better code.
122 if (unlikely((unsigned long)prev->context.ldt |
123 (unsigned long)next->context.ldt))
124 load_mm_ldt(next);
125 #endif
127 DEBUG_LOCKS_WARN_ON(preemptible());
130 void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk);
132 static inline int init_new_context(struct task_struct *tsk,
133 struct mm_struct *mm)
135 mutex_init(&mm->context.lock);
137 mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
138 atomic64_set(&mm->context.tlb_gen, 0);
140 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
141 if (cpu_feature_enabled(X86_FEATURE_OSPKE)) {
142 /* pkey 0 is the default and always allocated */
143 mm->context.pkey_allocation_map = 0x1;
144 /* -1 means unallocated or invalid */
145 mm->context.execute_only_pkey = -1;
147 #endif
148 return init_new_context_ldt(tsk, mm);
150 static inline void destroy_context(struct mm_struct *mm)
152 destroy_context_ldt(mm);
155 extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
156 struct task_struct *tsk);
158 extern void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
159 struct task_struct *tsk);
160 #define switch_mm_irqs_off switch_mm_irqs_off
162 #define activate_mm(prev, next) \
163 do { \
164 paravirt_activate_mm((prev), (next)); \
165 switch_mm((prev), (next), NULL); \
166 } while (0);
168 #ifdef CONFIG_X86_32
169 #define deactivate_mm(tsk, mm) \
170 do { \
171 lazy_load_gs(0); \
172 } while (0)
173 #else
174 #define deactivate_mm(tsk, mm) \
175 do { \
176 load_gs_index(0); \
177 loadsegment(fs, 0); \
178 } while (0)
179 #endif
181 static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
183 paravirt_arch_dup_mmap(oldmm, mm);
184 return 0;
187 static inline void arch_exit_mmap(struct mm_struct *mm)
189 paravirt_arch_exit_mmap(mm);
192 #ifdef CONFIG_X86_64
193 static inline bool is_64bit_mm(struct mm_struct *mm)
195 return !IS_ENABLED(CONFIG_IA32_EMULATION) ||
196 !(mm->context.ia32_compat == TIF_IA32);
198 #else
199 static inline bool is_64bit_mm(struct mm_struct *mm)
201 return false;
203 #endif
205 static inline void arch_bprm_mm_init(struct mm_struct *mm,
206 struct vm_area_struct *vma)
208 mpx_mm_init(mm);
211 static inline void arch_unmap(struct mm_struct *mm, struct vm_area_struct *vma,
212 unsigned long start, unsigned long end)
215 * mpx_notify_unmap() goes and reads a rarely-hot
216 * cacheline in the mm_struct. That can be expensive
217 * enough to be seen in profiles.
219 * The mpx_notify_unmap() call and its contents have been
220 * observed to affect munmap() performance on hardware
221 * where MPX is not present.
223 * The unlikely() optimizes for the fast case: no MPX
224 * in the CPU, or no MPX use in the process. Even if
225 * we get this wrong (in the unlikely event that MPX
226 * is widely enabled on some system) the overhead of
227 * MPX itself (reading bounds tables) is expected to
228 * overwhelm the overhead of getting this unlikely()
229 * consistently wrong.
231 if (unlikely(cpu_feature_enabled(X86_FEATURE_MPX)))
232 mpx_notify_unmap(mm, vma, start, end);
235 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
236 static inline int vma_pkey(struct vm_area_struct *vma)
238 unsigned long vma_pkey_mask = VM_PKEY_BIT0 | VM_PKEY_BIT1 |
239 VM_PKEY_BIT2 | VM_PKEY_BIT3;
241 return (vma->vm_flags & vma_pkey_mask) >> VM_PKEY_SHIFT;
243 #else
244 static inline int vma_pkey(struct vm_area_struct *vma)
246 return 0;
248 #endif
251 * We only want to enforce protection keys on the current process
252 * because we effectively have no access to PKRU for other
253 * processes or any way to tell *which * PKRU in a threaded
254 * process we could use.
256 * So do not enforce things if the VMA is not from the current
257 * mm, or if we are in a kernel thread.
259 static inline bool vma_is_foreign(struct vm_area_struct *vma)
261 if (!current->mm)
262 return true;
264 * Should PKRU be enforced on the access to this VMA? If
265 * the VMA is from another process, then PKRU has no
266 * relevance and should not be enforced.
268 if (current->mm != vma->vm_mm)
269 return true;
271 return false;
274 static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
275 bool write, bool execute, bool foreign)
277 /* pkeys never affect instruction fetches */
278 if (execute)
279 return true;
280 /* allow access if the VMA is not one from this process */
281 if (foreign || vma_is_foreign(vma))
282 return true;
283 return __pkru_allows_pkey(vma_pkey(vma), write);
287 * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
288 * bits. This serves two purposes. It prevents a nasty situation in
289 * which PCID-unaware code saves CR3, loads some other value (with PCID
290 * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
291 * the saved ASID was nonzero. It also means that any bugs involving
292 * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
293 * deterministically.
296 static inline unsigned long build_cr3(struct mm_struct *mm, u16 asid)
298 if (static_cpu_has(X86_FEATURE_PCID)) {
299 VM_WARN_ON_ONCE(asid > 4094);
300 return __sme_pa(mm->pgd) | (asid + 1);
301 } else {
302 VM_WARN_ON_ONCE(asid != 0);
303 return __sme_pa(mm->pgd);
307 static inline unsigned long build_cr3_noflush(struct mm_struct *mm, u16 asid)
309 VM_WARN_ON_ONCE(asid > 4094);
310 return __sme_pa(mm->pgd) | (asid + 1) | CR3_NOFLUSH;
314 * This can be used from process context to figure out what the value of
315 * CR3 is without needing to do a (slow) __read_cr3().
317 * It's intended to be used for code like KVM that sneakily changes CR3
318 * and needs to restore it. It needs to be used very carefully.
320 static inline unsigned long __get_current_cr3_fast(void)
322 unsigned long cr3 = build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm),
323 this_cpu_read(cpu_tlbstate.loaded_mm_asid));
325 /* For now, be very restrictive about when this can be called. */
326 VM_WARN_ON(in_nmi() || preemptible());
328 VM_BUG_ON(cr3 != __read_cr3());
329 return cr3;
332 #endif /* _ASM_X86_MMU_CONTEXT_H */