drivers/pinctrl/freescale/pinctrl-imx25.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // imx25 pinctrl driver.
   4 //
   5 // Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
   6 //
   7 // This driver was mostly copied from the imx51 pinctrl driver which has:
   8 //
   9 // Copyright (C) 2012 Freescale Semiconductor, Inc.
  10 // Copyright (C) 2012 Linaro, Inc.
  11 //
  12 // Author: Denis Carikli <denis@eukrea.com>
  13
  14 #include <linux/err.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/of.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pinctrl/pinctrl.h>
  20
  21 #include "pinctrl-imx.h"
  22
  23 enum imx25_pads {
  24         MX25_PAD_RESERVE0 = 0,
  25         MX25_PAD_RESERVE1 = 1,
  26         MX25_PAD_A10 = 2,
  27         MX25_PAD_A13 = 3,
  28         MX25_PAD_A14 = 4,
  29         MX25_PAD_A15 = 5,
  30         MX25_PAD_A16 = 6,
  31         MX25_PAD_A17 = 7,
  32         MX25_PAD_A18 = 8,
  33         MX25_PAD_A19 = 9,
  34         MX25_PAD_A20 = 10,
  35         MX25_PAD_A21 = 11,
  36         MX25_PAD_A22 = 12,
  37         MX25_PAD_A23 = 13,
  38         MX25_PAD_A24 = 14,
  39         MX25_PAD_A25 = 15,
  40         MX25_PAD_EB0 = 16,
  41         MX25_PAD_EB1 = 17,
  42         MX25_PAD_OE = 18,
  43         MX25_PAD_CS0 = 19,
  44         MX25_PAD_CS1 = 20,
  45         MX25_PAD_CS4 = 21,
  46         MX25_PAD_CS5 = 22,
  47         MX25_PAD_NF_CE0 = 23,
  48         MX25_PAD_ECB = 24,
  49         MX25_PAD_LBA = 25,
  50         MX25_PAD_BCLK = 26,
  51         MX25_PAD_RW = 27,
  52         MX25_PAD_NFWE_B = 28,
  53         MX25_PAD_NFRE_B = 29,
  54         MX25_PAD_NFALE = 30,
  55         MX25_PAD_NFCLE = 31,
  56         MX25_PAD_NFWP_B = 32,
  57         MX25_PAD_NFRB = 33,
  58         MX25_PAD_D15 = 34,
  59         MX25_PAD_D14 = 35,
  60         MX25_PAD_D13 = 36,
  61         MX25_PAD_D12 = 37,
  62         MX25_PAD_D11 = 38,
  63         MX25_PAD_D10 = 39,
  64         MX25_PAD_D9 = 40,
  65         MX25_PAD_D8 = 41,
  66         MX25_PAD_D7 = 42,
  67         MX25_PAD_D6 = 43,
  68         MX25_PAD_D5 = 44,
  69         MX25_PAD_D4 = 45,
  70         MX25_PAD_D3 = 46,
  71         MX25_PAD_D2 = 47,
  72         MX25_PAD_D1 = 48,
  73         MX25_PAD_D0 = 49,
  74         MX25_PAD_LD0 = 50,
  75         MX25_PAD_LD1 = 51,
  76         MX25_PAD_LD2 = 52,
  77         MX25_PAD_LD3 = 53,
  78         MX25_PAD_LD4 = 54,
  79         MX25_PAD_LD5 = 55,
  80         MX25_PAD_LD6 = 56,
  81         MX25_PAD_LD7 = 57,
  82         MX25_PAD_LD8 = 58,
  83         MX25_PAD_LD9 = 59,
  84         MX25_PAD_LD10 = 60,
  85         MX25_PAD_LD11 = 61,
  86         MX25_PAD_LD12 = 62,
  87         MX25_PAD_LD13 = 63,
  88         MX25_PAD_LD14 = 64,
  89         MX25_PAD_LD15 = 65,
  90         MX25_PAD_HSYNC = 66,
  91         MX25_PAD_VSYNC = 67,
  92         MX25_PAD_LSCLK = 68,
  93         MX25_PAD_OE_ACD = 69,
  94         MX25_PAD_CONTRAST = 70,
  95         MX25_PAD_PWM = 71,
  96         MX25_PAD_CSI_D2 = 72,
  97         MX25_PAD_CSI_D3 = 73,
  98         MX25_PAD_CSI_D4 = 74,
  99         MX25_PAD_CSI_D5 = 75,
 100         MX25_PAD_CSI_D6 = 76,
 101         MX25_PAD_CSI_D7 = 77,
 102         MX25_PAD_CSI_D8 = 78,
 103         MX25_PAD_CSI_D9 = 79,
 104         MX25_PAD_CSI_MCLK = 80,
 105         MX25_PAD_CSI_VSYNC = 81,
 106         MX25_PAD_CSI_HSYNC = 82,
 107         MX25_PAD_CSI_PIXCLK = 83,
 108         MX25_PAD_I2C1_CLK = 84,
 109         MX25_PAD_I2C1_DAT = 85,
 110         MX25_PAD_CSPI1_MOSI = 86,
 111         MX25_PAD_CSPI1_MISO = 87,
 112         MX25_PAD_CSPI1_SS0 = 88,
 113         MX25_PAD_CSPI1_SS1 = 89,
 114         MX25_PAD_CSPI1_SCLK = 90,
 115         MX25_PAD_CSPI1_RDY = 91,
 116         MX25_PAD_UART1_RXD = 92,
 117         MX25_PAD_UART1_TXD = 93,
 118         MX25_PAD_UART1_RTS = 94,
 119         MX25_PAD_UART1_CTS = 95,
 120         MX25_PAD_UART2_RXD = 96,
 121         MX25_PAD_UART2_TXD = 97,
 122         MX25_PAD_UART2_RTS = 98,
 123         MX25_PAD_UART2_CTS = 99,
 124         MX25_PAD_SD1_CMD = 100,
 125         MX25_PAD_SD1_CLK = 101,
 126         MX25_PAD_SD1_DATA0 = 102,
 127         MX25_PAD_SD1_DATA1 = 103,
 128         MX25_PAD_SD1_DATA2 = 104,
 129         MX25_PAD_SD1_DATA3 = 105,
 130         MX25_PAD_KPP_ROW0 = 106,
 131         MX25_PAD_KPP_ROW1 = 107,
 132         MX25_PAD_KPP_ROW2 = 108,
 133         MX25_PAD_KPP_ROW3 = 109,
 134         MX25_PAD_KPP_COL0 = 110,
 135         MX25_PAD_KPP_COL1 = 111,
 136         MX25_PAD_KPP_COL2 = 112,
 137         MX25_PAD_KPP_COL3 = 113,
 138         MX25_PAD_FEC_MDC = 114,
 139         MX25_PAD_FEC_MDIO = 115,
 140         MX25_PAD_FEC_TDATA0 = 116,
 141         MX25_PAD_FEC_TDATA1 = 117,
 142         MX25_PAD_FEC_TX_EN = 118,
 143         MX25_PAD_FEC_RDATA0 = 119,
 144         MX25_PAD_FEC_RDATA1 = 120,
 145         MX25_PAD_FEC_RX_DV = 121,
 146         MX25_PAD_FEC_TX_CLK = 122,
 147         MX25_PAD_RTCK = 123,
 148         MX25_PAD_DE_B = 124,
 149         MX25_PAD_GPIO_A = 125,
 150         MX25_PAD_GPIO_B = 126,
 151         MX25_PAD_GPIO_C = 127,
 152         MX25_PAD_GPIO_D = 128,
 153         MX25_PAD_GPIO_E = 129,
 154         MX25_PAD_GPIO_F = 130,
 155         MX25_PAD_EXT_ARMCLK = 131,
 156         MX25_PAD_UPLL_BYPCLK = 132,
 157         MX25_PAD_VSTBY_REQ = 133,
 158         MX25_PAD_VSTBY_ACK = 134,
 159         MX25_PAD_POWER_FAIL  = 135,
 160         MX25_PAD_CLKO = 136,
 161         MX25_PAD_BOOT_MODE0 = 137,
 162         MX25_PAD_BOOT_MODE1 = 138,
 163 };
 164
 165 /* Pad names for the pinmux subsystem */
 166 static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = {
 167         IMX_PINCTRL_PIN(MX25_PAD_RESERVE0),
 168         IMX_PINCTRL_PIN(MX25_PAD_RESERVE1),
 169         IMX_PINCTRL_PIN(MX25_PAD_A10),
 170         IMX_PINCTRL_PIN(MX25_PAD_A13),
 171         IMX_PINCTRL_PIN(MX25_PAD_A14),
 172         IMX_PINCTRL_PIN(MX25_PAD_A15),
 173         IMX_PINCTRL_PIN(MX25_PAD_A16),
 174         IMX_PINCTRL_PIN(MX25_PAD_A17),
 175         IMX_PINCTRL_PIN(MX25_PAD_A18),
 176         IMX_PINCTRL_PIN(MX25_PAD_A19),
 177         IMX_PINCTRL_PIN(MX25_PAD_A20),
 178         IMX_PINCTRL_PIN(MX25_PAD_A21),
 179         IMX_PINCTRL_PIN(MX25_PAD_A22),
 180         IMX_PINCTRL_PIN(MX25_PAD_A23),
 181         IMX_PINCTRL_PIN(MX25_PAD_A24),
 182         IMX_PINCTRL_PIN(MX25_PAD_A25),
 183         IMX_PINCTRL_PIN(MX25_PAD_EB0),
 184         IMX_PINCTRL_PIN(MX25_PAD_EB1),
 185         IMX_PINCTRL_PIN(MX25_PAD_OE),
 186         IMX_PINCTRL_PIN(MX25_PAD_CS0),
 187         IMX_PINCTRL_PIN(MX25_PAD_CS1),
 188         IMX_PINCTRL_PIN(MX25_PAD_CS4),
 189         IMX_PINCTRL_PIN(MX25_PAD_CS5),
 190         IMX_PINCTRL_PIN(MX25_PAD_NF_CE0),
 191         IMX_PINCTRL_PIN(MX25_PAD_ECB),
 192         IMX_PINCTRL_PIN(MX25_PAD_LBA),
 193         IMX_PINCTRL_PIN(MX25_PAD_BCLK),
 194         IMX_PINCTRL_PIN(MX25_PAD_RW),
 195         IMX_PINCTRL_PIN(MX25_PAD_NFWE_B),
 196         IMX_PINCTRL_PIN(MX25_PAD_NFRE_B),
 197         IMX_PINCTRL_PIN(MX25_PAD_NFALE),
 198         IMX_PINCTRL_PIN(MX25_PAD_NFCLE),
 199         IMX_PINCTRL_PIN(MX25_PAD_NFWP_B),
 200         IMX_PINCTRL_PIN(MX25_PAD_NFRB),
 201         IMX_PINCTRL_PIN(MX25_PAD_D15),
 202         IMX_PINCTRL_PIN(MX25_PAD_D14),
 203         IMX_PINCTRL_PIN(MX25_PAD_D13),
 204         IMX_PINCTRL_PIN(MX25_PAD_D12),
 205         IMX_PINCTRL_PIN(MX25_PAD_D11),
 206         IMX_PINCTRL_PIN(MX25_PAD_D10),
 207         IMX_PINCTRL_PIN(MX25_PAD_D9),
 208         IMX_PINCTRL_PIN(MX25_PAD_D8),
 209         IMX_PINCTRL_PIN(MX25_PAD_D7),
 210         IMX_PINCTRL_PIN(MX25_PAD_D6),
 211         IMX_PINCTRL_PIN(MX25_PAD_D5),
 212         IMX_PINCTRL_PIN(MX25_PAD_D4),
 213         IMX_PINCTRL_PIN(MX25_PAD_D3),
 214         IMX_PINCTRL_PIN(MX25_PAD_D2),
 215         IMX_PINCTRL_PIN(MX25_PAD_D1),
 216         IMX_PINCTRL_PIN(MX25_PAD_D0),
 217         IMX_PINCTRL_PIN(MX25_PAD_LD0),
 218         IMX_PINCTRL_PIN(MX25_PAD_LD1),
 219         IMX_PINCTRL_PIN(MX25_PAD_LD2),
 220         IMX_PINCTRL_PIN(MX25_PAD_LD3),
 221         IMX_PINCTRL_PIN(MX25_PAD_LD4),
 222         IMX_PINCTRL_PIN(MX25_PAD_LD5),
 223         IMX_PINCTRL_PIN(MX25_PAD_LD6),
 224         IMX_PINCTRL_PIN(MX25_PAD_LD7),
 225         IMX_PINCTRL_PIN(MX25_PAD_LD8),
 226         IMX_PINCTRL_PIN(MX25_PAD_LD9),
 227         IMX_PINCTRL_PIN(MX25_PAD_LD10),
 228         IMX_PINCTRL_PIN(MX25_PAD_LD11),
 229         IMX_PINCTRL_PIN(MX25_PAD_LD12),
 230         IMX_PINCTRL_PIN(MX25_PAD_LD13),
 231         IMX_PINCTRL_PIN(MX25_PAD_LD14),
 232         IMX_PINCTRL_PIN(MX25_PAD_LD15),
 233         IMX_PINCTRL_PIN(MX25_PAD_HSYNC),
 234         IMX_PINCTRL_PIN(MX25_PAD_VSYNC),
 235         IMX_PINCTRL_PIN(MX25_PAD_LSCLK),
 236         IMX_PINCTRL_PIN(MX25_PAD_OE_ACD),
 237         IMX_PINCTRL_PIN(MX25_PAD_CONTRAST),
 238         IMX_PINCTRL_PIN(MX25_PAD_PWM),
 239         IMX_PINCTRL_PIN(MX25_PAD_CSI_D2),
 240         IMX_PINCTRL_PIN(MX25_PAD_CSI_D3),
 241         IMX_PINCTRL_PIN(MX25_PAD_CSI_D4),
 242         IMX_PINCTRL_PIN(MX25_PAD_CSI_D5),
 243         IMX_PINCTRL_PIN(MX25_PAD_CSI_D6),
 244         IMX_PINCTRL_PIN(MX25_PAD_CSI_D7),
 245         IMX_PINCTRL_PIN(MX25_PAD_CSI_D8),
 246         IMX_PINCTRL_PIN(MX25_PAD_CSI_D9),
 247         IMX_PINCTRL_PIN(MX25_PAD_CSI_MCLK),
 248         IMX_PINCTRL_PIN(MX25_PAD_CSI_VSYNC),
 249         IMX_PINCTRL_PIN(MX25_PAD_CSI_HSYNC),
 250         IMX_PINCTRL_PIN(MX25_PAD_CSI_PIXCLK),
 251         IMX_PINCTRL_PIN(MX25_PAD_I2C1_CLK),
 252         IMX_PINCTRL_PIN(MX25_PAD_I2C1_DAT),
 253         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MOSI),
 254         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MISO),
 255         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS0),
 256         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS1),
 257         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SCLK),
 258         IMX_PINCTRL_PIN(MX25_PAD_CSPI1_RDY),
 259         IMX_PINCTRL_PIN(MX25_PAD_UART1_RXD),
 260         IMX_PINCTRL_PIN(MX25_PAD_UART1_TXD),
 261         IMX_PINCTRL_PIN(MX25_PAD_UART1_RTS),
 262         IMX_PINCTRL_PIN(MX25_PAD_UART1_CTS),
 263         IMX_PINCTRL_PIN(MX25_PAD_UART2_RXD),
 264         IMX_PINCTRL_PIN(MX25_PAD_UART2_TXD),
 265         IMX_PINCTRL_PIN(MX25_PAD_UART2_RTS),
 266         IMX_PINCTRL_PIN(MX25_PAD_UART2_CTS),
 267         IMX_PINCTRL_PIN(MX25_PAD_SD1_CMD),
 268         IMX_PINCTRL_PIN(MX25_PAD_SD1_CLK),
 269         IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA0),
 270         IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA1),
 271         IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA2),
 272         IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA3),
 273         IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW0),
 274         IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW1),
 275         IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW2),
 276         IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW3),
 277         IMX_PINCTRL_PIN(MX25_PAD_KPP_COL0),
 278         IMX_PINCTRL_PIN(MX25_PAD_KPP_COL1),
 279         IMX_PINCTRL_PIN(MX25_PAD_KPP_COL2),
 280         IMX_PINCTRL_PIN(MX25_PAD_KPP_COL3),
 281         IMX_PINCTRL_PIN(MX25_PAD_FEC_MDC),
 282         IMX_PINCTRL_PIN(MX25_PAD_FEC_MDIO),
 283         IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA0),
 284         IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA1),
 285         IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_EN),
 286         IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA0),
 287         IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA1),
 288         IMX_PINCTRL_PIN(MX25_PAD_FEC_RX_DV),
 289         IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_CLK),
 290         IMX_PINCTRL_PIN(MX25_PAD_RTCK),
 291         IMX_PINCTRL_PIN(MX25_PAD_DE_B),
 292         IMX_PINCTRL_PIN(MX25_PAD_GPIO_A),
 293         IMX_PINCTRL_PIN(MX25_PAD_GPIO_B),
 294         IMX_PINCTRL_PIN(MX25_PAD_GPIO_C),
 295         IMX_PINCTRL_PIN(MX25_PAD_GPIO_D),
 296         IMX_PINCTRL_PIN(MX25_PAD_GPIO_E),
 297         IMX_PINCTRL_PIN(MX25_PAD_GPIO_F),
 298         IMX_PINCTRL_PIN(MX25_PAD_EXT_ARMCLK),
 299         IMX_PINCTRL_PIN(MX25_PAD_UPLL_BYPCLK),
 300         IMX_PINCTRL_PIN(MX25_PAD_VSTBY_REQ),
 301         IMX_PINCTRL_PIN(MX25_PAD_VSTBY_ACK),
 302         IMX_PINCTRL_PIN(MX25_PAD_POWER_FAIL),
 303         IMX_PINCTRL_PIN(MX25_PAD_CLKO),
 304         IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE0),
 305         IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE1),
 306 };
 307
 308 static const struct imx_pinctrl_soc_info imx25_pinctrl_info = {
 309         .pins = imx25_pinctrl_pads,
 310         .npins = ARRAY_SIZE(imx25_pinctrl_pads),
 311 };
 312
 313 static const struct of_device_id imx25_pinctrl_of_match[] = {
 314         { .compatible = "fsl,imx25-iomuxc", },
 315         { /* sentinel */ }
 316 };
 317
 318 static int imx25_pinctrl_probe(struct platform_device *pdev)
 319 {
 320         return imx_pinctrl_probe(pdev, &imx25_pinctrl_info);
 321 }
 322
 323 static struct platform_driver imx25_pinctrl_driver = {
 324         .driver = {
 325                 .name = "imx25-pinctrl",
 326                 .of_match_table = of_match_ptr(imx25_pinctrl_of_match),
 327         },
 328         .probe = imx25_pinctrl_probe,
 329 };
 330
 331 static int __init imx25_pinctrl_init(void)
 332 {
 333         return platform_driver_register(&imx25_pinctrl_driver);
 334 }
 335 arch_initcall(imx25_pinctrl_init);