2 * EBI driver for Atmel chips
3 * inspired by the fsl weim bus driver
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/clk.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/mfd/syscon/atmel-matrix.h>
16 #include <linux/mfd/syscon/atmel-smc.h>
17 #include <linux/init.h>
18 #include <linux/of_device.h>
19 #include <linux/regmap.h>
21 struct at91sam9_smc_timings
{
35 struct at91sam9_smc_generic_fields
{
36 struct regmap_field
*setup
;
37 struct regmap_field
*pulse
;
38 struct regmap_field
*cycle
;
39 struct regmap_field
*mode
;
42 struct at91sam9_ebi_dev_config
{
43 struct at91sam9_smc_timings timings
;
47 struct at91_ebi_dev_config
{
50 struct at91sam9_ebi_dev_config sam9
;
57 struct list_head node
;
61 struct at91_ebi_dev_config configs
[];
64 struct at91_ebi_caps
{
65 unsigned int available_cs
;
66 const struct reg_field
*ebi_csa
;
67 void (*get_config
)(struct at91_ebi_dev
*ebid
,
68 struct at91_ebi_dev_config
*conf
);
69 int (*xlate_config
)(struct at91_ebi_dev
*ebid
,
70 struct device_node
*configs_np
,
71 struct at91_ebi_dev_config
*conf
);
72 int (*apply_config
)(struct at91_ebi_dev
*ebid
,
73 struct at91_ebi_dev_config
*conf
);
74 int (*init
)(struct at91_ebi
*ebi
);
80 struct regmap
*matrix
;
82 struct regmap_field
*ebi_csa
;
85 const struct at91_ebi_caps
*caps
;
86 struct list_head devs
;
88 struct at91sam9_smc_generic_fields sam9
;
92 static void at91sam9_ebi_get_config(struct at91_ebi_dev
*ebid
,
93 struct at91_ebi_dev_config
*conf
)
95 struct at91sam9_smc_generic_fields
*fields
= &ebid
->ebi
->sam9
;
96 unsigned int clk_rate
= clk_get_rate(ebid
->ebi
->clk
);
97 struct at91sam9_ebi_dev_config
*config
= &conf
->sam9
;
98 struct at91sam9_smc_timings
*timings
= &config
->timings
;
101 regmap_fields_read(fields
->mode
, conf
->cs
, &val
);
102 config
->mode
= val
& ~AT91_SMC_TDF
;
104 val
= (val
& AT91_SMC_TDF
) >> 16;
105 timings
->tdf_ns
= clk_rate
* val
;
107 regmap_fields_read(fields
->setup
, conf
->cs
, &val
);
108 timings
->ncs_rd_setup_ns
= (val
>> 24) & 0x1f;
109 timings
->ncs_rd_setup_ns
+= ((val
>> 29) & 0x1) * 128;
110 timings
->ncs_rd_setup_ns
*= clk_rate
;
111 timings
->nrd_setup_ns
= (val
>> 16) & 0x1f;
112 timings
->nrd_setup_ns
+= ((val
>> 21) & 0x1) * 128;
113 timings
->nrd_setup_ns
*= clk_rate
;
114 timings
->ncs_wr_setup_ns
= (val
>> 8) & 0x1f;
115 timings
->ncs_wr_setup_ns
+= ((val
>> 13) & 0x1) * 128;
116 timings
->ncs_wr_setup_ns
*= clk_rate
;
117 timings
->nwe_setup_ns
= val
& 0x1f;
118 timings
->nwe_setup_ns
+= ((val
>> 5) & 0x1) * 128;
119 timings
->nwe_setup_ns
*= clk_rate
;
121 regmap_fields_read(fields
->pulse
, conf
->cs
, &val
);
122 timings
->ncs_rd_pulse_ns
= (val
>> 24) & 0x3f;
123 timings
->ncs_rd_pulse_ns
+= ((val
>> 30) & 0x1) * 256;
124 timings
->ncs_rd_pulse_ns
*= clk_rate
;
125 timings
->nrd_pulse_ns
= (val
>> 16) & 0x3f;
126 timings
->nrd_pulse_ns
+= ((val
>> 22) & 0x1) * 256;
127 timings
->nrd_pulse_ns
*= clk_rate
;
128 timings
->ncs_wr_pulse_ns
= (val
>> 8) & 0x3f;
129 timings
->ncs_wr_pulse_ns
+= ((val
>> 14) & 0x1) * 256;
130 timings
->ncs_wr_pulse_ns
*= clk_rate
;
131 timings
->nwe_pulse_ns
= val
& 0x3f;
132 timings
->nwe_pulse_ns
+= ((val
>> 6) & 0x1) * 256;
133 timings
->nwe_pulse_ns
*= clk_rate
;
135 regmap_fields_read(fields
->cycle
, conf
->cs
, &val
);
136 timings
->nrd_cycle_ns
= (val
>> 16) & 0x7f;
137 timings
->nrd_cycle_ns
+= ((val
>> 23) & 0x3) * 256;
138 timings
->nrd_cycle_ns
*= clk_rate
;
139 timings
->nwe_cycle_ns
= val
& 0x7f;
140 timings
->nwe_cycle_ns
+= ((val
>> 7) & 0x3) * 256;
141 timings
->nwe_cycle_ns
*= clk_rate
;
144 static int at91_xlate_timing(struct device_node
*np
, const char *prop
,
145 u32
*val
, bool *required
)
147 if (!of_property_read_u32(np
, prop
, val
)) {
158 static int at91sam9_smc_xslate_timings(struct at91_ebi_dev
*ebid
,
159 struct device_node
*np
,
160 struct at91sam9_smc_timings
*timings
,
165 ret
= at91_xlate_timing(np
, "atmel,smc-ncs-rd-setup-ns",
166 &timings
->ncs_rd_setup_ns
, required
);
170 ret
= at91_xlate_timing(np
, "atmel,smc-nrd-setup-ns",
171 &timings
->nrd_setup_ns
, required
);
175 ret
= at91_xlate_timing(np
, "atmel,smc-ncs-wr-setup-ns",
176 &timings
->ncs_wr_setup_ns
, required
);
180 ret
= at91_xlate_timing(np
, "atmel,smc-nwe-setup-ns",
181 &timings
->nwe_setup_ns
, required
);
185 ret
= at91_xlate_timing(np
, "atmel,smc-ncs-rd-pulse-ns",
186 &timings
->ncs_rd_pulse_ns
, required
);
190 ret
= at91_xlate_timing(np
, "atmel,smc-nrd-pulse-ns",
191 &timings
->nrd_pulse_ns
, required
);
195 ret
= at91_xlate_timing(np
, "atmel,smc-ncs-wr-pulse-ns",
196 &timings
->ncs_wr_pulse_ns
, required
);
200 ret
= at91_xlate_timing(np
, "atmel,smc-nwe-pulse-ns",
201 &timings
->nwe_pulse_ns
, required
);
205 ret
= at91_xlate_timing(np
, "atmel,smc-nwe-cycle-ns",
206 &timings
->nwe_cycle_ns
, required
);
210 ret
= at91_xlate_timing(np
, "atmel,smc-nrd-cycle-ns",
211 &timings
->nrd_cycle_ns
, required
);
215 ret
= at91_xlate_timing(np
, "atmel,smc-tdf-ns",
216 &timings
->tdf_ns
, required
);
220 dev_err(ebid
->ebi
->dev
,
221 "missing or invalid timings definition in %s",
227 static int at91sam9_ebi_xslate_config(struct at91_ebi_dev
*ebid
,
228 struct device_node
*np
,
229 struct at91_ebi_dev_config
*conf
)
231 struct at91sam9_ebi_dev_config
*config
= &conf
->sam9
;
232 bool required
= false;
237 ret
= of_property_read_u32(np
, "atmel,smc-bus-width", &tmp
);
241 config
->mode
|= AT91_SMC_DBW_8
;
245 config
->mode
|= AT91_SMC_DBW_16
;
249 config
->mode
|= AT91_SMC_DBW_32
;
259 if (of_property_read_bool(np
, "atmel,smc-tdf-optimized")) {
260 config
->mode
|= AT91_SMC_TDFMODE_OPTIMIZED
;
265 of_property_read_string(np
, "atmel,smc-byte-access-type", &tmp_str
);
266 if (tmp_str
&& !strcmp(tmp_str
, "write")) {
267 config
->mode
|= AT91_SMC_BAT_WRITE
;
272 of_property_read_string(np
, "atmel,smc-read-mode", &tmp_str
);
273 if (tmp_str
&& !strcmp(tmp_str
, "nrd")) {
274 config
->mode
|= AT91_SMC_READMODE_NRD
;
279 of_property_read_string(np
, "atmel,smc-write-mode", &tmp_str
);
280 if (tmp_str
&& !strcmp(tmp_str
, "nwe")) {
281 config
->mode
|= AT91_SMC_WRITEMODE_NWE
;
286 of_property_read_string(np
, "atmel,smc-exnw-mode", &tmp_str
);
288 if (!strcmp(tmp_str
, "frozen"))
289 config
->mode
|= AT91_SMC_EXNWMODE_FROZEN
;
290 else if (!strcmp(tmp_str
, "ready"))
291 config
->mode
|= AT91_SMC_EXNWMODE_READY
;
292 else if (strcmp(tmp_str
, "disabled"))
298 ret
= of_property_read_u32(np
, "atmel,smc-page-mode", &tmp
);
302 config
->mode
|= AT91_SMC_PS_4
;
306 config
->mode
|= AT91_SMC_PS_8
;
310 config
->mode
|= AT91_SMC_PS_16
;
314 config
->mode
|= AT91_SMC_PS_32
;
321 config
->mode
|= AT91_SMC_PMEN
;
325 ret
= at91sam9_smc_xslate_timings(ebid
, np
, &config
->timings
,
333 static int at91sam9_ebi_apply_config(struct at91_ebi_dev
*ebid
,
334 struct at91_ebi_dev_config
*conf
)
336 unsigned int clk_rate
= clk_get_rate(ebid
->ebi
->clk
);
337 struct at91sam9_ebi_dev_config
*config
= &conf
->sam9
;
338 struct at91sam9_smc_timings
*timings
= &config
->timings
;
339 struct at91sam9_smc_generic_fields
*fields
= &ebid
->ebi
->sam9
;
343 coded_val
= at91sam9_smc_setup_ns_to_cycles(clk_rate
,
344 timings
->ncs_rd_setup_ns
);
345 val
= AT91SAM9_SMC_NCS_NRDSETUP(coded_val
);
346 coded_val
= at91sam9_smc_setup_ns_to_cycles(clk_rate
,
347 timings
->nrd_setup_ns
);
348 val
|= AT91SAM9_SMC_NRDSETUP(coded_val
);
349 coded_val
= at91sam9_smc_setup_ns_to_cycles(clk_rate
,
350 timings
->ncs_wr_setup_ns
);
351 val
|= AT91SAM9_SMC_NCS_WRSETUP(coded_val
);
352 coded_val
= at91sam9_smc_setup_ns_to_cycles(clk_rate
,
353 timings
->nwe_setup_ns
);
354 val
|= AT91SAM9_SMC_NWESETUP(coded_val
);
355 regmap_fields_write(fields
->setup
, conf
->cs
, val
);
357 coded_val
= at91sam9_smc_pulse_ns_to_cycles(clk_rate
,
358 timings
->ncs_rd_pulse_ns
);
359 val
= AT91SAM9_SMC_NCS_NRDPULSE(coded_val
);
360 coded_val
= at91sam9_smc_pulse_ns_to_cycles(clk_rate
,
361 timings
->nrd_pulse_ns
);
362 val
|= AT91SAM9_SMC_NRDPULSE(coded_val
);
363 coded_val
= at91sam9_smc_pulse_ns_to_cycles(clk_rate
,
364 timings
->ncs_wr_pulse_ns
);
365 val
|= AT91SAM9_SMC_NCS_WRPULSE(coded_val
);
366 coded_val
= at91sam9_smc_pulse_ns_to_cycles(clk_rate
,
367 timings
->nwe_pulse_ns
);
368 val
|= AT91SAM9_SMC_NWEPULSE(coded_val
);
369 regmap_fields_write(fields
->pulse
, conf
->cs
, val
);
371 coded_val
= at91sam9_smc_cycle_ns_to_cycles(clk_rate
,
372 timings
->nrd_cycle_ns
);
373 val
= AT91SAM9_SMC_NRDCYCLE(coded_val
);
374 coded_val
= at91sam9_smc_cycle_ns_to_cycles(clk_rate
,
375 timings
->nwe_cycle_ns
);
376 val
|= AT91SAM9_SMC_NWECYCLE(coded_val
);
377 regmap_fields_write(fields
->cycle
, conf
->cs
, val
);
379 val
= DIV_ROUND_UP(timings
->tdf_ns
, clk_rate
);
380 if (val
> AT91_SMC_TDF_MAX
)
381 val
= AT91_SMC_TDF_MAX
;
382 regmap_fields_write(fields
->mode
, conf
->cs
,
383 config
->mode
| AT91_SMC_TDF_(val
));
388 static int at91sam9_ebi_init(struct at91_ebi
*ebi
)
390 struct at91sam9_smc_generic_fields
*fields
= &ebi
->sam9
;
391 struct reg_field field
= REG_FIELD(0, 0, 31);
393 field
.id_size
= fls(ebi
->caps
->available_cs
);
394 field
.id_offset
= AT91SAM9_SMC_GENERIC_BLK_SZ
;
396 field
.reg
= AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC
);
397 fields
->setup
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
398 if (IS_ERR(fields
->setup
))
399 return PTR_ERR(fields
->setup
);
401 field
.reg
= AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC
);
402 fields
->pulse
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
403 if (IS_ERR(fields
->pulse
))
404 return PTR_ERR(fields
->pulse
);
406 field
.reg
= AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC
);
407 fields
->cycle
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
408 if (IS_ERR(fields
->cycle
))
409 return PTR_ERR(fields
->cycle
);
411 field
.reg
= AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC
);
412 fields
->mode
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
413 return PTR_ERR_OR_ZERO(fields
->mode
);
416 static int sama5d3_ebi_init(struct at91_ebi
*ebi
)
418 struct at91sam9_smc_generic_fields
*fields
= &ebi
->sam9
;
419 struct reg_field field
= REG_FIELD(0, 0, 31);
421 field
.id_size
= fls(ebi
->caps
->available_cs
);
422 field
.id_offset
= SAMA5_SMC_GENERIC_BLK_SZ
;
424 field
.reg
= AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC
);
425 fields
->setup
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
426 if (IS_ERR(fields
->setup
))
427 return PTR_ERR(fields
->setup
);
429 field
.reg
= AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC
);
430 fields
->pulse
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
431 if (IS_ERR(fields
->pulse
))
432 return PTR_ERR(fields
->pulse
);
434 field
.reg
= AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC
);
435 fields
->cycle
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
436 if (IS_ERR(fields
->cycle
))
437 return PTR_ERR(fields
->cycle
);
439 field
.reg
= SAMA5_SMC_MODE(SAMA5_SMC_GENERIC
);
440 fields
->mode
= devm_regmap_field_alloc(ebi
->dev
, ebi
->smc
, field
);
441 return PTR_ERR_OR_ZERO(fields
->mode
);
444 static int at91_ebi_dev_setup(struct at91_ebi
*ebi
, struct device_node
*np
,
447 const struct at91_ebi_caps
*caps
= ebi
->caps
;
448 struct at91_ebi_dev_config conf
= { };
449 struct device
*dev
= ebi
->dev
;
450 struct at91_ebi_dev
*ebid
;
451 int ret
, numcs
= 0, i
;
454 numcs
= of_property_count_elems_of_size(np
, "reg",
455 reg_cells
* sizeof(u32
));
457 dev_err(dev
, "invalid reg property in %s\n", np
->full_name
);
461 ebid
= devm_kzalloc(ebi
->dev
,
462 sizeof(*ebid
) + (numcs
* sizeof(*ebid
->configs
)),
469 ret
= caps
->xlate_config(ebid
, np
, &conf
);
475 for (i
= 0; i
< numcs
; i
++) {
478 ret
= of_property_read_u32_index(np
, "reg", i
* reg_cells
,
483 if (cs
> AT91_MATRIX_EBI_NUM_CS
||
484 !(ebi
->caps
->available_cs
& BIT(cs
))) {
485 dev_err(dev
, "invalid reg property in %s\n",
490 ebid
->configs
[i
].cs
= cs
;
494 ret
= caps
->apply_config(ebid
, &conf
);
499 caps
->get_config(ebid
, &ebid
->configs
[i
]);
502 * Attach the EBI device to the generic SMC logic if at least
503 * one "atmel,smc-" property is present.
505 if (ebi
->ebi_csa
&& ret
)
506 regmap_field_update_bits(ebi
->ebi_csa
,
510 list_add_tail(&ebid
->node
, &ebi
->devs
);
515 static const struct reg_field at91sam9260_ebi_csa
=
516 REG_FIELD(AT91SAM9260_MATRIX_EBICSA
, 0,
517 AT91_MATRIX_EBI_NUM_CS
- 1);
519 static const struct at91_ebi_caps at91sam9260_ebi_caps
= {
520 .available_cs
= 0xff,
521 .ebi_csa
= &at91sam9260_ebi_csa
,
522 .get_config
= at91sam9_ebi_get_config
,
523 .xlate_config
= at91sam9_ebi_xslate_config
,
524 .apply_config
= at91sam9_ebi_apply_config
,
525 .init
= at91sam9_ebi_init
,
528 static const struct reg_field at91sam9261_ebi_csa
=
529 REG_FIELD(AT91SAM9261_MATRIX_EBICSA
, 0,
530 AT91_MATRIX_EBI_NUM_CS
- 1);
532 static const struct at91_ebi_caps at91sam9261_ebi_caps
= {
533 .available_cs
= 0xff,
534 .ebi_csa
= &at91sam9261_ebi_csa
,
535 .get_config
= at91sam9_ebi_get_config
,
536 .xlate_config
= at91sam9_ebi_xslate_config
,
537 .apply_config
= at91sam9_ebi_apply_config
,
538 .init
= at91sam9_ebi_init
,
541 static const struct reg_field at91sam9263_ebi0_csa
=
542 REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA
, 0,
543 AT91_MATRIX_EBI_NUM_CS
- 1);
545 static const struct at91_ebi_caps at91sam9263_ebi0_caps
= {
546 .available_cs
= 0x3f,
547 .ebi_csa
= &at91sam9263_ebi0_csa
,
548 .get_config
= at91sam9_ebi_get_config
,
549 .xlate_config
= at91sam9_ebi_xslate_config
,
550 .apply_config
= at91sam9_ebi_apply_config
,
551 .init
= at91sam9_ebi_init
,
554 static const struct reg_field at91sam9263_ebi1_csa
=
555 REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA
, 0,
556 AT91_MATRIX_EBI_NUM_CS
- 1);
558 static const struct at91_ebi_caps at91sam9263_ebi1_caps
= {
560 .ebi_csa
= &at91sam9263_ebi1_csa
,
561 .get_config
= at91sam9_ebi_get_config
,
562 .xlate_config
= at91sam9_ebi_xslate_config
,
563 .apply_config
= at91sam9_ebi_apply_config
,
564 .init
= at91sam9_ebi_init
,
567 static const struct reg_field at91sam9rl_ebi_csa
=
568 REG_FIELD(AT91SAM9RL_MATRIX_EBICSA
, 0,
569 AT91_MATRIX_EBI_NUM_CS
- 1);
571 static const struct at91_ebi_caps at91sam9rl_ebi_caps
= {
572 .available_cs
= 0x3f,
573 .ebi_csa
= &at91sam9rl_ebi_csa
,
574 .get_config
= at91sam9_ebi_get_config
,
575 .xlate_config
= at91sam9_ebi_xslate_config
,
576 .apply_config
= at91sam9_ebi_apply_config
,
577 .init
= at91sam9_ebi_init
,
580 static const struct reg_field at91sam9g45_ebi_csa
=
581 REG_FIELD(AT91SAM9G45_MATRIX_EBICSA
, 0,
582 AT91_MATRIX_EBI_NUM_CS
- 1);
584 static const struct at91_ebi_caps at91sam9g45_ebi_caps
= {
585 .available_cs
= 0x3f,
586 .ebi_csa
= &at91sam9g45_ebi_csa
,
587 .get_config
= at91sam9_ebi_get_config
,
588 .xlate_config
= at91sam9_ebi_xslate_config
,
589 .apply_config
= at91sam9_ebi_apply_config
,
590 .init
= at91sam9_ebi_init
,
593 static const struct at91_ebi_caps at91sam9x5_ebi_caps
= {
594 .available_cs
= 0x3f,
595 .ebi_csa
= &at91sam9263_ebi0_csa
,
596 .get_config
= at91sam9_ebi_get_config
,
597 .xlate_config
= at91sam9_ebi_xslate_config
,
598 .apply_config
= at91sam9_ebi_apply_config
,
599 .init
= at91sam9_ebi_init
,
602 static const struct at91_ebi_caps sama5d3_ebi_caps
= {
604 .get_config
= at91sam9_ebi_get_config
,
605 .xlate_config
= at91sam9_ebi_xslate_config
,
606 .apply_config
= at91sam9_ebi_apply_config
,
607 .init
= sama5d3_ebi_init
,
610 static const struct of_device_id at91_ebi_id_table
[] = {
612 .compatible
= "atmel,at91sam9260-ebi",
613 .data
= &at91sam9260_ebi_caps
,
616 .compatible
= "atmel,at91sam9261-ebi",
617 .data
= &at91sam9261_ebi_caps
,
620 .compatible
= "atmel,at91sam9263-ebi0",
621 .data
= &at91sam9263_ebi0_caps
,
624 .compatible
= "atmel,at91sam9263-ebi1",
625 .data
= &at91sam9263_ebi1_caps
,
628 .compatible
= "atmel,at91sam9rl-ebi",
629 .data
= &at91sam9rl_ebi_caps
,
632 .compatible
= "atmel,at91sam9g45-ebi",
633 .data
= &at91sam9g45_ebi_caps
,
636 .compatible
= "atmel,at91sam9x5-ebi",
637 .data
= &at91sam9x5_ebi_caps
,
640 .compatible
= "atmel,sama5d3-ebi",
641 .data
= &sama5d3_ebi_caps
,
646 static int at91_ebi_dev_disable(struct at91_ebi
*ebi
, struct device_node
*np
)
648 struct device
*dev
= ebi
->dev
;
649 struct property
*newprop
;
651 newprop
= devm_kzalloc(dev
, sizeof(*newprop
), GFP_KERNEL
);
655 newprop
->name
= devm_kstrdup(dev
, "status", GFP_KERNEL
);
659 newprop
->value
= devm_kstrdup(dev
, "disabled", GFP_KERNEL
);
663 newprop
->length
= sizeof("disabled");
665 return of_update_property(np
, newprop
);
668 static int at91_ebi_probe(struct platform_device
*pdev
)
670 struct device
*dev
= &pdev
->dev
;
671 struct device_node
*child
, *np
= dev
->of_node
;
672 const struct of_device_id
*match
;
673 struct at91_ebi
*ebi
;
678 match
= of_match_device(at91_ebi_id_table
, dev
);
679 if (!match
|| !match
->data
)
682 ebi
= devm_kzalloc(dev
, sizeof(*ebi
), GFP_KERNEL
);
686 INIT_LIST_HEAD(&ebi
->devs
);
687 ebi
->caps
= match
->data
;
690 clk
= devm_clk_get(dev
, NULL
);
696 ebi
->smc
= syscon_regmap_lookup_by_phandle(np
, "atmel,smc");
697 if (IS_ERR(ebi
->smc
))
698 return PTR_ERR(ebi
->smc
);
701 * The sama5d3 does not provide an EBICSA register and thus does need
702 * to access the matrix registers.
704 if (ebi
->caps
->ebi_csa
) {
706 syscon_regmap_lookup_by_phandle(np
, "atmel,matrix");
707 if (IS_ERR(ebi
->matrix
))
708 return PTR_ERR(ebi
->matrix
);
710 ebi
->ebi_csa
= regmap_field_alloc(ebi
->matrix
,
711 *ebi
->caps
->ebi_csa
);
712 if (IS_ERR(ebi
->ebi_csa
))
713 return PTR_ERR(ebi
->ebi_csa
);
716 ret
= ebi
->caps
->init(ebi
);
720 ret
= of_property_read_u32(np
, "#address-cells", &val
);
722 dev_err(dev
, "missing #address-cells property\n");
728 ret
= of_property_read_u32(np
, "#size-cells", &val
);
730 dev_err(dev
, "missing #address-cells property\n");
736 for_each_available_child_of_node(np
, child
) {
737 if (!of_find_property(child
, "reg", NULL
))
740 ret
= at91_ebi_dev_setup(ebi
, child
, reg_cells
);
742 dev_err(dev
, "failed to configure EBI bus for %s, disabling the device",
745 ret
= at91_ebi_dev_disable(ebi
, child
);
751 return of_platform_populate(np
, NULL
, NULL
, dev
);
754 static struct platform_driver at91_ebi_driver
= {
757 .of_match_table
= at91_ebi_id_table
,
760 builtin_platform_driver_probe(at91_ebi_driver
, at91_ebi_probe
);