4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * 2006 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/major.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/phy.h>
27 #include <linux/phy_fixed.h>
28 #include <linux/spi/spi.h>
29 #include <linux/fsl_devices.h>
30 #include <linux/fs_enet_pd.h>
31 #include <linux/fs_uart_pd.h>
33 #include <asm/system.h>
34 #include <asm/atomic.h>
39 #include <sysdev/fsl_soc.h>
40 #include <mm/mmu_decl.h>
43 extern void init_fcc_ioports(struct fs_platform_info
*);
44 extern void init_fec_ioports(struct fs_platform_info
*);
45 extern void init_smc_ioports(struct fs_uart_platform_info
*);
46 static phys_addr_t immrbase
= -1;
48 phys_addr_t
get_immrbase(void)
50 struct device_node
*soc
;
55 soc
= of_find_node_by_type(NULL
, "soc");
59 const u32
*prop
= of_get_property(soc
, "#address-cells", &size
);
61 if (prop
&& size
== 4)
66 prop
= of_get_property(soc
, "ranges", &size
);
68 immrbase
= of_translate_address(soc
, prop
+ naddr
);
76 EXPORT_SYMBOL(get_immrbase
);
78 static u32 sysfreq
= -1;
80 u32
fsl_get_sys_freq(void)
82 struct device_node
*soc
;
89 soc
= of_find_node_by_type(NULL
, "soc");
93 prop
= of_get_property(soc
, "clock-frequency", &size
);
94 if (!prop
|| size
!= sizeof(*prop
) || *prop
== 0)
95 prop
= of_get_property(soc
, "bus-frequency", &size
);
97 if (prop
&& size
== sizeof(*prop
))
103 EXPORT_SYMBOL(fsl_get_sys_freq
);
105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
107 static u32 brgfreq
= -1;
109 u32
get_brgfreq(void)
111 struct device_node
*node
;
112 const unsigned int *prop
;
118 node
= of_find_compatible_node(NULL
, NULL
, "fsl,cpm-brg");
120 prop
= of_get_property(node
, "clock-frequency", &size
);
121 if (prop
&& size
== 4)
128 /* Legacy device binding -- will go away when no users are left. */
129 node
= of_find_node_by_type(NULL
, "cpm");
131 node
= of_find_compatible_node(NULL
, NULL
, "fsl,qe");
133 node
= of_find_node_by_type(NULL
, "qe");
136 prop
= of_get_property(node
, "brg-frequency", &size
);
137 if (prop
&& size
== 4)
140 if (brgfreq
== -1 || brgfreq
== 0) {
141 prop
= of_get_property(node
, "bus-frequency", &size
);
142 if (prop
&& size
== 4)
151 EXPORT_SYMBOL(get_brgfreq
);
153 static u32 fs_baudrate
= -1;
155 u32
get_baudrate(void)
157 struct device_node
*node
;
159 if (fs_baudrate
!= -1)
162 node
= of_find_node_by_type(NULL
, "serial");
165 const unsigned int *prop
= of_get_property(node
,
166 "current-speed", &size
);
176 EXPORT_SYMBOL(get_baudrate
);
177 #endif /* CONFIG_CPM2 */
179 #ifdef CONFIG_FIXED_PHY
180 static int __init
of_add_fixed_phys(void)
183 struct device_node
*np
;
185 struct fixed_phy_status status
= {};
187 for_each_node_by_name(np
, "ethernet") {
188 fixed_link
= (u32
*)of_get_property(np
, "fixed-link", NULL
);
193 status
.duplex
= fixed_link
[1];
194 status
.speed
= fixed_link
[2];
195 status
.pause
= fixed_link
[3];
196 status
.asym_pause
= fixed_link
[4];
198 ret
= fixed_phy_add(PHY_POLL
, fixed_link
[0], &status
);
207 arch_initcall(of_add_fixed_phys
);
208 #endif /* CONFIG_FIXED_PHY */
210 static int __init
gfar_mdio_of_init(void)
212 struct device_node
*np
= NULL
;
213 struct platform_device
*mdio_dev
;
217 np
= of_find_compatible_node(np
, NULL
, "fsl,gianfar-mdio");
219 /* try the deprecated version */
221 np
= of_find_compatible_node(np
, "mdio", "gianfar");
225 struct device_node
*child
= NULL
;
226 struct gianfar_mdio_data mdio_data
;
228 memset(&res
, 0, sizeof(res
));
229 memset(&mdio_data
, 0, sizeof(mdio_data
));
231 ret
= of_address_to_resource(np
, 0, &res
);
236 platform_device_register_simple("fsl-gianfar_mdio",
238 if (IS_ERR(mdio_dev
)) {
239 ret
= PTR_ERR(mdio_dev
);
243 for (k
= 0; k
< 32; k
++)
244 mdio_data
.irq
[k
] = PHY_POLL
;
246 while ((child
= of_get_next_child(np
, child
)) != NULL
) {
247 int irq
= irq_of_parse_and_map(child
, 0);
249 const u32
*id
= of_get_property(child
,
251 mdio_data
.irq
[*id
] = irq
;
256 platform_device_add_data(mdio_dev
, &mdio_data
,
257 sizeof(struct gianfar_mdio_data
));
266 platform_device_unregister(mdio_dev
);
272 arch_initcall(gfar_mdio_of_init
);
274 static const char *gfar_tx_intr
= "tx";
275 static const char *gfar_rx_intr
= "rx";
276 static const char *gfar_err_intr
= "error";
278 static int __init
gfar_of_init(void)
280 struct device_node
*np
;
282 struct platform_device
*gfar_dev
;
286 for (np
= NULL
, i
= 0;
287 (np
= of_find_compatible_node(np
, "network", "gianfar")) != NULL
;
289 struct resource r
[4];
290 struct device_node
*phy
, *mdio
;
291 struct gianfar_platform_data gfar_data
;
292 const unsigned int *id
;
295 const void *mac_addr
;
299 memset(r
, 0, sizeof(r
));
300 memset(&gfar_data
, 0, sizeof(gfar_data
));
302 ret
= of_address_to_resource(np
, 0, &r
[0]);
306 of_irq_to_resource(np
, 0, &r
[1]);
308 model
= of_get_property(np
, "model", NULL
);
310 /* If we aren't the FEC we have multiple interrupts */
311 if (model
&& strcasecmp(model
, "FEC")) {
312 r
[1].name
= gfar_tx_intr
;
314 r
[2].name
= gfar_rx_intr
;
315 of_irq_to_resource(np
, 1, &r
[2]);
317 r
[3].name
= gfar_err_intr
;
318 of_irq_to_resource(np
, 2, &r
[3]);
324 platform_device_register_simple("fsl-gianfar", i
, &r
[0],
327 if (IS_ERR(gfar_dev
)) {
328 ret
= PTR_ERR(gfar_dev
);
332 mac_addr
= of_get_mac_address(np
);
334 memcpy(gfar_data
.mac_addr
, mac_addr
, 6);
336 if (model
&& !strcasecmp(model
, "TSEC"))
337 gfar_data
.device_flags
=
338 FSL_GIANFAR_DEV_HAS_GIGABIT
|
339 FSL_GIANFAR_DEV_HAS_COALESCE
|
340 FSL_GIANFAR_DEV_HAS_RMON
|
341 FSL_GIANFAR_DEV_HAS_MULTI_INTR
;
342 if (model
&& !strcasecmp(model
, "eTSEC"))
343 gfar_data
.device_flags
=
344 FSL_GIANFAR_DEV_HAS_GIGABIT
|
345 FSL_GIANFAR_DEV_HAS_COALESCE
|
346 FSL_GIANFAR_DEV_HAS_RMON
|
347 FSL_GIANFAR_DEV_HAS_MULTI_INTR
|
348 FSL_GIANFAR_DEV_HAS_CSUM
|
349 FSL_GIANFAR_DEV_HAS_VLAN
|
350 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH
;
352 ctype
= of_get_property(np
, "phy-connection-type", NULL
);
354 /* We only care about rgmii-id. The rest are autodetected */
355 if (ctype
&& !strcmp(ctype
, "rgmii-id"))
356 gfar_data
.interface
= PHY_INTERFACE_MODE_RGMII_ID
;
358 gfar_data
.interface
= PHY_INTERFACE_MODE_MII
;
360 ph
= of_get_property(np
, "phy-handle", NULL
);
364 fixed_link
= (u32
*)of_get_property(np
, "fixed-link",
371 snprintf(gfar_data
.bus_id
, MII_BUS_ID_SIZE
, "0");
372 gfar_data
.phy_id
= fixed_link
[0];
374 phy
= of_find_node_by_phandle(*ph
);
381 mdio
= of_get_parent(phy
);
383 id
= of_get_property(phy
, "reg", NULL
);
384 ret
= of_address_to_resource(mdio
, 0, &res
);
391 gfar_data
.phy_id
= *id
;
392 snprintf(gfar_data
.bus_id
, MII_BUS_ID_SIZE
, "%llx",
393 (unsigned long long)res
.start
);
400 platform_device_add_data(gfar_dev
, &gfar_data
,
402 gianfar_platform_data
));
410 platform_device_unregister(gfar_dev
);
415 arch_initcall(gfar_of_init
);
417 #ifdef CONFIG_I2C_BOARDINFO
418 #include <linux/i2c.h>
419 struct i2c_driver_device
{
424 static struct i2c_driver_device i2c_devices
[] __initdata
= {
425 {"ricoh,rs5c372a", "rs5c372a"},
426 {"ricoh,rs5c372b", "rs5c372b"},
427 {"ricoh,rv5c386", "rv5c386"},
428 {"ricoh,rv5c387a", "rv5c387a"},
429 {"dallas,ds1307", "ds1307"},
430 {"dallas,ds1337", "ds1337"},
431 {"dallas,ds1338", "ds1338"},
432 {"dallas,ds1339", "ds1339"},
433 {"dallas,ds1340", "ds1340"},
434 {"stm,m41t00", "m41t00"},
435 {"dallas,ds1374", "ds1374"},
438 static int __init
of_find_i2c_driver(struct device_node
*node
,
439 struct i2c_board_info
*info
)
443 for (i
= 0; i
< ARRAY_SIZE(i2c_devices
); i
++) {
444 if (!of_device_is_compatible(node
, i2c_devices
[i
].of_device
))
446 if (strlcpy(info
->type
, i2c_devices
[i
].i2c_type
,
447 I2C_NAME_SIZE
) >= I2C_NAME_SIZE
)
454 static void __init
of_register_i2c_devices(struct device_node
*adap_node
,
457 struct device_node
*node
= NULL
;
459 while ((node
= of_get_next_child(adap_node
, node
))) {
460 struct i2c_board_info info
= {};
464 addr
= of_get_property(node
, "reg", &len
);
465 if (!addr
|| len
< sizeof(int) || *addr
> (1 << 10) - 1) {
466 printk(KERN_WARNING
"fsl_soc.c: invalid i2c device entry\n");
470 info
.irq
= irq_of_parse_and_map(node
, 0);
471 if (info
.irq
== NO_IRQ
)
474 if (of_find_i2c_driver(node
, &info
) < 0)
479 i2c_register_board_info(bus_num
, &info
, 1);
483 static int __init
fsl_i2c_of_init(void)
485 struct device_node
*np
;
487 struct platform_device
*i2c_dev
;
490 for_each_compatible_node(np
, NULL
, "fsl-i2c") {
491 struct resource r
[2];
492 struct fsl_i2c_platform_data i2c_data
;
493 const unsigned char *flags
= NULL
;
495 memset(&r
, 0, sizeof(r
));
496 memset(&i2c_data
, 0, sizeof(i2c_data
));
498 ret
= of_address_to_resource(np
, 0, &r
[0]);
502 of_irq_to_resource(np
, 0, &r
[1]);
504 i2c_dev
= platform_device_register_simple("fsl-i2c", i
, r
, 2);
505 if (IS_ERR(i2c_dev
)) {
506 ret
= PTR_ERR(i2c_dev
);
510 i2c_data
.device_flags
= 0;
511 flags
= of_get_property(np
, "dfsrr", NULL
);
513 i2c_data
.device_flags
|= FSL_I2C_DEV_SEPARATE_DFSRR
;
515 flags
= of_get_property(np
, "fsl5200-clocking", NULL
);
517 i2c_data
.device_flags
|= FSL_I2C_DEV_CLOCK_5200
;
520 platform_device_add_data(i2c_dev
, &i2c_data
,
522 fsl_i2c_platform_data
));
526 of_register_i2c_devices(np
, i
++);
532 platform_device_unregister(i2c_dev
);
537 arch_initcall(fsl_i2c_of_init
);
540 #ifdef CONFIG_PPC_83xx
541 static int __init
mpc83xx_wdt_init(void)
544 struct device_node
*np
;
545 struct platform_device
*dev
;
546 u32 freq
= fsl_get_sys_freq();
549 np
= of_find_compatible_node(NULL
, "watchdog", "mpc83xx_wdt");
556 memset(&r
, 0, sizeof(r
));
558 ret
= of_address_to_resource(np
, 0, &r
);
562 dev
= platform_device_register_simple("mpc83xx_wdt", 0, &r
, 1);
568 ret
= platform_device_add_data(dev
, &freq
, sizeof(freq
));
576 platform_device_unregister(dev
);
583 arch_initcall(mpc83xx_wdt_init
);
586 static enum fsl_usb2_phy_modes
determine_usb_phy(const char *phy_type
)
589 return FSL_USB2_PHY_NONE
;
590 if (!strcasecmp(phy_type
, "ulpi"))
591 return FSL_USB2_PHY_ULPI
;
592 if (!strcasecmp(phy_type
, "utmi"))
593 return FSL_USB2_PHY_UTMI
;
594 if (!strcasecmp(phy_type
, "utmi_wide"))
595 return FSL_USB2_PHY_UTMI_WIDE
;
596 if (!strcasecmp(phy_type
, "serial"))
597 return FSL_USB2_PHY_SERIAL
;
599 return FSL_USB2_PHY_NONE
;
602 static int __init
fsl_usb_of_init(void)
604 struct device_node
*np
;
606 struct platform_device
*usb_dev_mph
= NULL
, *usb_dev_dr_host
= NULL
,
607 *usb_dev_dr_client
= NULL
;
610 for_each_compatible_node(np
, NULL
, "fsl-usb2-mph") {
611 struct resource r
[2];
612 struct fsl_usb2_platform_data usb_data
;
613 const unsigned char *prop
= NULL
;
615 memset(&r
, 0, sizeof(r
));
616 memset(&usb_data
, 0, sizeof(usb_data
));
618 ret
= of_address_to_resource(np
, 0, &r
[0]);
622 of_irq_to_resource(np
, 0, &r
[1]);
625 platform_device_register_simple("fsl-ehci", i
, r
, 2);
626 if (IS_ERR(usb_dev_mph
)) {
627 ret
= PTR_ERR(usb_dev_mph
);
631 usb_dev_mph
->dev
.coherent_dma_mask
= 0xffffffffUL
;
632 usb_dev_mph
->dev
.dma_mask
= &usb_dev_mph
->dev
.coherent_dma_mask
;
634 usb_data
.operating_mode
= FSL_USB2_MPH_HOST
;
636 prop
= of_get_property(np
, "port0", NULL
);
638 usb_data
.port_enables
|= FSL_USB2_PORT0_ENABLED
;
640 prop
= of_get_property(np
, "port1", NULL
);
642 usb_data
.port_enables
|= FSL_USB2_PORT1_ENABLED
;
644 prop
= of_get_property(np
, "phy_type", NULL
);
645 usb_data
.phy_mode
= determine_usb_phy(prop
);
648 platform_device_add_data(usb_dev_mph
, &usb_data
,
650 fsl_usb2_platform_data
));
656 for_each_compatible_node(np
, NULL
, "fsl-usb2-dr") {
657 struct resource r
[2];
658 struct fsl_usb2_platform_data usb_data
;
659 const unsigned char *prop
= NULL
;
661 memset(&r
, 0, sizeof(r
));
662 memset(&usb_data
, 0, sizeof(usb_data
));
664 ret
= of_address_to_resource(np
, 0, &r
[0]);
668 of_irq_to_resource(np
, 0, &r
[1]);
670 prop
= of_get_property(np
, "dr_mode", NULL
);
672 if (!prop
|| !strcmp(prop
, "host")) {
673 usb_data
.operating_mode
= FSL_USB2_DR_HOST
;
674 usb_dev_dr_host
= platform_device_register_simple(
675 "fsl-ehci", i
, r
, 2);
676 if (IS_ERR(usb_dev_dr_host
)) {
677 ret
= PTR_ERR(usb_dev_dr_host
);
680 } else if (prop
&& !strcmp(prop
, "peripheral")) {
681 usb_data
.operating_mode
= FSL_USB2_DR_DEVICE
;
682 usb_dev_dr_client
= platform_device_register_simple(
683 "fsl-usb2-udc", i
, r
, 2);
684 if (IS_ERR(usb_dev_dr_client
)) {
685 ret
= PTR_ERR(usb_dev_dr_client
);
688 } else if (prop
&& !strcmp(prop
, "otg")) {
689 usb_data
.operating_mode
= FSL_USB2_DR_OTG
;
690 usb_dev_dr_host
= platform_device_register_simple(
691 "fsl-ehci", i
, r
, 2);
692 if (IS_ERR(usb_dev_dr_host
)) {
693 ret
= PTR_ERR(usb_dev_dr_host
);
696 usb_dev_dr_client
= platform_device_register_simple(
697 "fsl-usb2-udc", i
, r
, 2);
698 if (IS_ERR(usb_dev_dr_client
)) {
699 ret
= PTR_ERR(usb_dev_dr_client
);
707 prop
= of_get_property(np
, "phy_type", NULL
);
708 usb_data
.phy_mode
= determine_usb_phy(prop
);
710 if (usb_dev_dr_host
) {
711 usb_dev_dr_host
->dev
.coherent_dma_mask
= 0xffffffffUL
;
712 usb_dev_dr_host
->dev
.dma_mask
= &usb_dev_dr_host
->
713 dev
.coherent_dma_mask
;
714 if ((ret
= platform_device_add_data(usb_dev_dr_host
,
715 &usb_data
, sizeof(struct
716 fsl_usb2_platform_data
))))
719 if (usb_dev_dr_client
) {
720 usb_dev_dr_client
->dev
.coherent_dma_mask
= 0xffffffffUL
;
721 usb_dev_dr_client
->dev
.dma_mask
= &usb_dev_dr_client
->
722 dev
.coherent_dma_mask
;
723 if ((ret
= platform_device_add_data(usb_dev_dr_client
,
724 &usb_data
, sizeof(struct
725 fsl_usb2_platform_data
))))
734 platform_device_unregister(usb_dev_dr_host
);
735 if (usb_dev_dr_client
)
736 platform_device_unregister(usb_dev_dr_client
);
739 platform_device_unregister(usb_dev_mph
);
744 arch_initcall(fsl_usb_of_init
);
746 static int __init
of_fsl_spi_probe(char *type
, char *compatible
, u32 sysclk
,
747 struct spi_board_info
*board_infos
,
748 unsigned int num_board_infos
,
749 void (*activate_cs
)(u8 cs
, u8 polarity
),
750 void (*deactivate_cs
)(u8 cs
, u8 polarity
))
752 struct device_node
*np
;
755 for_each_compatible_node(np
, type
, compatible
) {
759 struct resource res
[2];
760 struct platform_device
*pdev
;
761 struct fsl_spi_platform_data pdata
= {
762 .activate_cs
= activate_cs
,
763 .deactivate_cs
= deactivate_cs
,
766 memset(res
, 0, sizeof(res
));
768 pdata
.sysclk
= sysclk
;
770 prop
= of_get_property(np
, "reg", NULL
);
773 pdata
.bus_num
= *(u32
*)prop
;
775 prop
= of_get_property(np
, "cell-index", NULL
);
779 prop
= of_get_property(np
, "mode", NULL
);
780 if (prop
&& !strcmp(prop
, "cpu-qe"))
783 for (j
= 0; j
< num_board_infos
; j
++) {
784 if (board_infos
[j
].bus_num
== pdata
.bus_num
)
785 pdata
.max_chipselect
++;
788 if (!pdata
.max_chipselect
)
791 ret
= of_address_to_resource(np
, 0, &res
[0]);
795 ret
= of_irq_to_resource(np
, 0, &res
[1]);
799 pdev
= platform_device_alloc("mpc83xx_spi", i
);
803 ret
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
807 ret
= platform_device_add_resources(pdev
, res
,
812 ret
= platform_device_add(pdev
);
818 platform_device_del(pdev
);
820 pr_err("%s: registration failed\n", np
->full_name
);
828 int __init
fsl_spi_init(struct spi_board_info
*board_infos
,
829 unsigned int num_board_infos
,
830 void (*activate_cs
)(u8 cs
, u8 polarity
),
831 void (*deactivate_cs
)(u8 cs
, u8 polarity
))
836 #ifdef CONFIG_QUICC_ENGINE
837 /* SPI controller is either clocked from QE or SoC clock */
838 sysclk
= get_brgfreq();
841 sysclk
= fsl_get_sys_freq();
846 ret
= of_fsl_spi_probe(NULL
, "fsl,spi", sysclk
, board_infos
,
847 num_board_infos
, activate_cs
, deactivate_cs
);
849 of_fsl_spi_probe("spi", "fsl_spi", sysclk
, board_infos
,
850 num_board_infos
, activate_cs
, deactivate_cs
);
852 return spi_register_board_info(board_infos
, num_board_infos
);
855 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
856 static __be32 __iomem
*rstcr
;
858 static int __init
setup_rstcr(void)
860 struct device_node
*np
;
861 np
= of_find_node_by_name(NULL
, "global-utilities");
862 if ((np
&& of_get_property(np
, "fsl,has-rstcr", NULL
))) {
863 const u32
*prop
= of_get_property(np
, "reg", NULL
);
865 /* map reset control register
866 * 0xE00B0 is offset of reset control register
868 rstcr
= ioremap(get_immrbase() + *prop
+ 0xB0, 0xff);
870 printk (KERN_EMERG
"Error: reset control "
871 "register not mapped!\n");
874 printk (KERN_INFO
"rstcr compatible register does not exist!\n");
880 arch_initcall(setup_rstcr
);
882 void fsl_rstcr_restart(char *cmd
)
886 /* set reset control register */
887 out_be32(rstcr
, 0x2); /* HRESET_REQ */
893 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
894 struct platform_diu_data_ops diu_ops
= {
895 .diu_size
= 1280 * 1024 * 4, /* default one 1280x1024 buffer */
897 EXPORT_SYMBOL(diu_ops
);
899 int __init
preallocate_diu_videomemory(void)
901 pr_debug("diu_size=%lu\n", diu_ops
.diu_size
);
903 diu_ops
.diu_mem
= __alloc_bootmem(diu_ops
.diu_size
, 8, 0);
904 if (!diu_ops
.diu_mem
) {
905 printk(KERN_ERR
"fsl-diu: cannot allocate %lu bytes\n",
910 pr_debug("diu_mem=%p\n", diu_ops
.diu_mem
);
912 rh_init(&diu_ops
.diu_rh_info
, 4096, ARRAY_SIZE(diu_ops
.diu_rh_block
),
913 diu_ops
.diu_rh_block
);
914 return rh_attach_region(&diu_ops
.diu_rh_info
,
915 (unsigned long) diu_ops
.diu_mem
,
919 static int __init
early_parse_diufb(char *p
)
924 diu_ops
.diu_size
= _ALIGN_UP(memparse(p
, &p
), 8);
926 pr_debug("diu_size=%lu\n", diu_ops
.diu_size
);
930 early_param("diufb", early_parse_diufb
);