USB: serial: option: reimplement interface masking
[linux/fpc-iii.git] / arch / arm / include / asm / hardware / ioc.h
blob1f6b8013becb4c58618790983d9a93f721112c9c
1 /*
2 * arch/arm/include/asm/hardware/ioc.h
4 * Copyright (C) Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Use these macros to read/write the IOC. All it does is perform the actual
11 * read/write.
13 #ifndef __ASMARM_HARDWARE_IOC_H
14 #define __ASMARM_HARDWARE_IOC_H
16 #ifndef __ASSEMBLY__
19 * We use __raw_base variants here so that we give the compiler the
20 * chance to keep IOC_BASE in a register.
22 #define ioc_readb(off) __raw_readb(IOC_BASE + (off))
23 #define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off))
25 #endif
27 #define IOC_CONTROL (0x00)
28 #define IOC_KARTTX (0x04)
29 #define IOC_KARTRX (0x04)
31 #define IOC_IRQSTATA (0x10)
32 #define IOC_IRQREQA (0x14)
33 #define IOC_IRQCLRA (0x14)
34 #define IOC_IRQMASKA (0x18)
36 #define IOC_IRQSTATB (0x20)
37 #define IOC_IRQREQB (0x24)
38 #define IOC_IRQMASKB (0x28)
40 #define IOC_FIQSTAT (0x30)
41 #define IOC_FIQREQ (0x34)
42 #define IOC_FIQMASK (0x38)
44 #define IOC_T0CNTL (0x40)
45 #define IOC_T0LTCHL (0x40)
46 #define IOC_T0CNTH (0x44)
47 #define IOC_T0LTCHH (0x44)
48 #define IOC_T0GO (0x48)
49 #define IOC_T0LATCH (0x4c)
51 #define IOC_T1CNTL (0x50)
52 #define IOC_T1LTCHL (0x50)
53 #define IOC_T1CNTH (0x54)
54 #define IOC_T1LTCHH (0x54)
55 #define IOC_T1GO (0x58)
56 #define IOC_T1LATCH (0x5c)
58 #define IOC_T2CNTL (0x60)
59 #define IOC_T2LTCHL (0x60)
60 #define IOC_T2CNTH (0x64)
61 #define IOC_T2LTCHH (0x64)
62 #define IOC_T2GO (0x68)
63 #define IOC_T2LATCH (0x6c)
65 #define IOC_T3CNTL (0x70)
66 #define IOC_T3LTCHL (0x70)
67 #define IOC_T3CNTH (0x74)
68 #define IOC_T3LTCHH (0x74)
69 #define IOC_T3GO (0x78)
70 #define IOC_T3LATCH (0x7c)
72 #endif