arch/arm/kernel/suspend.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/init.h>
   3 #include <linux/slab.h>
   4 #include <linux/mm_types.h>
   5
   6 #include <asm/cacheflush.h>
   7 #include <asm/idmap.h>
   8 #include <asm/pgalloc.h>
   9 #include <asm/pgtable.h>
  10 #include <asm/memory.h>
  11 #include <asm/smp_plat.h>
  12 #include <asm/suspend.h>
  13 #include <asm/tlbflush.h>
  14
  15 extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
  16 extern void cpu_resume_mmu(void);
  17
  18 #ifdef CONFIG_MMU
  19 int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
  20 {
  21         struct mm_struct *mm = current->active_mm;
  22         u32 __mpidr = cpu_logical_map(smp_processor_id());
  23         int ret;
  24
  25         if (!idmap_pgd)
  26                 return -EINVAL;
  27
  28         /*
  29          * Provide a temporary page table with an identity mapping for
  30          * the MMU-enable code, required for resuming.  On successful
  31          * resume (indicated by a zero return code), we need to switch
  32          * back to the correct page tables.
  33          */
  34         ret = __cpu_suspend(arg, fn, __mpidr);
  35         if (ret == 0) {
  36                 cpu_switch_mm(mm->pgd, mm);
  37                 local_flush_bp_all();
  38                 local_flush_tlb_all();
  39         }
  40
  41         return ret;
  42 }
  43 #else
  44 int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
  45 {
  46         u32 __mpidr = cpu_logical_map(smp_processor_id());
  47         return __cpu_suspend(arg, fn, __mpidr);
  48 }
  49 #define idmap_pgd       NULL
  50 #endif
  51
  52 /*
  53  * This is called by __cpu_suspend() to save the state, and do whatever
  54  * flushing is required to ensure that when the CPU goes to sleep we have
  55  * the necessary data available when the caches are not searched.
  56  */
  57 void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
  58 {
  59         u32 *ctx = ptr;
  60
  61         *save_ptr = virt_to_phys(ptr);
  62
  63         /* This must correspond to the LDM in cpu_resume() assembly */
  64         *ptr++ = virt_to_phys(idmap_pgd);
  65         *ptr++ = sp;
  66         *ptr++ = virt_to_phys(cpu_do_resume);
  67
  68         cpu_do_suspend(ptr);
  69
  70         flush_cache_louis();
  71
  72         /*
  73          * flush_cache_louis does not guarantee that
  74          * save_ptr and ptr are cleaned to main memory,
  75          * just up to the Level of Unification Inner Shareable.
  76          * Since the context pointer and context itself
  77          * are to be retrieved with the MMU off that
  78          * data must be cleaned from all cache levels
  79          * to main memory using "area" cache primitives.
  80         */
  81         __cpuc_flush_dcache_area(ctx, ptrsz);
  82         __cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
  83
  84         outer_clean_range(*save_ptr, *save_ptr + ptrsz);
  85         outer_clean_range(virt_to_phys(save_ptr),
  86                           virt_to_phys(save_ptr) + sizeof(*save_ptr));
  87 }
  88
  89 extern struct sleep_save_sp sleep_save_sp;
  90
  91 static int cpu_suspend_alloc_sp(void)
  92 {
  93         void *ctx_ptr;
  94         /* ctx_ptr is an array of physical addresses */
  95         ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
  96
  97         if (WARN_ON(!ctx_ptr))
  98                 return -ENOMEM;
  99         sleep_save_sp.save_ptr_stash = ctx_ptr;
 100         sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
 101         sync_cache_w(&sleep_save_sp);
 102         return 0;
 103 }
 104 early_initcall(cpu_suspend_alloc_sp);