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x86/amd-iommu: Add per IOMMU reference counting
[linux/fpc-iii.git] / drivers / i2c / busses / i2c-imx.c
blobe3654d683e157bd6accbc486cd864ad8cb12f919
1 /*
2 * Copyright (C) 2002 Motorola GSG-China
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
17 * USA.
18 *
19 * Author:
20 * Darius Augulis, Teltonika Inc.
21 *
22 * Desc.:
23 * Implementation of I2C Adapter/Algorithm Driver
24 * for I2C Bus integrated in Freescale i.MX/MXC processors
25 *
26 * Derived from Motorola GSG China I2C example driver
27 *
28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
30 * Copyright (C) 2007 RightHand Technologies, Inc.
31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
32 *
33 */
34
35 /** Includes *******************************************************************
36 *******************************************************************************/
37
38 #include <linux/init.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/errno.h>
42 #include <linux/err.h>
43 #include <linux/interrupt.h>
44 #include <linux/delay.h>
45 #include <linux/i2c.h>
46 #include <linux/io.h>
47 #include <linux/sched.h>
48 #include <linux/platform_device.h>
49 #include <linux/clk.h>
50
51 #include <mach/irqs.h>
52 #include <mach/hardware.h>
53 #include <mach/i2c.h>
54
55 /** Defines ********************************************************************
56 *******************************************************************************/
57
58 /* This will be the driver name the kernel reports */
59 #define DRIVER_NAME "imx-i2c"
60
61 /* Default value */
62 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */
63
64 /* IMX I2C registers */
65 #define IMX_I2C_IADR 0x00 /* i2c slave address */
66 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */
67 #define IMX_I2C_I2CR 0x08 /* i2c control */
68 #define IMX_I2C_I2SR 0x0C /* i2c status */
69 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */
70
71 /* Bits of IMX I2C registers */
72 #define I2SR_RXAK 0x01
73 #define I2SR_IIF 0x02
74 #define I2SR_SRW 0x04
75 #define I2SR_IAL 0x10
76 #define I2SR_IBB 0x20
77 #define I2SR_IAAS 0x40
78 #define I2SR_ICF 0x80
79 #define I2CR_RSTA 0x04
80 #define I2CR_TXAK 0x08
81 #define I2CR_MTX 0x10
82 #define I2CR_MSTA 0x20
83 #define I2CR_IIEN 0x40
84 #define I2CR_IEN 0x80
85
86 /** Variables ******************************************************************
87 *******************************************************************************/
88
89 /*
90 * sorted list of clock divider, register value pairs
91 * taken from table 26-5, p.26-9, Freescale i.MX
92 * Integrated Portable System Processor Reference Manual
93 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
94 *
95 * Duplicated divider values removed from list
96 */
97
98 static u16 __initdata i2c_clk_div[50][2] = {
99 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 },
100 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 },
101 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 },
102 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B },
103 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A },
104 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 },
105 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 },
106 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 },
107 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 },
108 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B },
109 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E },
110 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
111 { 3072, 0x1E }, { 3840, 0x1F }
112 };
113
114 struct imx_i2c_struct {
115 struct i2c_adapter adapter;
116 struct resource *res;
117 struct clk *clk;
118 void __iomem *base;
119 int irq;
120 wait_queue_head_t queue;
121 unsigned long i2csr;
122 unsigned int disable_delay;
123 int stopped;
124 unsigned int ifdr; /* IMX_I2C_IFDR */
125 };
126
127 /** Functions for IMX I2C adapter driver ***************************************
128 *******************************************************************************/
129
130 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
131 {
132 unsigned long orig_jiffies = jiffies;
133 unsigned int temp;
134
135 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
136
137 while (1) {
138 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
139 if (for_busy && (temp & I2SR_IBB))
140 break;
141 if (!for_busy && !(temp & I2SR_IBB))
142 break;
143 if (signal_pending(current)) {
144 dev_dbg(&i2c_imx->adapter.dev,
145 "<%s> I2C Interrupted\n", __func__);
146 return -EINTR;
147 }
148 if (time_after(jiffies, orig_jiffies + HZ / 1000)) {
149 dev_dbg(&i2c_imx->adapter.dev,
150 "<%s> I2C bus is busy\n", __func__);
151 return -EIO;
152 }
153 schedule();
154 }
155
156 return 0;
157 }
158
159 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
160 {
161 int result;
162
163 result = wait_event_interruptible_timeout(i2c_imx->queue,
164 i2c_imx->i2csr & I2SR_IIF, HZ / 10);
165
166 if (unlikely(result < 0)) {
167 dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
168 return result;
169 } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
170 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
171 return -ETIMEDOUT;
172 }
173 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
174 i2c_imx->i2csr = 0;
175 return 0;
176 }
177
178 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
179 {
180 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
181 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
182 return -EIO; /* No ACK */
183 }
184
185 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
186 return 0;
187 }
188
189 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
190 {
191 unsigned int temp = 0;
192 int result;
193
194 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
195
196 clk_enable(i2c_imx->clk);
197 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
198 /* Enable I2C controller */
199 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
200 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
201
202 /* Wait controller to be stable */
203 udelay(50);
204
205 /* Start I2C transaction */
206 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
207 temp |= I2CR_MSTA;
208 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
209 result = i2c_imx_bus_busy(i2c_imx, 1);
210 if (result)
211 return result;
212 i2c_imx->stopped = 0;
213
214 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
215 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
216 return result;
217 }
218
219 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
220 {
221 unsigned int temp = 0;
222
223 if (!i2c_imx->stopped) {
224 /* Stop I2C transaction */
225 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
226 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
227 temp &= ~(I2CR_MSTA | I2CR_MTX);
228 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
229 i2c_imx->stopped = 1;
230 }
231 if (cpu_is_mx1()) {
232 /*
233 * This delay caused by an i.MXL hardware bug.
234 * If no (or too short) delay, no "STOP" bit will be generated.
235 */
236 udelay(i2c_imx->disable_delay);
237 }
238
239 if (!i2c_imx->stopped)
240 i2c_imx_bus_busy(i2c_imx, 0);
241
242 /* Disable I2C controller */
243 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
244 clk_disable(i2c_imx->clk);
245 }
246
247 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
248 unsigned int rate)
249 {
250 unsigned int i2c_clk_rate;
251 unsigned int div;
252 int i;
253
254 /* Divider value calculation */
255 i2c_clk_rate = clk_get_rate(i2c_imx->clk);
256 div = (i2c_clk_rate + rate - 1) / rate;
257 if (div < i2c_clk_div[0][0])
258 i = 0;
259 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
260 i = ARRAY_SIZE(i2c_clk_div) - 1;
261 else
262 for (i = 0; i2c_clk_div[i][0] < div; i++);
263
264 /* Store divider value */
265 i2c_imx->ifdr = i2c_clk_div[i][1];
266
267 /*
268 * There dummy delay is calculated.
269 * It should be about one I2C clock period long.
270 * This delay is used in I2C bus disable function
271 * to fix chip hardware bug.
272 */
273 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0]
274 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
275
276 /* dev_dbg() can't be used, because adapter is not yet registered */
277 #ifdef CONFIG_I2C_DEBUG_BUS
278 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n",
279 __func__, i2c_clk_rate, div);
280 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
281 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
282 #endif
283 }
284
285 static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
286 {
287 struct imx_i2c_struct *i2c_imx = dev_id;
288 unsigned int temp;
289
290 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
291 if (temp & I2SR_IIF) {
292 /* save status register */
293 i2c_imx->i2csr = temp;
294 temp &= ~I2SR_IIF;
295 writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
296 wake_up_interruptible(&i2c_imx->queue);
297 return IRQ_HANDLED;
298 }
299
300 return IRQ_NONE;
301 }
302
303 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
304 {
305 int i, result;
306
307 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
308 __func__, msgs->addr << 1);
309
310 /* write slave address */
311 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
312 result = i2c_imx_trx_complete(i2c_imx);
313 if (result)
314 return result;
315 result = i2c_imx_acked(i2c_imx);
316 if (result)
317 return result;
318 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);
319
320 /* write data */
321 for (i = 0; i < msgs->len; i++) {
322 dev_dbg(&i2c_imx->adapter.dev,
323 "<%s> write byte: B%d=0x%X\n",
324 __func__, i, msgs->buf[i]);
325 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
326 result = i2c_imx_trx_complete(i2c_imx);
327 if (result)
328 return result;
329 result = i2c_imx_acked(i2c_imx);
330 if (result)
331 return result;
332 }
333 return 0;
334 }
335
336 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
337 {
338 int i, result;
339 unsigned int temp;
340
341 dev_dbg(&i2c_imx->adapter.dev,
342 "<%s> write slave address: addr=0x%x\n",
343 __func__, (msgs->addr << 1) | 0x01);
344
345 /* write slave address */
346 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR);
347 result = i2c_imx_trx_complete(i2c_imx);
348 if (result)
349 return result;
350 result = i2c_imx_acked(i2c_imx);
351 if (result)
352 return result;
353
354 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
355
356 /* setup bus to read data */
357 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
358 temp &= ~I2CR_MTX;
359 if (msgs->len - 1)
360 temp &= ~I2CR_TXAK;
361 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
362 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */
363
364 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
365
366 /* read data */
367 for (i = 0; i < msgs->len; i++) {
368 result = i2c_imx_trx_complete(i2c_imx);
369 if (result)
370 return result;
371 if (i == (msgs->len - 1)) {
372 /* It must generate STOP before read I2DR to prevent
373 controller from generating another clock cycle */
374 dev_dbg(&i2c_imx->adapter.dev,
375 "<%s> clear MSTA\n", __func__);
376 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
377 temp &= ~(I2CR_MSTA | I2CR_MTX);
378 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
379 i2c_imx_bus_busy(i2c_imx, 0);
380 i2c_imx->stopped = 1;
381 } else if (i == (msgs->len - 2)) {
382 dev_dbg(&i2c_imx->adapter.dev,
383 "<%s> set TXAK\n", __func__);
384 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
385 temp |= I2CR_TXAK;
386 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
387 }
388 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
389 dev_dbg(&i2c_imx->adapter.dev,
390 "<%s> read byte: B%d=0x%X\n",
391 __func__, i, msgs->buf[i]);
392 }
393 return 0;
394 }
395
396 static int i2c_imx_xfer(struct i2c_adapter *adapter,
397 struct i2c_msg *msgs, int num)
398 {
399 unsigned int i, temp;
400 int result;
401 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
402
403 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
404
405 /* Start I2C transfer */
406 result = i2c_imx_start(i2c_imx);
407 if (result)
408 goto fail0;
409
410 /* read/write data */
411 for (i = 0; i < num; i++) {
412 if (i) {
413 dev_dbg(&i2c_imx->adapter.dev,
414 "<%s> repeated start\n", __func__);
415 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
416 temp |= I2CR_RSTA;
417 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
418 result = i2c_imx_bus_busy(i2c_imx, 1);
419 if (result)
420 goto fail0;
421 }
422 dev_dbg(&i2c_imx->adapter.dev,
423 "<%s> transfer message: %d\n", __func__, i);
424 /* write/read data */
425 #ifdef CONFIG_I2C_DEBUG_BUS
426 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
427 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
428 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
429 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
430 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
431 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
432 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
433 dev_dbg(&i2c_imx->adapter.dev,
434 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
435 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
436 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
437 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
438 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
439 (temp & I2SR_RXAK ? 1 : 0));
440 #endif
441 if (msgs[i].flags & I2C_M_RD)
442 result = i2c_imx_read(i2c_imx, &msgs[i]);
443 else
444 result = i2c_imx_write(i2c_imx, &msgs[i]);
445 }
446
447 fail0:
448 /* Stop I2C transfer */
449 i2c_imx_stop(i2c_imx);
450
451 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
452 (result < 0) ? "error" : "success msg",
453 (result < 0) ? result : num);
454 return (result < 0) ? result : num;
455 }
456
457 static u32 i2c_imx_func(struct i2c_adapter *adapter)
458 {
459 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
460 }
461
462 static struct i2c_algorithm i2c_imx_algo = {
463 .master_xfer = i2c_imx_xfer,
464 .functionality = i2c_imx_func,
465 };
466
467 static int __init i2c_imx_probe(struct platform_device *pdev)
468 {
469 struct imx_i2c_struct *i2c_imx;
470 struct resource *res;
471 struct imxi2c_platform_data *pdata;
472 void __iomem *base;
473 resource_size_t res_size;
474 int irq;
475 int ret;
476
477 dev_dbg(&pdev->dev, "<%s>\n", __func__);
478
479 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
480 if (!res) {
481 dev_err(&pdev->dev, "can't get device resources\n");
482 return -ENOENT;
483 }
484 irq = platform_get_irq(pdev, 0);
485 if (irq < 0) {
486 dev_err(&pdev->dev, "can't get irq number\n");
487 return -ENOENT;
488 }
489
490 pdata = pdev->dev.platform_data;
491
492 if (pdata && pdata->init) {
493 ret = pdata->init(&pdev->dev);
494 if (ret)
495 return ret;
496 }
497
498 res_size = resource_size(res);
499 base = ioremap(res->start, res_size);
500 if (!base) {
501 dev_err(&pdev->dev, "ioremap failed\n");
502 ret = -EIO;
503 goto fail0;
504 }
505
506 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
507 if (!i2c_imx) {
508 dev_err(&pdev->dev, "can't allocate interface\n");
509 ret = -ENOMEM;
510 goto fail1;
511 }
512
513 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
514 ret = -EBUSY;
515 goto fail2;
516 }
517
518 /* Setup i2c_imx driver structure */
519 strcpy(i2c_imx->adapter.name, pdev->name);
520 i2c_imx->adapter.owner = THIS_MODULE;
521 i2c_imx->adapter.algo = &i2c_imx_algo;
522 i2c_imx->adapter.dev.parent = &pdev->dev;
523 i2c_imx->adapter.nr = pdev->id;
524 i2c_imx->irq = irq;
525 i2c_imx->base = base;
526 i2c_imx->res = res;
527
528 /* Get I2C clock */
529 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk");
530 if (IS_ERR(i2c_imx->clk)) {
531 ret = PTR_ERR(i2c_imx->clk);
532 dev_err(&pdev->dev, "can't get I2C clock\n");
533 goto fail3;
534 }
535
536 /* Request IRQ */
537 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
538 if (ret) {
539 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq);
540 goto fail4;
541 }
542
543 /* Init queue */
544 init_waitqueue_head(&i2c_imx->queue);
545
546 /* Set up adapter data */
547 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
548
549 /* Set up clock divider */
550 if (pdata && pdata->bitrate)
551 i2c_imx_set_clk(i2c_imx, pdata->bitrate);
552 else
553 i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE);
554
555 /* Set up chip registers to defaults */
556 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
557 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
558
559 /* Add I2C adapter */
560 ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
561 if (ret < 0) {
562 dev_err(&pdev->dev, "registration failed\n");
563 goto fail5;
564 }
565
566 /* Set up platform driver data */
567 platform_set_drvdata(pdev, i2c_imx);
568
569 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq);
570 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
571 i2c_imx->res->start, i2c_imx->res->end);
572 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n",
573 res_size, i2c_imx->res->start);
574 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
575 i2c_imx->adapter.name);
576 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
577
578 return 0; /* Return OK */
579
580 fail5:
581 free_irq(i2c_imx->irq, i2c_imx);
582 fail4:
583 clk_put(i2c_imx->clk);
584 fail3:
585 release_mem_region(i2c_imx->res->start, resource_size(res));
586 fail2:
587 kfree(i2c_imx);
588 fail1:
589 iounmap(base);
590 fail0:
591 if (pdata && pdata->exit)
592 pdata->exit(&pdev->dev);
593 return ret; /* Return error number */
594 }
595
596 static int __exit i2c_imx_remove(struct platform_device *pdev)
597 {
598 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
599 struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
600
601 /* remove adapter */
602 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
603 i2c_del_adapter(&i2c_imx->adapter);
604 platform_set_drvdata(pdev, NULL);
605
606 /* free interrupt */
607 free_irq(i2c_imx->irq, i2c_imx);
608
609 /* setup chip registers to defaults */
610 writeb(0, i2c_imx->base + IMX_I2C_IADR);
611 writeb(0, i2c_imx->base + IMX_I2C_IFDR);
612 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
613 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
614
615 /* Shut down hardware */
616 if (pdata && pdata->exit)
617 pdata->exit(&pdev->dev);
618
619 clk_put(i2c_imx->clk);
620
621 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
622 iounmap(i2c_imx->base);
623 kfree(i2c_imx);
624 return 0;
625 }
626
627 static struct platform_driver i2c_imx_driver = {
628 .probe = i2c_imx_probe,
629 .remove = __exit_p(i2c_imx_remove),
630 .driver = {
631 .name = DRIVER_NAME,
632 .owner = THIS_MODULE,
633 }
634 };
635
636 static int __init i2c_adap_imx_init(void)
637 {
638 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
639 }
640 subsys_initcall(i2c_adap_imx_init);
641
642 static void __exit i2c_adap_imx_exit(void)
643 {
644 platform_driver_unregister(&i2c_imx_driver);
645 }
646 module_exit(i2c_adap_imx_exit);
647
648 MODULE_LICENSE("GPL");
649 MODULE_AUTHOR("Darius Augulis");
650 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
651 MODULE_ALIAS("platform:" DRIVER_NAME);
Linux with added FPC-III support