x86/amd-iommu: Add per IOMMU reference counting
[linux/fpc-iii.git] / drivers / mfd / mc13783-core.c
blobe354d2912ef13dc11eb059959faec1ebfd5a3430
1 /*
2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
4 * This code is in parts based on wm8350-core.c and pcf50633-core.c
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/mfd/mc13783-private.h>
25 #include <linux/platform_device.h>
26 #include <linux/mfd/mc13783.h>
27 #include <linux/completion.h>
28 #include <linux/interrupt.h>
29 #include <linux/mfd/core.h>
30 #include <linux/spi/spi.h>
31 #include <linux/uaccess.h>
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/slab.h>
36 #include <linux/irq.h>
38 #define MC13783_MAX_REG_NUM 0x3f
39 #define MC13783_FRAME_MASK 0x00ffffff
40 #define MC13783_MAX_REG_NUM 0x3f
41 #define MC13783_REG_NUM_SHIFT 0x19
42 #define MC13783_WRITE_BIT_SHIFT 31
44 static inline int spi_rw(struct spi_device *spi, u8 * buf, size_t len)
46 struct spi_transfer t = {
47 .tx_buf = (const void *)buf,
48 .rx_buf = buf,
49 .len = len,
50 .cs_change = 0,
51 .delay_usecs = 0,
53 struct spi_message m;
55 spi_message_init(&m);
56 spi_message_add_tail(&t, &m);
57 if (spi_sync(spi, &m) != 0 || m.status != 0)
58 return -EINVAL;
59 return len - m.actual_length;
62 static int mc13783_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
64 unsigned int frame = 0;
65 int ret = 0;
67 if (reg_num > MC13783_MAX_REG_NUM)
68 return -EINVAL;
70 frame |= reg_num << MC13783_REG_NUM_SHIFT;
72 ret = spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
74 *reg_val = frame & MC13783_FRAME_MASK;
76 return ret;
79 static int mc13783_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
81 unsigned int frame = 0;
83 if (reg_num > MC13783_MAX_REG_NUM)
84 return -EINVAL;
86 frame |= (1 << MC13783_WRITE_BIT_SHIFT);
87 frame |= reg_num << MC13783_REG_NUM_SHIFT;
88 frame |= reg_val & MC13783_FRAME_MASK;
90 return spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
93 int mc13783_reg_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
95 int ret;
97 mutex_lock(&mc13783->io_lock);
98 ret = mc13783_read(mc13783, reg_num, reg_val);
99 mutex_unlock(&mc13783->io_lock);
101 return ret;
103 EXPORT_SYMBOL_GPL(mc13783_reg_read);
105 int mc13783_reg_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
107 int ret;
109 mutex_lock(&mc13783->io_lock);
110 ret = mc13783_write(mc13783, reg_num, reg_val);
111 mutex_unlock(&mc13783->io_lock);
113 return ret;
115 EXPORT_SYMBOL_GPL(mc13783_reg_write);
118 * mc13783_set_bits - Bitmask write
120 * @mc13783: Pointer to mc13783 control structure
121 * @reg: Register to access
122 * @mask: Mask of bits to change
123 * @val: Value to set for masked bits
125 int mc13783_set_bits(struct mc13783 *mc13783, int reg, u32 mask, u32 val)
127 u32 tmp;
128 int ret;
130 mutex_lock(&mc13783->io_lock);
132 ret = mc13783_read(mc13783, reg, &tmp);
133 tmp = (tmp & ~mask) | val;
134 if (ret == 0)
135 ret = mc13783_write(mc13783, reg, tmp);
137 mutex_unlock(&mc13783->io_lock);
139 return ret;
141 EXPORT_SYMBOL_GPL(mc13783_set_bits);
143 int mc13783_register_irq(struct mc13783 *mc13783, int irq,
144 void (*handler) (int, void *), void *data)
146 if (irq < 0 || irq > MC13783_NUM_IRQ || !handler)
147 return -EINVAL;
149 if (WARN_ON(mc13783->irq_handler[irq].handler))
150 return -EBUSY;
152 mutex_lock(&mc13783->io_lock);
153 mc13783->irq_handler[irq].handler = handler;
154 mc13783->irq_handler[irq].data = data;
155 mutex_unlock(&mc13783->io_lock);
157 return 0;
159 EXPORT_SYMBOL_GPL(mc13783_register_irq);
161 int mc13783_free_irq(struct mc13783 *mc13783, int irq)
163 if (irq < 0 || irq > MC13783_NUM_IRQ)
164 return -EINVAL;
166 mutex_lock(&mc13783->io_lock);
167 mc13783->irq_handler[irq].handler = NULL;
168 mutex_unlock(&mc13783->io_lock);
170 return 0;
172 EXPORT_SYMBOL_GPL(mc13783_free_irq);
174 static void mc13783_irq_work(struct work_struct *work)
176 struct mc13783 *mc13783 = container_of(work, struct mc13783, work);
177 int i;
178 unsigned int adc_sts;
180 /* check if the adc has finished any completion */
181 mc13783_reg_read(mc13783, MC13783_REG_INTERRUPT_STATUS_0, &adc_sts);
182 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0,
183 adc_sts & MC13783_INT_STAT_ADCDONEI);
185 if (adc_sts & MC13783_INT_STAT_ADCDONEI)
186 complete_all(&mc13783->adc_done);
188 for (i = 0; i < MC13783_NUM_IRQ; i++)
189 if (mc13783->irq_handler[i].handler)
190 mc13783->irq_handler[i].handler(i,
191 mc13783->irq_handler[i].data);
192 enable_irq(mc13783->irq);
195 static irqreturn_t mc13783_interrupt(int irq, void *dev_id)
197 struct mc13783 *mc13783 = dev_id;
199 disable_irq_nosync(irq);
201 schedule_work(&mc13783->work);
202 return IRQ_HANDLED;
205 /* set adc to ts interrupt mode, which generates touchscreen wakeup interrupt */
206 static inline void mc13783_adc_set_ts_irq_mode(struct mc13783 *mc13783)
208 unsigned int reg_adc0, reg_adc1;
210 reg_adc0 = MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
211 | MC13783_ADC0_TSMOD0;
212 reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN;
214 mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
215 mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
218 int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
219 unsigned int channel, unsigned int *sample)
221 unsigned int reg_adc0, reg_adc1;
222 int i;
224 mutex_lock(&mc13783->adc_conv_lock);
226 /* set up auto incrementing anyway to make quick read */
227 reg_adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2;
228 /* enable the adc, ignore external triggering and set ASC to trigger
229 * conversion */
230 reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN
231 | MC13783_ADC1_ASC;
233 /* setup channel number */
234 if (channel > 7)
235 reg_adc1 |= MC13783_ADC1_ADSEL;
237 switch (mode) {
238 case MC13783_ADC_MODE_TS:
239 /* enables touch screen reference mode and set touchscreen mode
240 * to position mode */
241 reg_adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
242 | MC13783_ADC0_TSMOD0 | MC13783_ADC0_TSMOD1;
243 reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
244 break;
245 case MC13783_ADC_MODE_SINGLE_CHAN:
246 reg_adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT;
247 reg_adc1 |= MC13783_ADC1_RAND;
248 break;
249 case MC13783_ADC_MODE_MULT_CHAN:
250 reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
251 break;
252 default:
253 return -EINVAL;
256 mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
257 mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
259 wait_for_completion_interruptible(&mc13783->adc_done);
261 for (i = 0; i < 4; i++)
262 mc13783_reg_read(mc13783, MC13783_REG_ADC_2, &sample[i]);
264 if (mc13783->ts_active)
265 mc13783_adc_set_ts_irq_mode(mc13783);
267 mutex_unlock(&mc13783->adc_conv_lock);
269 return 0;
271 EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion);
273 void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status)
275 mc13783->ts_active = status;
277 EXPORT_SYMBOL_GPL(mc13783_adc_set_ts_status);
279 static int mc13783_check_revision(struct mc13783 *mc13783)
281 u32 rev_id, rev1, rev2, finid, icid;
283 mc13783_read(mc13783, MC13783_REG_REVISION, &rev_id);
285 rev1 = (rev_id & 0x018) >> 3;
286 rev2 = (rev_id & 0x007);
287 icid = (rev_id & 0x01C0) >> 6;
288 finid = (rev_id & 0x01E00) >> 9;
290 /* Ver 0.2 is actually 3.2a. Report as 3.2 */
291 if ((rev1 == 0) && (rev2 == 2))
292 rev1 = 3;
294 if (rev1 == 0 || icid != 2) {
295 dev_err(mc13783->dev, "No MC13783 detected.\n");
296 return -ENODEV;
299 mc13783->revision = ((rev1 * 10) + rev2);
300 dev_info(mc13783->dev, "MC13783 Rev %d.%d FinVer %x detected\n", rev1,
301 rev2, finid);
303 return 0;
307 * Register a client device. This is non-fatal since there is no need to
308 * fail the entire device init due to a single platform device failing.
310 static void mc13783_client_dev_register(struct mc13783 *mc13783,
311 const char *name)
313 struct mfd_cell cell = {};
315 cell.name = name;
317 mfd_add_devices(mc13783->dev, -1, &cell, 1, NULL, 0);
320 static int __devinit mc13783_probe(struct spi_device *spi)
322 struct mc13783 *mc13783;
323 struct mc13783_platform_data *pdata = spi->dev.platform_data;
324 int ret;
326 mc13783 = kzalloc(sizeof(struct mc13783), GFP_KERNEL);
327 if (!mc13783)
328 return -ENOMEM;
330 dev_set_drvdata(&spi->dev, mc13783);
331 spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
332 spi->bits_per_word = 32;
333 spi_setup(spi);
335 mc13783->spi_device = spi;
336 mc13783->dev = &spi->dev;
337 mc13783->irq = spi->irq;
339 INIT_WORK(&mc13783->work, mc13783_irq_work);
340 mutex_init(&mc13783->io_lock);
341 mutex_init(&mc13783->adc_conv_lock);
342 init_completion(&mc13783->adc_done);
344 if (pdata) {
345 mc13783->flags = pdata->flags;
346 mc13783->regulators = pdata->regulators;
347 mc13783->num_regulators = pdata->num_regulators;
350 if (mc13783_check_revision(mc13783)) {
351 ret = -ENODEV;
352 goto err_out;
355 /* clear and mask all interrupts */
356 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0, 0x00ffffff);
357 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_0, 0x00ffffff);
358 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_1, 0x00ffffff);
359 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_1, 0x00ffffff);
361 /* unmask adcdone interrupts */
362 mc13783_set_bits(mc13783, MC13783_REG_INTERRUPT_MASK_0,
363 MC13783_INT_MASK_ADCDONEM, 0);
365 ret = request_irq(mc13783->irq, mc13783_interrupt,
366 IRQF_DISABLED | IRQF_TRIGGER_HIGH, "mc13783",
367 mc13783);
368 if (ret)
369 goto err_out;
371 if (mc13783->flags & MC13783_USE_CODEC)
372 mc13783_client_dev_register(mc13783, "mc13783-codec");
373 if (mc13783->flags & MC13783_USE_ADC)
374 mc13783_client_dev_register(mc13783, "mc13783-adc");
375 if (mc13783->flags & MC13783_USE_RTC)
376 mc13783_client_dev_register(mc13783, "mc13783-rtc");
377 if (mc13783->flags & MC13783_USE_REGULATOR)
378 mc13783_client_dev_register(mc13783, "mc13783-regulator");
379 if (mc13783->flags & MC13783_USE_TOUCHSCREEN)
380 mc13783_client_dev_register(mc13783, "mc13783-ts");
382 return 0;
384 err_out:
385 kfree(mc13783);
386 return ret;
389 static int __devexit mc13783_remove(struct spi_device *spi)
391 struct mc13783 *mc13783;
393 mc13783 = dev_get_drvdata(&spi->dev);
395 free_irq(mc13783->irq, mc13783);
397 mfd_remove_devices(&spi->dev);
399 return 0;
402 static struct spi_driver pmic_driver = {
403 .driver = {
404 .name = "mc13783",
405 .bus = &spi_bus_type,
406 .owner = THIS_MODULE,
408 .probe = mc13783_probe,
409 .remove = __devexit_p(mc13783_remove),
412 static int __init pmic_init(void)
414 return spi_register_driver(&pmic_driver);
416 subsys_initcall(pmic_init);
418 static void __exit pmic_exit(void)
420 spi_unregister_driver(&pmic_driver);
422 module_exit(pmic_exit);
424 MODULE_DESCRIPTION("Core/Protocol driver for Freescale MC13783 PMIC");
425 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
426 MODULE_LICENSE("GPL");