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x86/amd-iommu: Add per IOMMU reference counting
[linux/fpc-iii.git] / drivers / net / netxen / netxen_nic_init.c
blobe40b914d6faf7def7bedbb9f309195afc2a61e59
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * Copyright (C) 2009 - QLogic Corporation.
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 * MA 02111-1307, USA.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.
23 *
24 */
25
26 #include <linux/netdevice.h>
27 #include <linux/delay.h>
28 #include "netxen_nic.h"
29 #include "netxen_nic_hw.h"
30
31 struct crb_addr_pair {
32 u32 addr;
33 u32 data;
34 };
35
36 #define NETXEN_MAX_CRB_XFORM 60
37 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
38 #define NETXEN_ADDR_ERROR (0xffffffff)
39
40 #define crb_addr_transform(name) \
41 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
42 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
43
44 #define NETXEN_NIC_XDMA_RESET 0x8000ff
45
46 static void
47 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
48 struct nx_host_rds_ring *rds_ring);
49
50 static void crb_addr_transform_setup(void)
51 {
52 crb_addr_transform(XDMA);
53 crb_addr_transform(TIMR);
54 crb_addr_transform(SRE);
55 crb_addr_transform(SQN3);
56 crb_addr_transform(SQN2);
57 crb_addr_transform(SQN1);
58 crb_addr_transform(SQN0);
59 crb_addr_transform(SQS3);
60 crb_addr_transform(SQS2);
61 crb_addr_transform(SQS1);
62 crb_addr_transform(SQS0);
63 crb_addr_transform(RPMX7);
64 crb_addr_transform(RPMX6);
65 crb_addr_transform(RPMX5);
66 crb_addr_transform(RPMX4);
67 crb_addr_transform(RPMX3);
68 crb_addr_transform(RPMX2);
69 crb_addr_transform(RPMX1);
70 crb_addr_transform(RPMX0);
71 crb_addr_transform(ROMUSB);
72 crb_addr_transform(SN);
73 crb_addr_transform(QMN);
74 crb_addr_transform(QMS);
75 crb_addr_transform(PGNI);
76 crb_addr_transform(PGND);
77 crb_addr_transform(PGN3);
78 crb_addr_transform(PGN2);
79 crb_addr_transform(PGN1);
80 crb_addr_transform(PGN0);
81 crb_addr_transform(PGSI);
82 crb_addr_transform(PGSD);
83 crb_addr_transform(PGS3);
84 crb_addr_transform(PGS2);
85 crb_addr_transform(PGS1);
86 crb_addr_transform(PGS0);
87 crb_addr_transform(PS);
88 crb_addr_transform(PH);
89 crb_addr_transform(NIU);
90 crb_addr_transform(I2Q);
91 crb_addr_transform(EG);
92 crb_addr_transform(MN);
93 crb_addr_transform(MS);
94 crb_addr_transform(CAS2);
95 crb_addr_transform(CAS1);
96 crb_addr_transform(CAS0);
97 crb_addr_transform(CAM);
98 crb_addr_transform(C2C1);
99 crb_addr_transform(C2C0);
100 crb_addr_transform(SMB);
101 crb_addr_transform(OCM0);
102 crb_addr_transform(I2C0);
103 }
104
105 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
106 {
107 struct netxen_recv_context *recv_ctx;
108 struct nx_host_rds_ring *rds_ring;
109 struct netxen_rx_buffer *rx_buf;
110 int i, ring;
111
112 recv_ctx = &adapter->recv_ctx;
113 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
114 rds_ring = &recv_ctx->rds_rings[ring];
115 for (i = 0; i < rds_ring->num_desc; ++i) {
116 rx_buf = &(rds_ring->rx_buf_arr[i]);
117 if (rx_buf->state == NETXEN_BUFFER_FREE)
118 continue;
119 pci_unmap_single(adapter->pdev,
120 rx_buf->dma,
121 rds_ring->dma_size,
122 PCI_DMA_FROMDEVICE);
123 if (rx_buf->skb != NULL)
124 dev_kfree_skb_any(rx_buf->skb);
125 }
126 }
127 }
128
129 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
130 {
131 struct netxen_cmd_buffer *cmd_buf;
132 struct netxen_skb_frag *buffrag;
133 int i, j;
134 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
135
136 cmd_buf = tx_ring->cmd_buf_arr;
137 for (i = 0; i < tx_ring->num_desc; i++) {
138 buffrag = cmd_buf->frag_array;
139 if (buffrag->dma) {
140 pci_unmap_single(adapter->pdev, buffrag->dma,
141 buffrag->length, PCI_DMA_TODEVICE);
142 buffrag->dma = 0ULL;
143 }
144 for (j = 0; j < cmd_buf->frag_count; j++) {
145 buffrag++;
146 if (buffrag->dma) {
147 pci_unmap_page(adapter->pdev, buffrag->dma,
148 buffrag->length,
149 PCI_DMA_TODEVICE);
150 buffrag->dma = 0ULL;
151 }
152 }
153 if (cmd_buf->skb) {
154 dev_kfree_skb_any(cmd_buf->skb);
155 cmd_buf->skb = NULL;
156 }
157 cmd_buf++;
158 }
159 }
160
161 void netxen_free_sw_resources(struct netxen_adapter *adapter)
162 {
163 struct netxen_recv_context *recv_ctx;
164 struct nx_host_rds_ring *rds_ring;
165 struct nx_host_tx_ring *tx_ring;
166 int ring;
167
168 recv_ctx = &adapter->recv_ctx;
169
170 if (recv_ctx->rds_rings == NULL)
171 goto skip_rds;
172
173 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
174 rds_ring = &recv_ctx->rds_rings[ring];
175 vfree(rds_ring->rx_buf_arr);
176 rds_ring->rx_buf_arr = NULL;
177 }
178 kfree(recv_ctx->rds_rings);
179
180 skip_rds:
181 if (adapter->tx_ring == NULL)
182 return;
183
184 tx_ring = adapter->tx_ring;
185 vfree(tx_ring->cmd_buf_arr);
186 }
187
188 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
189 {
190 struct netxen_recv_context *recv_ctx;
191 struct nx_host_rds_ring *rds_ring;
192 struct nx_host_sds_ring *sds_ring;
193 struct nx_host_tx_ring *tx_ring;
194 struct netxen_rx_buffer *rx_buf;
195 int ring, i, size;
196
197 struct netxen_cmd_buffer *cmd_buf_arr;
198 struct net_device *netdev = adapter->netdev;
199 struct pci_dev *pdev = adapter->pdev;
200
201 size = sizeof(struct nx_host_tx_ring);
202 tx_ring = kzalloc(size, GFP_KERNEL);
203 if (tx_ring == NULL) {
204 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
205 netdev->name);
206 return -ENOMEM;
207 }
208 adapter->tx_ring = tx_ring;
209
210 tx_ring->num_desc = adapter->num_txd;
211 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
212
213 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
214 if (cmd_buf_arr == NULL) {
215 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
216 netdev->name);
217 return -ENOMEM;
218 }
219 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
220 tx_ring->cmd_buf_arr = cmd_buf_arr;
221
222 recv_ctx = &adapter->recv_ctx;
223
224 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
225 rds_ring = kzalloc(size, GFP_KERNEL);
226 if (rds_ring == NULL) {
227 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
228 netdev->name);
229 return -ENOMEM;
230 }
231 recv_ctx->rds_rings = rds_ring;
232
233 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
234 rds_ring = &recv_ctx->rds_rings[ring];
235 switch (ring) {
236 case RCV_RING_NORMAL:
237 rds_ring->num_desc = adapter->num_rxd;
238 if (adapter->ahw.cut_through) {
239 rds_ring->dma_size =
240 NX_CT_DEFAULT_RX_BUF_LEN;
241 rds_ring->skb_size =
242 NX_CT_DEFAULT_RX_BUF_LEN;
243 } else {
244 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
245 rds_ring->dma_size =
246 NX_P3_RX_BUF_MAX_LEN;
247 else
248 rds_ring->dma_size =
249 NX_P2_RX_BUF_MAX_LEN;
250 rds_ring->skb_size =
251 rds_ring->dma_size + NET_IP_ALIGN;
252 }
253 break;
254
255 case RCV_RING_JUMBO:
256 rds_ring->num_desc = adapter->num_jumbo_rxd;
257 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
258 rds_ring->dma_size =
259 NX_P3_RX_JUMBO_BUF_MAX_LEN;
260 else
261 rds_ring->dma_size =
262 NX_P2_RX_JUMBO_BUF_MAX_LEN;
263
264 if (adapter->capabilities & NX_CAP0_HW_LRO)
265 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
266
267 rds_ring->skb_size =
268 rds_ring->dma_size + NET_IP_ALIGN;
269 break;
270
271 case RCV_RING_LRO:
272 rds_ring->num_desc = adapter->num_lro_rxd;
273 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
274 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
275 break;
276
277 }
278 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
279 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
280 if (rds_ring->rx_buf_arr == NULL) {
281 printk(KERN_ERR "%s: Failed to allocate "
282 "rx buffer ring %d\n",
283 netdev->name, ring);
284 /* free whatever was already allocated */
285 goto err_out;
286 }
287 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
288 INIT_LIST_HEAD(&rds_ring->free_list);
289 /*
290 * Now go through all of them, set reference handles
291 * and put them in the queues.
292 */
293 rx_buf = rds_ring->rx_buf_arr;
294 for (i = 0; i < rds_ring->num_desc; i++) {
295 list_add_tail(&rx_buf->list,
296 &rds_ring->free_list);
297 rx_buf->ref_handle = i;
298 rx_buf->state = NETXEN_BUFFER_FREE;
299 rx_buf++;
300 }
301 spin_lock_init(&rds_ring->lock);
302 }
303
304 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
305 sds_ring = &recv_ctx->sds_rings[ring];
306 sds_ring->irq = adapter->msix_entries[ring].vector;
307 sds_ring->adapter = adapter;
308 sds_ring->num_desc = adapter->num_rxd;
309
310 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
311 INIT_LIST_HEAD(&sds_ring->free_list[i]);
312 }
313
314 return 0;
315
316 err_out:
317 netxen_free_sw_resources(adapter);
318 return -ENOMEM;
319 }
320
321 /*
322 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
323 * address to external PCI CRB address.
324 */
325 static u32 netxen_decode_crb_addr(u32 addr)
326 {
327 int i;
328 u32 base_addr, offset, pci_base;
329
330 crb_addr_transform_setup();
331
332 pci_base = NETXEN_ADDR_ERROR;
333 base_addr = addr & 0xfff00000;
334 offset = addr & 0x000fffff;
335
336 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
337 if (crb_addr_xform[i] == base_addr) {
338 pci_base = i << 20;
339 break;
340 }
341 }
342 if (pci_base == NETXEN_ADDR_ERROR)
343 return pci_base;
344 else
345 return (pci_base + offset);
346 }
347
348 #define NETXEN_MAX_ROM_WAIT_USEC 100
349
350 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
351 {
352 long timeout = 0;
353 long done = 0;
354
355 cond_resched();
356
357 while (done == 0) {
358 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
359 done &= 2;
360 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
361 dev_err(&adapter->pdev->dev,
362 "Timeout reached waiting for rom done");
363 return -EIO;
364 }
365 udelay(1);
366 }
367 return 0;
368 }
369
370 static int do_rom_fast_read(struct netxen_adapter *adapter,
371 int addr, int *valp)
372 {
373 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
374 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
375 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
377 if (netxen_wait_rom_done(adapter)) {
378 printk("Error waiting for rom done\n");
379 return -EIO;
380 }
381 /* reset abyte_cnt and dummy_byte_cnt */
382 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
383 udelay(10);
384 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
385
386 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
387 return 0;
388 }
389
390 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
391 u8 *bytes, size_t size)
392 {
393 int addridx;
394 int ret = 0;
395
396 for (addridx = addr; addridx < (addr + size); addridx += 4) {
397 int v;
398 ret = do_rom_fast_read(adapter, addridx, &v);
399 if (ret != 0)
400 break;
401 *(__le32 *)bytes = cpu_to_le32(v);
402 bytes += 4;
403 }
404
405 return ret;
406 }
407
408 int
409 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
410 u8 *bytes, size_t size)
411 {
412 int ret;
413
414 ret = netxen_rom_lock(adapter);
415 if (ret < 0)
416 return ret;
417
418 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
419
420 netxen_rom_unlock(adapter);
421 return ret;
422 }
423
424 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
425 {
426 int ret;
427
428 if (netxen_rom_lock(adapter) != 0)
429 return -EIO;
430
431 ret = do_rom_fast_read(adapter, addr, valp);
432 netxen_rom_unlock(adapter);
433 return ret;
434 }
435
436 #define NETXEN_BOARDTYPE 0x4008
437 #define NETXEN_BOARDNUM 0x400c
438 #define NETXEN_CHIPNUM 0x4010
439
440 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
441 {
442 int addr, val;
443 int i, n, init_delay = 0;
444 struct crb_addr_pair *buf;
445 unsigned offset;
446 u32 off;
447
448 /* resetall */
449 netxen_rom_lock(adapter);
450 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
451 netxen_rom_unlock(adapter);
452
453 if (verbose) {
454 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
455 printk("P2 ROM board type: 0x%08x\n", val);
456 else
457 printk("Could not read board type\n");
458 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
459 printk("P2 ROM board num: 0x%08x\n", val);
460 else
461 printk("Could not read board number\n");
462 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
463 printk("P2 ROM chip num: 0x%08x\n", val);
464 else
465 printk("Could not read chip number\n");
466 }
467
468 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
469 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
470 (n != 0xcafecafe) ||
471 netxen_rom_fast_read(adapter, 4, &n) != 0) {
472 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
473 "n: %08x\n", netxen_nic_driver_name, n);
474 return -EIO;
475 }
476 offset = n & 0xffffU;
477 n = (n >> 16) & 0xffffU;
478 } else {
479 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
480 !(n & 0x80000000)) {
481 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
482 "n: %08x\n", netxen_nic_driver_name, n);
483 return -EIO;
484 }
485 offset = 1;
486 n &= ~0x80000000;
487 }
488
489 if (n < 1024) {
490 if (verbose)
491 printk(KERN_DEBUG "%s: %d CRB init values found"
492 " in ROM.\n", netxen_nic_driver_name, n);
493 } else {
494 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
495 " initialized.\n", __func__, n);
496 return -EIO;
497 }
498
499 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
500 if (buf == NULL) {
501 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
502 netxen_nic_driver_name);
503 return -ENOMEM;
504 }
505 for (i = 0; i < n; i++) {
506 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
507 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
508 kfree(buf);
509 return -EIO;
510 }
511
512 buf[i].addr = addr;
513 buf[i].data = val;
514
515 if (verbose)
516 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
517 netxen_nic_driver_name,
518 (u32)netxen_decode_crb_addr(addr), val);
519 }
520 for (i = 0; i < n; i++) {
521
522 off = netxen_decode_crb_addr(buf[i].addr);
523 if (off == NETXEN_ADDR_ERROR) {
524 printk(KERN_ERR"CRB init value out of range %x\n",
525 buf[i].addr);
526 continue;
527 }
528 off += NETXEN_PCI_CRBSPACE;
529 /* skipping cold reboot MAGIC */
530 if (off == NETXEN_CAM_RAM(0x1fc))
531 continue;
532
533 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
534 if (off == (NETXEN_CRB_I2C0 + 0x1c))
535 continue;
536 /* do not reset PCI */
537 if (off == (ROMUSB_GLB + 0xbc))
538 continue;
539 if (off == (ROMUSB_GLB + 0xa8))
540 continue;
541 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
542 continue;
543 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
544 continue;
545 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
546 continue;
547 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
548 buf[i].data = 0x1020;
549 /* skip the function enable register */
550 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
551 continue;
552 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
553 continue;
554 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
555 continue;
556 }
557
558 init_delay = 1;
559 /* After writing this register, HW needs time for CRB */
560 /* to quiet down (else crb_window returns 0xffffffff) */
561 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
562 init_delay = 1000;
563 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
564 /* hold xdma in reset also */
565 buf[i].data = NETXEN_NIC_XDMA_RESET;
566 buf[i].data = 0x8000ff;
567 }
568 }
569
570 NXWR32(adapter, off, buf[i].data);
571
572 msleep(init_delay);
573 }
574 kfree(buf);
575
576 /* disable_peg_cache_all */
577
578 /* unreset_net_cache */
579 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
580 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
581 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
582 }
583
584 /* p2dn replyCount */
585 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
586 /* disable_peg_cache 0 */
587 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
588 /* disable_peg_cache 1 */
589 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
590
591 /* peg_clr_all */
592
593 /* peg_clr 0 */
594 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
595 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
596 /* peg_clr 1 */
597 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
598 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
599 /* peg_clr 2 */
600 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
601 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
602 /* peg_clr 3 */
603 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
604 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
605 return 0;
606 }
607
608 int
609 netxen_need_fw_reset(struct netxen_adapter *adapter)
610 {
611 u32 count, old_count;
612 u32 val, version, major, minor, build;
613 int i, timeout;
614 u8 fw_type;
615
616 /* NX2031 firmware doesn't support heartbit */
617 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
618 return 1;
619
620 /* last attempt had failed */
621 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
622 return 1;
623
624 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
625
626 for (i = 0; i < 10; i++) {
627
628 timeout = msleep_interruptible(200);
629 if (timeout) {
630 NXWR32(adapter, CRB_CMDPEG_STATE,
631 PHAN_INITIALIZE_FAILED);
632 return -EINTR;
633 }
634
635 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
636 if (count != old_count)
637 break;
638 }
639
640 /* firmware is dead */
641 if (count == old_count)
642 return 1;
643
644 /* check if we have got newer or different file firmware */
645 if (adapter->fw) {
646
647 const struct firmware *fw = adapter->fw;
648
649 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
650 version = NETXEN_DECODE_VERSION(val);
651
652 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
653 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
654 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
655
656 if (version > NETXEN_VERSION_CODE(major, minor, build))
657 return 1;
658
659 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
660
661 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
662 fw_type = (val & 0x4) ?
663 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
664
665 if (adapter->fw_type != fw_type)
666 return 1;
667 }
668 }
669
670 return 0;
671 }
672
673 static char *fw_name[] = {
674 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
675 };
676
677 int
678 netxen_load_firmware(struct netxen_adapter *adapter)
679 {
680 u64 *ptr64;
681 u32 i, flashaddr, size;
682 const struct firmware *fw = adapter->fw;
683 struct pci_dev *pdev = adapter->pdev;
684
685 dev_info(&pdev->dev, "loading firmware from %s\n",
686 fw_name[adapter->fw_type]);
687
688 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
689 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
690
691 if (fw) {
692 __le64 data;
693
694 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
695
696 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
697 flashaddr = NETXEN_BOOTLD_START;
698
699 for (i = 0; i < size; i++) {
700 data = cpu_to_le64(ptr64[i]);
701 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
702 flashaddr += 8;
703 }
704
705 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
706 size = (__force u32)cpu_to_le32(size) / 8;
707
708 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
709 flashaddr = NETXEN_IMAGE_START;
710
711 for (i = 0; i < size; i++) {
712 data = cpu_to_le64(ptr64[i]);
713
714 if (adapter->pci_mem_write(adapter,
715 flashaddr, &data, 8))
716 return -EIO;
717
718 flashaddr += 8;
719 }
720 } else {
721 u64 data;
722 u32 hi, lo;
723
724 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
725 flashaddr = NETXEN_BOOTLD_START;
726
727 for (i = 0; i < size; i++) {
728 if (netxen_rom_fast_read(adapter,
729 flashaddr, &lo) != 0)
730 return -EIO;
731 if (netxen_rom_fast_read(adapter,
732 flashaddr + 4, &hi) != 0)
733 return -EIO;
734
735 /* hi, lo are already in host endian byteorder */
736 data = (((u64)hi << 32) | lo);
737
738 if (adapter->pci_mem_write(adapter,
739 flashaddr, &data, 8))
740 return -EIO;
741
742 flashaddr += 8;
743 }
744 }
745 msleep(1);
746
747 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
748 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
749 else {
750 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
751 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
752 }
753
754 return 0;
755 }
756
757 static int
758 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
759 {
760 __le32 val;
761 u32 ver, min_ver, bios;
762 struct pci_dev *pdev = adapter->pdev;
763 const struct firmware *fw = adapter->fw;
764
765 if (fw->size < NX_FW_MIN_SIZE)
766 return -EINVAL;
767
768 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
769 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
770 return -EINVAL;
771
772 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
773
774 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
775 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
776 else
777 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
778
779 ver = NETXEN_DECODE_VERSION(val);
780
781 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
782 dev_err(&pdev->dev,
783 "%s: firmware version %d.%d.%d unsupported\n",
784 fwname, _major(ver), _minor(ver), _build(ver));
785 return -EINVAL;
786 }
787
788 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
789 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
790 if ((__force u32)val != bios) {
791 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
792 fwname);
793 return -EINVAL;
794 }
795
796 /* check if flashed firmware is newer */
797 if (netxen_rom_fast_read(adapter,
798 NX_FW_VERSION_OFFSET, (int *)&val))
799 return -EIO;
800 val = NETXEN_DECODE_VERSION(val);
801 if (val > ver) {
802 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
803 fwname);
804 return -EINVAL;
805 }
806
807 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
808 return 0;
809 }
810
811 static int
812 netxen_p3_has_mn(struct netxen_adapter *adapter)
813 {
814 u32 capability, flashed_ver;
815 capability = 0;
816
817 netxen_rom_fast_read(adapter,
818 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
819 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
820
821 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
822
823 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
824 if (capability & NX_PEG_TUNE_MN_PRESENT)
825 return 1;
826 }
827 return 0;
828 }
829
830 void netxen_request_firmware(struct netxen_adapter *adapter)
831 {
832 u8 fw_type;
833 struct pci_dev *pdev = adapter->pdev;
834 int rc = 0;
835
836 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
837 fw_type = NX_P2_MN_ROMIMAGE;
838 goto request_fw;
839 }
840
841 fw_type = netxen_p3_has_mn(adapter) ?
842 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
843
844 request_fw:
845 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
846 if (rc != 0) {
847 if (fw_type == NX_P3_MN_ROMIMAGE) {
848 msleep(1);
849 fw_type = NX_P3_CT_ROMIMAGE;
850 goto request_fw;
851 }
852
853 fw_type = NX_FLASH_ROMIMAGE;
854 adapter->fw = NULL;
855 goto done;
856 }
857
858 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
859 if (rc != 0) {
860 release_firmware(adapter->fw);
861
862 if (fw_type == NX_P3_MN_ROMIMAGE) {
863 msleep(1);
864 fw_type = NX_P3_CT_ROMIMAGE;
865 goto request_fw;
866 }
867
868 fw_type = NX_FLASH_ROMIMAGE;
869 adapter->fw = NULL;
870 goto done;
871 }
872
873 done:
874 adapter->fw_type = fw_type;
875 }
876
877
878 void
879 netxen_release_firmware(struct netxen_adapter *adapter)
880 {
881 if (adapter->fw)
882 release_firmware(adapter->fw);
883 adapter->fw = NULL;
884 }
885
886 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
887 {
888 u64 addr;
889 u32 hi, lo;
890
891 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
892 return 0;
893
894 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
895 NETXEN_HOST_DUMMY_DMA_SIZE,
896 &adapter->dummy_dma.phys_addr);
897 if (adapter->dummy_dma.addr == NULL) {
898 dev_err(&adapter->pdev->dev,
899 "ERROR: Could not allocate dummy DMA memory\n");
900 return -ENOMEM;
901 }
902
903 addr = (uint64_t) adapter->dummy_dma.phys_addr;
904 hi = (addr >> 32) & 0xffffffff;
905 lo = addr & 0xffffffff;
906
907 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
908 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
909
910 return 0;
911 }
912
913 /*
914 * NetXen DMA watchdog control:
915 *
916 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
917 * Bit 1 : disable_request => 1 req disable dma watchdog
918 * Bit 2 : enable_request => 1 req enable dma watchdog
919 * Bit 3-31 : unused
920 */
921 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
922 {
923 int i = 100;
924 u32 ctrl;
925
926 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
927 return;
928
929 if (!adapter->dummy_dma.addr)
930 return;
931
932 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
933 if ((ctrl & 0x1) != 0) {
934 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
935
936 while ((ctrl & 0x1) != 0) {
937
938 msleep(50);
939
940 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
941
942 if (--i == 0)
943 break;
944 };
945 }
946
947 if (i) {
948 pci_free_consistent(adapter->pdev,
949 NETXEN_HOST_DUMMY_DMA_SIZE,
950 adapter->dummy_dma.addr,
951 adapter->dummy_dma.phys_addr);
952 adapter->dummy_dma.addr = NULL;
953 } else
954 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
955 }
956
957 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
958 {
959 u32 val = 0;
960 int retries = 60;
961
962 if (pegtune_val)
963 return 0;
964
965 do {
966 val = NXRD32(adapter, CRB_CMDPEG_STATE);
967
968 switch (val) {
969 case PHAN_INITIALIZE_COMPLETE:
970 case PHAN_INITIALIZE_ACK:
971 return 0;
972 case PHAN_INITIALIZE_FAILED:
973 goto out_err;
974 default:
975 break;
976 }
977
978 msleep(500);
979
980 } while (--retries);
981
982 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
983
984 out_err:
985 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
986 return -EIO;
987 }
988
989 static int
990 netxen_receive_peg_ready(struct netxen_adapter *adapter)
991 {
992 u32 val = 0;
993 int retries = 2000;
994
995 do {
996 val = NXRD32(adapter, CRB_RCVPEG_STATE);
997
998 if (val == PHAN_PEG_RCV_INITIALIZED)
999 return 0;
1000
1001 msleep(10);
1002
1003 } while (--retries);
1004
1005 if (!retries) {
1006 printk(KERN_ERR "Receive Peg initialization not "
1007 "complete, state: 0x%x.\n", val);
1008 return -EIO;
1009 }
1010
1011 return 0;
1012 }
1013
1014 int netxen_init_firmware(struct netxen_adapter *adapter)
1015 {
1016 int err;
1017
1018 err = netxen_receive_peg_ready(adapter);
1019 if (err)
1020 return err;
1021
1022 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1023 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1024 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1025 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1026
1027 return err;
1028 }
1029
1030 static void
1031 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1032 {
1033 u32 cable_OUI;
1034 u16 cable_len;
1035 u16 link_speed;
1036 u8 link_status, module, duplex, autoneg;
1037 struct net_device *netdev = adapter->netdev;
1038
1039 adapter->has_link_events = 1;
1040
1041 cable_OUI = msg->body[1] & 0xffffffff;
1042 cable_len = (msg->body[1] >> 32) & 0xffff;
1043 link_speed = (msg->body[1] >> 48) & 0xffff;
1044
1045 link_status = msg->body[2] & 0xff;
1046 duplex = (msg->body[2] >> 16) & 0xff;
1047 autoneg = (msg->body[2] >> 24) & 0xff;
1048
1049 module = (msg->body[2] >> 8) & 0xff;
1050 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1051 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1052 netdev->name, cable_OUI, cable_len);
1053 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1054 printk(KERN_INFO "%s: unsupported cable length %d\n",
1055 netdev->name, cable_len);
1056 }
1057
1058 netxen_advert_link_change(adapter, link_status);
1059
1060 /* update link parameters */
1061 if (duplex == LINKEVENT_FULL_DUPLEX)
1062 adapter->link_duplex = DUPLEX_FULL;
1063 else
1064 adapter->link_duplex = DUPLEX_HALF;
1065 adapter->module_type = module;
1066 adapter->link_autoneg = autoneg;
1067 adapter->link_speed = link_speed;
1068 }
1069
1070 static void
1071 netxen_handle_fw_message(int desc_cnt, int index,
1072 struct nx_host_sds_ring *sds_ring)
1073 {
1074 nx_fw_msg_t msg;
1075 struct status_desc *desc;
1076 int i = 0, opcode;
1077
1078 while (desc_cnt > 0 && i < 8) {
1079 desc = &sds_ring->desc_head[index];
1080 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1081 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1082
1083 index = get_next_index(index, sds_ring->num_desc);
1084 desc_cnt--;
1085 }
1086
1087 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1088 switch (opcode) {
1089 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1090 netxen_handle_linkevent(sds_ring->adapter, &msg);
1091 break;
1092 default:
1093 break;
1094 }
1095 }
1096
1097 static int
1098 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1099 struct nx_host_rds_ring *rds_ring,
1100 struct netxen_rx_buffer *buffer)
1101 {
1102 struct sk_buff *skb;
1103 dma_addr_t dma;
1104 struct pci_dev *pdev = adapter->pdev;
1105
1106 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1107 if (!buffer->skb)
1108 return 1;
1109
1110 skb = buffer->skb;
1111
1112 if (!adapter->ahw.cut_through)
1113 skb_reserve(skb, 2);
1114
1115 dma = pci_map_single(pdev, skb->data,
1116 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1117
1118 if (pci_dma_mapping_error(pdev, dma)) {
1119 dev_kfree_skb_any(skb);
1120 buffer->skb = NULL;
1121 return 1;
1122 }
1123
1124 buffer->skb = skb;
1125 buffer->dma = dma;
1126 buffer->state = NETXEN_BUFFER_BUSY;
1127
1128 return 0;
1129 }
1130
1131 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1132 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1133 {
1134 struct netxen_rx_buffer *buffer;
1135 struct sk_buff *skb;
1136
1137 buffer = &rds_ring->rx_buf_arr[index];
1138
1139 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1140 PCI_DMA_FROMDEVICE);
1141
1142 skb = buffer->skb;
1143 if (!skb)
1144 goto no_skb;
1145
1146 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1147 adapter->stats.csummed++;
1148 skb->ip_summed = CHECKSUM_UNNECESSARY;
1149 } else
1150 skb->ip_summed = CHECKSUM_NONE;
1151
1152 skb->dev = adapter->netdev;
1153
1154 buffer->skb = NULL;
1155 no_skb:
1156 buffer->state = NETXEN_BUFFER_FREE;
1157 return skb;
1158 }
1159
1160 static struct netxen_rx_buffer *
1161 netxen_process_rcv(struct netxen_adapter *adapter,
1162 struct nx_host_sds_ring *sds_ring,
1163 int ring, u64 sts_data0)
1164 {
1165 struct net_device *netdev = adapter->netdev;
1166 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1167 struct netxen_rx_buffer *buffer;
1168 struct sk_buff *skb;
1169 struct nx_host_rds_ring *rds_ring;
1170 int index, length, cksum, pkt_offset;
1171
1172 if (unlikely(ring >= adapter->max_rds_rings))
1173 return NULL;
1174
1175 rds_ring = &recv_ctx->rds_rings[ring];
1176
1177 index = netxen_get_sts_refhandle(sts_data0);
1178 if (unlikely(index >= rds_ring->num_desc))
1179 return NULL;
1180
1181 buffer = &rds_ring->rx_buf_arr[index];
1182
1183 length = netxen_get_sts_totallength(sts_data0);
1184 cksum = netxen_get_sts_status(sts_data0);
1185 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1186
1187 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1188 if (!skb)
1189 return buffer;
1190
1191 if (length > rds_ring->skb_size)
1192 skb_put(skb, rds_ring->skb_size);
1193 else
1194 skb_put(skb, length);
1195
1196
1197 if (pkt_offset)
1198 skb_pull(skb, pkt_offset);
1199
1200 skb->truesize = skb->len + sizeof(struct sk_buff);
1201 skb->protocol = eth_type_trans(skb, netdev);
1202
1203 napi_gro_receive(&sds_ring->napi, skb);
1204
1205 adapter->stats.rx_pkts++;
1206 adapter->stats.rxbytes += length;
1207
1208 return buffer;
1209 }
1210
1211 #define TCP_HDR_SIZE 20
1212 #define TCP_TS_OPTION_SIZE 12
1213 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1214
1215 static struct netxen_rx_buffer *
1216 netxen_process_lro(struct netxen_adapter *adapter,
1217 struct nx_host_sds_ring *sds_ring,
1218 int ring, u64 sts_data0, u64 sts_data1)
1219 {
1220 struct net_device *netdev = adapter->netdev;
1221 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1222 struct netxen_rx_buffer *buffer;
1223 struct sk_buff *skb;
1224 struct nx_host_rds_ring *rds_ring;
1225 struct iphdr *iph;
1226 struct tcphdr *th;
1227 bool push, timestamp;
1228 int l2_hdr_offset, l4_hdr_offset;
1229 int index;
1230 u16 lro_length, length, data_offset;
1231 u32 seq_number;
1232
1233 if (unlikely(ring > adapter->max_rds_rings))
1234 return NULL;
1235
1236 rds_ring = &recv_ctx->rds_rings[ring];
1237
1238 index = netxen_get_lro_sts_refhandle(sts_data0);
1239 if (unlikely(index > rds_ring->num_desc))
1240 return NULL;
1241
1242 buffer = &rds_ring->rx_buf_arr[index];
1243
1244 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1245 lro_length = netxen_get_lro_sts_length(sts_data0);
1246 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1247 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1248 push = netxen_get_lro_sts_push_flag(sts_data0);
1249 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1250
1251 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1252 if (!skb)
1253 return buffer;
1254
1255 if (timestamp)
1256 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1257 else
1258 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1259
1260 skb_put(skb, lro_length + data_offset);
1261
1262 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1263
1264 skb_pull(skb, l2_hdr_offset);
1265 skb->protocol = eth_type_trans(skb, netdev);
1266
1267 iph = (struct iphdr *)skb->data;
1268 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1269
1270 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1271 iph->tot_len = htons(length);
1272 iph->check = 0;
1273 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1274 th->psh = push;
1275 th->seq = htonl(seq_number);
1276
1277 length = skb->len;
1278
1279 netif_receive_skb(skb);
1280
1281 adapter->stats.lro_pkts++;
1282 adapter->stats.rxbytes += length;
1283
1284 return buffer;
1285 }
1286
1287 #define netxen_merge_rx_buffers(list, head) \
1288 do { list_splice_tail_init(list, head); } while (0);
1289
1290 int
1291 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1292 {
1293 struct netxen_adapter *adapter = sds_ring->adapter;
1294
1295 struct list_head *cur;
1296
1297 struct status_desc *desc;
1298 struct netxen_rx_buffer *rxbuf;
1299
1300 u32 consumer = sds_ring->consumer;
1301
1302 int count = 0;
1303 u64 sts_data0, sts_data1;
1304 int opcode, ring = 0, desc_cnt;
1305
1306 while (count < max) {
1307 desc = &sds_ring->desc_head[consumer];
1308 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1309
1310 if (!(sts_data0 & STATUS_OWNER_HOST))
1311 break;
1312
1313 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1314
1315 opcode = netxen_get_sts_opcode(sts_data0);
1316
1317 switch (opcode) {
1318 case NETXEN_NIC_RXPKT_DESC:
1319 case NETXEN_OLD_RXPKT_DESC:
1320 case NETXEN_NIC_SYN_OFFLOAD:
1321 ring = netxen_get_sts_type(sts_data0);
1322 rxbuf = netxen_process_rcv(adapter, sds_ring,
1323 ring, sts_data0);
1324 break;
1325 case NETXEN_NIC_LRO_DESC:
1326 ring = netxen_get_lro_sts_type(sts_data0);
1327 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1328 rxbuf = netxen_process_lro(adapter, sds_ring,
1329 ring, sts_data0, sts_data1);
1330 break;
1331 case NETXEN_NIC_RESPONSE_DESC:
1332 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1333 default:
1334 goto skip;
1335 }
1336
1337 WARN_ON(desc_cnt > 1);
1338
1339 if (rxbuf)
1340 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1341
1342 skip:
1343 for (; desc_cnt > 0; desc_cnt--) {
1344 desc = &sds_ring->desc_head[consumer];
1345 desc->status_desc_data[0] =
1346 cpu_to_le64(STATUS_OWNER_PHANTOM);
1347 consumer = get_next_index(consumer, sds_ring->num_desc);
1348 }
1349 count++;
1350 }
1351
1352 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1353 struct nx_host_rds_ring *rds_ring =
1354 &adapter->recv_ctx.rds_rings[ring];
1355
1356 if (!list_empty(&sds_ring->free_list[ring])) {
1357 list_for_each(cur, &sds_ring->free_list[ring]) {
1358 rxbuf = list_entry(cur,
1359 struct netxen_rx_buffer, list);
1360 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1361 }
1362 spin_lock(&rds_ring->lock);
1363 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1364 &rds_ring->free_list);
1365 spin_unlock(&rds_ring->lock);
1366 }
1367
1368 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1369 }
1370
1371 if (count) {
1372 sds_ring->consumer = consumer;
1373 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1374 }
1375
1376 return count;
1377 }
1378
1379 /* Process Command status ring */
1380 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1381 {
1382 u32 sw_consumer, hw_consumer;
1383 int count = 0, i;
1384 struct netxen_cmd_buffer *buffer;
1385 struct pci_dev *pdev = adapter->pdev;
1386 struct net_device *netdev = adapter->netdev;
1387 struct netxen_skb_frag *frag;
1388 int done = 0;
1389 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1390
1391 if (!spin_trylock(&adapter->tx_clean_lock))
1392 return 1;
1393
1394 sw_consumer = tx_ring->sw_consumer;
1395 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1396
1397 while (sw_consumer != hw_consumer) {
1398 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1399 if (buffer->skb) {
1400 frag = &buffer->frag_array[0];
1401 pci_unmap_single(pdev, frag->dma, frag->length,
1402 PCI_DMA_TODEVICE);
1403 frag->dma = 0ULL;
1404 for (i = 1; i < buffer->frag_count; i++) {
1405 frag++; /* Get the next frag */
1406 pci_unmap_page(pdev, frag->dma, frag->length,
1407 PCI_DMA_TODEVICE);
1408 frag->dma = 0ULL;
1409 }
1410
1411 adapter->stats.xmitfinished++;
1412 dev_kfree_skb_any(buffer->skb);
1413 buffer->skb = NULL;
1414 }
1415
1416 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1417 if (++count >= MAX_STATUS_HANDLE)
1418 break;
1419 }
1420
1421 if (count && netif_running(netdev)) {
1422 tx_ring->sw_consumer = sw_consumer;
1423
1424 smp_mb();
1425
1426 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1427 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1428 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) {
1429 netif_wake_queue(netdev);
1430 adapter->tx_timeo_cnt = 0;
1431 }
1432 __netif_tx_unlock(tx_ring->txq);
1433 }
1434 }
1435 /*
1436 * If everything is freed up to consumer then check if the ring is full
1437 * If the ring is full then check if more needs to be freed and
1438 * schedule the call back again.
1439 *
1440 * This happens when there are 2 CPUs. One could be freeing and the
1441 * other filling it. If the ring is full when we get out of here and
1442 * the card has already interrupted the host then the host can miss the
1443 * interrupt.
1444 *
1445 * There is still a possible race condition and the host could miss an
1446 * interrupt. The card has to take care of this.
1447 */
1448 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1449 done = (sw_consumer == hw_consumer);
1450 spin_unlock(&adapter->tx_clean_lock);
1451
1452 return (done);
1453 }
1454
1455 void
1456 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1457 struct nx_host_rds_ring *rds_ring)
1458 {
1459 struct rcv_desc *pdesc;
1460 struct netxen_rx_buffer *buffer;
1461 int producer, count = 0;
1462 netxen_ctx_msg msg = 0;
1463 struct list_head *head;
1464
1465 producer = rds_ring->producer;
1466
1467 spin_lock(&rds_ring->lock);
1468 head = &rds_ring->free_list;
1469 while (!list_empty(head)) {
1470
1471 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1472
1473 if (!buffer->skb) {
1474 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1475 break;
1476 }
1477
1478 count++;
1479 list_del(&buffer->list);
1480
1481 /* make a rcv descriptor */
1482 pdesc = &rds_ring->desc_head[producer];
1483 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1484 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1485 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1486
1487 producer = get_next_index(producer, rds_ring->num_desc);
1488 }
1489 spin_unlock(&rds_ring->lock);
1490
1491 if (count) {
1492 rds_ring->producer = producer;
1493 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1494 (producer-1) & (rds_ring->num_desc-1));
1495
1496 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1497 /*
1498 * Write a doorbell msg to tell phanmon of change in
1499 * receive ring producer
1500 * Only for firmware version < 4.0.0
1501 */
1502 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1503 netxen_set_msg_privid(msg);
1504 netxen_set_msg_count(msg,
1505 ((producer - 1) &
1506 (rds_ring->num_desc - 1)));
1507 netxen_set_msg_ctxid(msg, adapter->portnum);
1508 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1509 read_lock(&adapter->adapter_lock);
1510 writel(msg, DB_NORMALIZE(adapter,
1511 NETXEN_RCV_PRODUCER_OFFSET));
1512 read_unlock(&adapter->adapter_lock);
1513 }
1514 }
1515 }
1516
1517 static void
1518 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1519 struct nx_host_rds_ring *rds_ring)
1520 {
1521 struct rcv_desc *pdesc;
1522 struct netxen_rx_buffer *buffer;
1523 int producer, count = 0;
1524 struct list_head *head;
1525
1526 producer = rds_ring->producer;
1527 if (!spin_trylock(&rds_ring->lock))
1528 return;
1529
1530 head = &rds_ring->free_list;
1531 while (!list_empty(head)) {
1532
1533 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1534
1535 if (!buffer->skb) {
1536 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1537 break;
1538 }
1539
1540 count++;
1541 list_del(&buffer->list);
1542
1543 /* make a rcv descriptor */
1544 pdesc = &rds_ring->desc_head[producer];
1545 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1546 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1547 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1548
1549 producer = get_next_index(producer, rds_ring->num_desc);
1550 }
1551
1552 if (count) {
1553 rds_ring->producer = producer;
1554 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1555 (producer - 1) & (rds_ring->num_desc - 1));
1556 }
1557 spin_unlock(&rds_ring->lock);
1558 }
1559
1560 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1561 {
1562 memset(&adapter->stats, 0, sizeof(adapter->stats));
1563 return;
1564 }
1565
Linux with added FPC-III support