drivers/net/wireless/iwmc3200wifi/hal.h

   1 /*
   2  * Intel Wireless Multicomm 3200 WiFi driver
   3  *
   4  * Copyright (C) 2009 Intel Corporation. All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  *
  10  *   * Redistributions of source code must retain the above copyright
  11  *     notice, this list of conditions and the following disclaimer.
  12  *   * Redistributions in binary form must reproduce the above copyright
  13  *     notice, this list of conditions and the following disclaimer in
  14  *     the documentation and/or other materials provided with the
  15  *     distribution.
  16  *   * Neither the name of Intel Corporation nor the names of its
  17  *     contributors may be used to endorse or promote products derived
  18  *     from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  *
  32  *
  33  * Intel Corporation <ilw@linux.intel.com>
  34  * Samuel Ortiz <samuel.ortiz@intel.com>
  35  * Zhu Yi <yi.zhu@intel.com>
  36  *
  37  */
  38
  39 #ifndef _IWM_HAL_H_
  40 #define _IWM_HAL_H_
  41
  42 #include "umac.h"
  43
  44 #define GET_VAL8(s, name)       ((s >> name##_POS) & name##_SEED)
  45 #define GET_VAL16(s, name)      ((le16_to_cpu(s) >> name##_POS) & name##_SEED)
  46 #define GET_VAL32(s, name)      ((le32_to_cpu(s) >> name##_POS) & name##_SEED)
  47
  48 #define SET_VAL8(s, name, val)                                            \
  49 do {                                                                      \
  50         s = (s & ~(name##_SEED << name##_POS)) |                          \
  51             ((val & name##_SEED) << name##_POS);                          \
  52 } while (0)
  53
  54 #define SET_VAL16(s, name, val)                                           \
  55 do {                                                                      \
  56         s = cpu_to_le16((le16_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
  57                         ((val & name##_SEED) << name##_POS));             \
  58 } while (0)
  59
  60 #define SET_VAL32(s, name, val)                                           \
  61 do {                                                                      \
  62         s = cpu_to_le32((le32_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
  63                         ((val & name##_SEED) << name##_POS));             \
  64 } while (0)
  65
  66
  67 #define UDMA_UMAC_INIT  {       .eop = 1,                                 \
  68                                 .credit_group = 0x4,                      \
  69                                 .ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD,  \
  70                                 .lmac_offset = 0 }
  71 #define UDMA_LMAC_INIT  {       .eop = 1,                                 \
  72                                 .credit_group = 0x4,                      \
  73                                 .ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD,  \
  74                                 .lmac_offset = 4 }
  75
  76
  77 /* UDMA IN OP CODE -- cmd bits [3:0] */
  78 #define UDMA_IN_OPCODE_MASK                     0xF
  79
  80 #define UDMA_IN_OPCODE_GENERAL_RESP             0x0
  81 #define UDMA_IN_OPCODE_READ_RESP                0x1
  82 #define UDMA_IN_OPCODE_WRITE_RESP               0x2
  83 #define UDMA_IN_OPCODE_PERS_WRITE_RESP          0x5
  84 #define UDMA_IN_OPCODE_PERS_READ_RESP           0x6
  85 #define UDMA_IN_OPCODE_RD_MDFY_WR_RESP          0x7
  86 #define UDMA_IN_OPCODE_EP_MNGMT_MSG             0x8
  87 #define UDMA_IN_OPCODE_CRDT_CHNG_MSG            0x9
  88 #define UDMA_IN_OPCODE_CNTRL_DATABASE_MSG       0xA
  89 #define UDMA_IN_OPCODE_SW_MSG                   0xB
  90 #define UDMA_IN_OPCODE_WIFI                     0xF
  91 #define UDMA_IN_OPCODE_WIFI_LMAC                0x1F
  92 #define UDMA_IN_OPCODE_WIFI_UMAC                0x2F
  93
  94 /* HW API: udma_hdi_nonwifi API (OUT and IN) */
  95
  96 /* iwm_udma_nonwifi_cmd request response -- bits [9:9] */
  97 #define UDMA_HDI_OUT_NW_CMD_RESP_POS            9
  98 #define UDMA_HDI_OUT_NW_CMD_RESP_SEED           0x1
  99
 100 /* iwm_udma_nonwifi_cmd handle by HW -- bits [11:11] */
 101 #define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_POS    11
 102 #define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_SEED   0x1
 103
 104 /* iwm_udma_nonwifi_cmd sequence-number -- bits [12:15] */
 105 #define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_POS         12
 106 #define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_SEED        0xF
 107
 108 /* UDMA IN Non-WIFI HW sequence number -- bits [12:15] */
 109 #define UDMA_IN_NW_HW_SEQ_NUM_POS               12
 110 #define UDMA_IN_NW_HW_SEQ_NUM_SEED              0xF
 111
 112 /* UDMA IN Non-WIFI HW signature -- bits [16:31] */
 113 #define UDMA_IN_NW_HW_SIG_POS                   16
 114 #define UDMA_IN_NW_HW_SIG_SEED                  0xFFFF
 115
 116 /* fixed signature */
 117 #define UDMA_IN_NW_HW_SIG                       0xCBBC
 118
 119 /* UDMA IN Non-WIFI HW block length -- bits [32:35] */
 120 #define UDMA_IN_NW_HW_LENGTH_SEED               0xF
 121 #define UDMA_IN_NW_HW_LENGTH_POS                32
 122
 123 /* End of HW API: udma_hdi_nonwifi API (OUT and IN) */
 124
 125 #define IWM_SDIO_FW_MAX_CHUNK_SIZE      2032
 126 #define IWM_MAX_WIFI_HEADERS_SIZE       32
 127 #define IWM_MAX_NONWIFI_HEADERS_SIZE    16
 128 #define IWM_MAX_NONWIFI_CMD_BUFF_SIZE   (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
 129                                          IWM_MAX_NONWIFI_HEADERS_SIZE)
 130 #define IWM_MAX_WIFI_CMD_BUFF_SIZE      (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
 131                                          IWM_MAX_WIFI_HEADERS_SIZE)
 132
 133 #define IWM_HAL_CONCATENATE_BUF_SIZE    8192
 134
 135 struct iwm_wifi_cmd_buff {
 136         u16 len;
 137         u8 *start;
 138         u8 hdr[IWM_MAX_WIFI_HEADERS_SIZE];
 139         u8 payload[IWM_MAX_WIFI_CMD_BUFF_SIZE];
 140 };
 141
 142 struct iwm_nonwifi_cmd_buff {
 143         u16 len;
 144         u8 *start;
 145         u8 hdr[IWM_MAX_NONWIFI_HEADERS_SIZE];
 146         u8 payload[IWM_MAX_NONWIFI_CMD_BUFF_SIZE];
 147 };
 148
 149 struct iwm_udma_nonwifi_cmd {
 150         u8 opcode;
 151         u8 eop;
 152         u8 resp;
 153         u8 handle_by_hw;
 154         __le32 addr;
 155         __le32 op1_sz;
 156         __le32 op2;
 157         __le16 seq_num;
 158 };
 159
 160 struct iwm_udma_wifi_cmd {
 161         __le16 count;
 162         u8 eop;
 163         u8 credit_group;
 164         u8 ra_tid;
 165         u8 lmac_offset;
 166 };
 167
 168 struct iwm_umac_cmd {
 169         u8 id;
 170         __le16 count;
 171         u8 resp;
 172         __le16 seq_num;
 173         u8 color;
 174 };
 175
 176 struct iwm_lmac_cmd {
 177         u8 id;
 178         __le16 count;
 179         u8 resp;
 180         __le16 seq_num;
 181 };
 182
 183 struct iwm_nonwifi_cmd {
 184         u16 seq_num;
 185         bool resp_received;
 186         struct list_head pending;
 187         struct iwm_udma_nonwifi_cmd udma_cmd;
 188         struct iwm_umac_cmd umac_cmd;
 189         struct iwm_lmac_cmd lmac_cmd;
 190         struct iwm_nonwifi_cmd_buff buf;
 191         u32 flags;
 192 };
 193
 194 struct iwm_wifi_cmd {
 195         u16 seq_num;
 196         struct list_head pending;
 197         struct iwm_udma_wifi_cmd udma_cmd;
 198         struct iwm_umac_cmd umac_cmd;
 199         struct iwm_lmac_cmd lmac_cmd;
 200         struct iwm_wifi_cmd_buff buf;
 201         u32 flags;
 202 };
 203
 204 void iwm_cmd_flush(struct iwm_priv *iwm);
 205
 206 struct iwm_wifi_cmd *iwm_get_pending_wifi_cmd(struct iwm_priv *iwm,
 207                                               u16 seq_num);
 208 struct iwm_nonwifi_cmd *iwm_get_pending_nonwifi_cmd(struct iwm_priv *iwm,
 209                                                     u8 seq_num, u8 cmd_opcode);
 210
 211
 212 int iwm_hal_send_target_cmd(struct iwm_priv *iwm,
 213                             struct iwm_udma_nonwifi_cmd *ucmd,
 214                             const void *payload);
 215
 216 int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
 217                           struct iwm_udma_wifi_cmd *udma_cmd,
 218                           struct iwm_umac_cmd *umac_cmd,
 219                           struct iwm_lmac_cmd *lmac_cmd,
 220                           const void *payload, u16 payload_size);
 221
 222 int iwm_hal_send_umac_cmd(struct iwm_priv *iwm,
 223                           struct iwm_udma_wifi_cmd *udma_cmd,
 224                           struct iwm_umac_cmd *umac_cmd,
 225                           const void *payload, u16 payload_size);
 226
 227 u16 iwm_alloc_wifi_cmd_seq(struct iwm_priv *iwm);
 228
 229 void iwm_udma_wifi_hdr_set_eop(struct iwm_priv *iwm, u8 *buf, u8 eop);
 230 void iwm_build_udma_wifi_hdr(struct iwm_priv *iwm,
 231                              struct iwm_udma_out_wifi_hdr *hdr,
 232                              struct iwm_udma_wifi_cmd *cmd);
 233 void iwm_build_umac_hdr(struct iwm_priv *iwm,
 234                         struct iwm_umac_fw_cmd_hdr *hdr,
 235                         struct iwm_umac_cmd *cmd);
 236 #endif /* _IWM_HAL_H_ */