x86/amd-iommu: Add per IOMMU reference counting
[linux/fpc-iii.git] / drivers / watchdog / wd501p.h
blob0e3a497d5626ea35abbf42defdba0f4e55be2f6f
1 /*
2 * Industrial Computer Source WDT500/501 driver
4 * (c) Copyright 1995 CymruNET Ltd
5 * Innovation Centre
6 * Singleton Park
7 * Swansea
8 * Wales
9 * UK
10 * SA2 8PP
12 * http://www.cymru.net
14 * This driver is provided under the GNU General Public License,
15 * incorporated herein by reference. The driver is provided without
16 * warranty or support.
18 * Release 0.04.
23 #define WDT_COUNT0 (io+0)
24 #define WDT_COUNT1 (io+1)
25 #define WDT_COUNT2 (io+2)
26 #define WDT_CR (io+3)
27 #define WDT_SR (io+4) /* Start buzzer on PCI write */
28 #define WDT_RT (io+5) /* Stop buzzer on PCI write */
29 #define WDT_BUZZER (io+6) /* PCI only: rd=disable, wr=enable */
30 #define WDT_DC (io+7)
32 /* The following are only on the PCI card, they're outside of I/O space on
33 * the ISA card: */
34 #define WDT_CLOCK (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */
35 /* inverted opto isolated reset output: */
36 #define WDT_OPTONOTRST (io+13) /* wr=enable, rd=disable */
37 /* opto isolated reset output: */
38 #define WDT_OPTORST (io+14) /* wr=enable, rd=disable */
39 /* programmable outputs: */
40 #define WDT_PROGOUT (io+15) /* wr=enable, rd=disable */
42 /* FAN 501 500 */
43 #define WDC_SR_WCCR 1 /* Active low */ /* X X X */
44 #define WDC_SR_TGOOD 2 /* X X - */
45 #define WDC_SR_ISOI0 4 /* X X X */
46 #define WDC_SR_ISII1 8 /* X X X */
47 #define WDC_SR_FANGOOD 16 /* X - - */
48 #define WDC_SR_PSUOVER 32 /* Active low */ /* X X - */
49 #define WDC_SR_PSUUNDR 64 /* Active low */ /* X X - */
50 #define WDC_SR_IRQ 128 /* Active low */ /* X X X */