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EDAC: i7core, sb_edac: Don't return NOTIFY_BAD from mce_decoder callback
[linux/fpc-iii.git] / drivers / gpio / gpio-mcp23s08.c
blob47e486910aab8c92238f1bffed9e8e189c9a633b
1 /*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/device.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/mcp23s08.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/interrupt.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_device.h>
26
27 /**
28 * MCP types supported by driver
29 */
30 #define MCP_TYPE_S08 0
31 #define MCP_TYPE_S17 1
32 #define MCP_TYPE_008 2
33 #define MCP_TYPE_017 3
34 #define MCP_TYPE_S18 4
35
36 /* Registers are all 8 bits wide.
37 *
38 * The mcp23s17 has twice as many bits, and can be configured to work
39 * with either 16 bit registers or with two adjacent 8 bit banks.
40 */
41 #define MCP_IODIR 0x00 /* init/reset: all ones */
42 #define MCP_IPOL 0x01
43 #define MCP_GPINTEN 0x02
44 #define MCP_DEFVAL 0x03
45 #define MCP_INTCON 0x04
46 #define MCP_IOCON 0x05
47 # define IOCON_MIRROR (1 << 6)
48 # define IOCON_SEQOP (1 << 5)
49 # define IOCON_HAEN (1 << 3)
50 # define IOCON_ODR (1 << 2)
51 # define IOCON_INTPOL (1 << 1)
52 # define IOCON_INTCC (1)
53 #define MCP_GPPU 0x06
54 #define MCP_INTF 0x07
55 #define MCP_INTCAP 0x08
56 #define MCP_GPIO 0x09
57 #define MCP_OLAT 0x0a
58
59 struct mcp23s08;
60
61 struct mcp23s08_ops {
62 int (*read)(struct mcp23s08 *mcp, unsigned reg);
63 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
64 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
65 u16 *vals, unsigned n);
66 };
67
68 struct mcp23s08 {
69 u8 addr;
70 bool irq_active_high;
71
72 u16 cache[11];
73 u16 irq_rise;
74 u16 irq_fall;
75 int irq;
76 bool irq_controller;
77 /* lock protects the cached values */
78 struct mutex lock;
79 struct mutex irq_lock;
80 struct irq_domain *irq_domain;
81
82 struct gpio_chip chip;
83
84 const struct mcp23s08_ops *ops;
85 void *data; /* ops specific data */
86 };
87
88 /* A given spi_device can represent up to eight mcp23sxx chips
89 * sharing the same chipselect but using different addresses
90 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
91 * Driver data holds all the per-chip data.
92 */
93 struct mcp23s08_driver_data {
94 unsigned ngpio;
95 struct mcp23s08 *mcp[8];
96 struct mcp23s08 chip[];
97 };
98
99 /* This lock class tells lockdep that GPIO irqs are in a different
100 * category than their parents, so it won't report false recursion.
101 */
102 static struct lock_class_key gpio_lock_class;
103
104 /*----------------------------------------------------------------------*/
105
106 #if IS_ENABLED(CONFIG_I2C)
107
108 static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
109 {
110 return i2c_smbus_read_byte_data(mcp->data, reg);
111 }
112
113 static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
114 {
115 return i2c_smbus_write_byte_data(mcp->data, reg, val);
116 }
117
118 static int
119 mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
120 {
121 while (n--) {
122 int ret = mcp23008_read(mcp, reg++);
123 if (ret < 0)
124 return ret;
125 *vals++ = ret;
126 }
127
128 return 0;
129 }
130
131 static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
132 {
133 return i2c_smbus_read_word_data(mcp->data, reg << 1);
134 }
135
136 static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
137 {
138 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
139 }
140
141 static int
142 mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
143 {
144 while (n--) {
145 int ret = mcp23017_read(mcp, reg++);
146 if (ret < 0)
147 return ret;
148 *vals++ = ret;
149 }
150
151 return 0;
152 }
153
154 static const struct mcp23s08_ops mcp23008_ops = {
155 .read = mcp23008_read,
156 .write = mcp23008_write,
157 .read_regs = mcp23008_read_regs,
158 };
159
160 static const struct mcp23s08_ops mcp23017_ops = {
161 .read = mcp23017_read,
162 .write = mcp23017_write,
163 .read_regs = mcp23017_read_regs,
164 };
165
166 #endif /* CONFIG_I2C */
167
168 /*----------------------------------------------------------------------*/
169
170 #ifdef CONFIG_SPI_MASTER
171
172 static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
173 {
174 u8 tx[2], rx[1];
175 int status;
176
177 tx[0] = mcp->addr | 0x01;
178 tx[1] = reg;
179 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
180 return (status < 0) ? status : rx[0];
181 }
182
183 static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
184 {
185 u8 tx[3];
186
187 tx[0] = mcp->addr;
188 tx[1] = reg;
189 tx[2] = val;
190 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
191 }
192
193 static int
194 mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
195 {
196 u8 tx[2], *tmp;
197 int status;
198
199 if ((n + reg) > sizeof(mcp->cache))
200 return -EINVAL;
201 tx[0] = mcp->addr | 0x01;
202 tx[1] = reg;
203
204 tmp = (u8 *)vals;
205 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
206 if (status >= 0) {
207 while (n--)
208 vals[n] = tmp[n]; /* expand to 16bit */
209 }
210 return status;
211 }
212
213 static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
214 {
215 u8 tx[2], rx[2];
216 int status;
217
218 tx[0] = mcp->addr | 0x01;
219 tx[1] = reg << 1;
220 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
221 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
222 }
223
224 static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
225 {
226 u8 tx[4];
227
228 tx[0] = mcp->addr;
229 tx[1] = reg << 1;
230 tx[2] = val;
231 tx[3] = val >> 8;
232 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
233 }
234
235 static int
236 mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
237 {
238 u8 tx[2];
239 int status;
240
241 if ((n + reg) > sizeof(mcp->cache))
242 return -EINVAL;
243 tx[0] = mcp->addr | 0x01;
244 tx[1] = reg << 1;
245
246 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
247 (u8 *)vals, n * 2);
248 if (status >= 0) {
249 while (n--)
250 vals[n] = __le16_to_cpu((__le16)vals[n]);
251 }
252
253 return status;
254 }
255
256 static const struct mcp23s08_ops mcp23s08_ops = {
257 .read = mcp23s08_read,
258 .write = mcp23s08_write,
259 .read_regs = mcp23s08_read_regs,
260 };
261
262 static const struct mcp23s08_ops mcp23s17_ops = {
263 .read = mcp23s17_read,
264 .write = mcp23s17_write,
265 .read_regs = mcp23s17_read_regs,
266 };
267
268 #endif /* CONFIG_SPI_MASTER */
269
270 /*----------------------------------------------------------------------*/
271
272 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
273 {
274 struct mcp23s08 *mcp = gpiochip_get_data(chip);
275 int status;
276
277 mutex_lock(&mcp->lock);
278 mcp->cache[MCP_IODIR] |= (1 << offset);
279 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
280 mutex_unlock(&mcp->lock);
281 return status;
282 }
283
284 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
285 {
286 struct mcp23s08 *mcp = gpiochip_get_data(chip);
287 int status;
288
289 mutex_lock(&mcp->lock);
290
291 /* REVISIT reading this clears any IRQ ... */
292 status = mcp->ops->read(mcp, MCP_GPIO);
293 if (status < 0)
294 status = 0;
295 else {
296 mcp->cache[MCP_GPIO] = status;
297 status = !!(status & (1 << offset));
298 }
299 mutex_unlock(&mcp->lock);
300 return status;
301 }
302
303 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
304 {
305 unsigned olat = mcp->cache[MCP_OLAT];
306
307 if (value)
308 olat |= mask;
309 else
310 olat &= ~mask;
311 mcp->cache[MCP_OLAT] = olat;
312 return mcp->ops->write(mcp, MCP_OLAT, olat);
313 }
314
315 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
316 {
317 struct mcp23s08 *mcp = gpiochip_get_data(chip);
318 unsigned mask = 1 << offset;
319
320 mutex_lock(&mcp->lock);
321 __mcp23s08_set(mcp, mask, value);
322 mutex_unlock(&mcp->lock);
323 }
324
325 static int
326 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
327 {
328 struct mcp23s08 *mcp = gpiochip_get_data(chip);
329 unsigned mask = 1 << offset;
330 int status;
331
332 mutex_lock(&mcp->lock);
333 status = __mcp23s08_set(mcp, mask, value);
334 if (status == 0) {
335 mcp->cache[MCP_IODIR] &= ~mask;
336 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
337 }
338 mutex_unlock(&mcp->lock);
339 return status;
340 }
341
342 /*----------------------------------------------------------------------*/
343 static irqreturn_t mcp23s08_irq(int irq, void *data)
344 {
345 struct mcp23s08 *mcp = data;
346 int intcap, intf, i;
347 unsigned int child_irq;
348
349 mutex_lock(&mcp->lock);
350 intf = mcp->ops->read(mcp, MCP_INTF);
351 if (intf < 0) {
352 mutex_unlock(&mcp->lock);
353 return IRQ_HANDLED;
354 }
355
356 mcp->cache[MCP_INTF] = intf;
357
358 intcap = mcp->ops->read(mcp, MCP_INTCAP);
359 if (intcap < 0) {
360 mutex_unlock(&mcp->lock);
361 return IRQ_HANDLED;
362 }
363
364 mcp->cache[MCP_INTCAP] = intcap;
365 mutex_unlock(&mcp->lock);
366
367
368 for (i = 0; i < mcp->chip.ngpio; i++) {
369 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
370 ((BIT(i) & intcap & mcp->irq_rise) ||
371 (mcp->irq_fall & ~intcap & BIT(i)))) {
372 child_irq = irq_find_mapping(mcp->irq_domain, i);
373 handle_nested_irq(child_irq);
374 }
375 }
376
377 return IRQ_HANDLED;
378 }
379
380 static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
381 {
382 struct mcp23s08 *mcp = gpiochip_get_data(chip);
383
384 return irq_find_mapping(mcp->irq_domain, offset);
385 }
386
387 static void mcp23s08_irq_mask(struct irq_data *data)
388 {
389 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
390 unsigned int pos = data->hwirq;
391
392 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
393 }
394
395 static void mcp23s08_irq_unmask(struct irq_data *data)
396 {
397 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
398 unsigned int pos = data->hwirq;
399
400 mcp->cache[MCP_GPINTEN] |= BIT(pos);
401 }
402
403 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
404 {
405 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
406 unsigned int pos = data->hwirq;
407 int status = 0;
408
409 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
410 mcp->cache[MCP_INTCON] &= ~BIT(pos);
411 mcp->irq_rise |= BIT(pos);
412 mcp->irq_fall |= BIT(pos);
413 } else if (type & IRQ_TYPE_EDGE_RISING) {
414 mcp->cache[MCP_INTCON] &= ~BIT(pos);
415 mcp->irq_rise |= BIT(pos);
416 mcp->irq_fall &= ~BIT(pos);
417 } else if (type & IRQ_TYPE_EDGE_FALLING) {
418 mcp->cache[MCP_INTCON] &= ~BIT(pos);
419 mcp->irq_rise &= ~BIT(pos);
420 mcp->irq_fall |= BIT(pos);
421 } else
422 return -EINVAL;
423
424 return status;
425 }
426
427 static void mcp23s08_irq_bus_lock(struct irq_data *data)
428 {
429 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
430
431 mutex_lock(&mcp->irq_lock);
432 }
433
434 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
435 {
436 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
437
438 mutex_lock(&mcp->lock);
439 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
440 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
441 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
442 mutex_unlock(&mcp->lock);
443 mutex_unlock(&mcp->irq_lock);
444 }
445
446 static int mcp23s08_irq_reqres(struct irq_data *data)
447 {
448 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
449
450 if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) {
451 dev_err(mcp->chip.parent,
452 "unable to lock HW IRQ %lu for IRQ usage\n",
453 data->hwirq);
454 return -EINVAL;
455 }
456
457 return 0;
458 }
459
460 static void mcp23s08_irq_relres(struct irq_data *data)
461 {
462 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
463
464 gpiochip_unlock_as_irq(&mcp->chip, data->hwirq);
465 }
466
467 static struct irq_chip mcp23s08_irq_chip = {
468 .name = "gpio-mcp23xxx",
469 .irq_mask = mcp23s08_irq_mask,
470 .irq_unmask = mcp23s08_irq_unmask,
471 .irq_set_type = mcp23s08_irq_set_type,
472 .irq_bus_lock = mcp23s08_irq_bus_lock,
473 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
474 .irq_request_resources = mcp23s08_irq_reqres,
475 .irq_release_resources = mcp23s08_irq_relres,
476 };
477
478 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
479 {
480 struct gpio_chip *chip = &mcp->chip;
481 int err, irq, j;
482 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
483
484 mutex_init(&mcp->irq_lock);
485
486 mcp->irq_domain = irq_domain_add_linear(chip->parent->of_node,
487 chip->ngpio,
488 &irq_domain_simple_ops, mcp);
489 if (!mcp->irq_domain)
490 return -ENODEV;
491
492 if (mcp->irq_active_high)
493 irqflags |= IRQF_TRIGGER_HIGH;
494 else
495 irqflags |= IRQF_TRIGGER_LOW;
496
497 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
498 mcp23s08_irq,
499 irqflags, dev_name(chip->parent), mcp);
500 if (err != 0) {
501 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
502 mcp->irq, err);
503 return err;
504 }
505
506 chip->to_irq = mcp23s08_gpio_to_irq;
507
508 for (j = 0; j < mcp->chip.ngpio; j++) {
509 irq = irq_create_mapping(mcp->irq_domain, j);
510 irq_set_lockdep_class(irq, &gpio_lock_class);
511 irq_set_chip_data(irq, mcp);
512 irq_set_chip(irq, &mcp23s08_irq_chip);
513 irq_set_nested_thread(irq, true);
514 irq_set_noprobe(irq);
515 }
516 return 0;
517 }
518
519 static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
520 {
521 unsigned int irq, i;
522
523 for (i = 0; i < mcp->chip.ngpio; i++) {
524 irq = irq_find_mapping(mcp->irq_domain, i);
525 if (irq > 0)
526 irq_dispose_mapping(irq);
527 }
528
529 irq_domain_remove(mcp->irq_domain);
530 }
531
532 /*----------------------------------------------------------------------*/
533
534 #ifdef CONFIG_DEBUG_FS
535
536 #include <linux/seq_file.h>
537
538 /*
539 * This shows more info than the generic gpio dump code:
540 * pullups, deglitching, open drain drive.
541 */
542 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
543 {
544 struct mcp23s08 *mcp;
545 char bank;
546 int t;
547 unsigned mask;
548
549 mcp = gpiochip_get_data(chip);
550
551 /* NOTE: we only handle one bank for now ... */
552 bank = '0' + ((mcp->addr >> 1) & 0x7);
553
554 mutex_lock(&mcp->lock);
555 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
556 if (t < 0) {
557 seq_printf(s, " I/O ERROR %d\n", t);
558 goto done;
559 }
560
561 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
562 const char *label;
563
564 label = gpiochip_is_requested(chip, t);
565 if (!label)
566 continue;
567
568 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
569 chip->base + t, bank, t, label,
570 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
571 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
572 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
573 /* NOTE: ignoring the irq-related registers */
574 seq_puts(s, "\n");
575 }
576 done:
577 mutex_unlock(&mcp->lock);
578 }
579
580 #else
581 #define mcp23s08_dbg_show NULL
582 #endif
583
584 /*----------------------------------------------------------------------*/
585
586 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
587 void *data, unsigned addr, unsigned type,
588 struct mcp23s08_platform_data *pdata, int cs)
589 {
590 int status;
591 bool mirror = false;
592
593 mutex_init(&mcp->lock);
594
595 mcp->data = data;
596 mcp->addr = addr;
597 mcp->irq_active_high = false;
598
599 mcp->chip.direction_input = mcp23s08_direction_input;
600 mcp->chip.get = mcp23s08_get;
601 mcp->chip.direction_output = mcp23s08_direction_output;
602 mcp->chip.set = mcp23s08_set;
603 mcp->chip.dbg_show = mcp23s08_dbg_show;
604 #ifdef CONFIG_OF
605 mcp->chip.of_gpio_n_cells = 2;
606 mcp->chip.of_node = dev->of_node;
607 #endif
608
609 switch (type) {
610 #ifdef CONFIG_SPI_MASTER
611 case MCP_TYPE_S08:
612 mcp->ops = &mcp23s08_ops;
613 mcp->chip.ngpio = 8;
614 mcp->chip.label = "mcp23s08";
615 break;
616
617 case MCP_TYPE_S17:
618 mcp->ops = &mcp23s17_ops;
619 mcp->chip.ngpio = 16;
620 mcp->chip.label = "mcp23s17";
621 break;
622
623 case MCP_TYPE_S18:
624 mcp->ops = &mcp23s17_ops;
625 mcp->chip.ngpio = 16;
626 mcp->chip.label = "mcp23s18";
627 break;
628 #endif /* CONFIG_SPI_MASTER */
629
630 #if IS_ENABLED(CONFIG_I2C)
631 case MCP_TYPE_008:
632 mcp->ops = &mcp23008_ops;
633 mcp->chip.ngpio = 8;
634 mcp->chip.label = "mcp23008";
635 break;
636
637 case MCP_TYPE_017:
638 mcp->ops = &mcp23017_ops;
639 mcp->chip.ngpio = 16;
640 mcp->chip.label = "mcp23017";
641 break;
642 #endif /* CONFIG_I2C */
643
644 default:
645 dev_err(dev, "invalid device type (%d)\n", type);
646 return -EINVAL;
647 }
648
649 mcp->chip.base = pdata->base;
650 mcp->chip.can_sleep = true;
651 mcp->chip.parent = dev;
652 mcp->chip.owner = THIS_MODULE;
653
654 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
655 * and MCP_IOCON.HAEN = 1, so we work with all chips.
656 */
657
658 status = mcp->ops->read(mcp, MCP_IOCON);
659 if (status < 0)
660 goto fail;
661
662 mcp->irq_controller = pdata->irq_controller;
663 if (mcp->irq && mcp->irq_controller) {
664 mcp->irq_active_high =
665 of_property_read_bool(mcp->chip.parent->of_node,
666 "microchip,irq-active-high");
667
668 mirror = pdata->mirror;
669 }
670
671 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
672 mcp->irq_active_high) {
673 /* mcp23s17 has IOCON twice, make sure they are in sync */
674 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
675 status |= IOCON_HAEN | (IOCON_HAEN << 8);
676 if (mcp->irq_active_high)
677 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
678 else
679 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
680
681 if (mirror)
682 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
683
684 if (type == MCP_TYPE_S18)
685 status |= IOCON_INTCC | (IOCON_INTCC << 8);
686
687 status = mcp->ops->write(mcp, MCP_IOCON, status);
688 if (status < 0)
689 goto fail;
690 }
691
692 /* configure ~100K pullups */
693 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
694 if (status < 0)
695 goto fail;
696
697 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
698 if (status < 0)
699 goto fail;
700
701 /* disable inverter on input */
702 if (mcp->cache[MCP_IPOL] != 0) {
703 mcp->cache[MCP_IPOL] = 0;
704 status = mcp->ops->write(mcp, MCP_IPOL, 0);
705 if (status < 0)
706 goto fail;
707 }
708
709 /* disable irqs */
710 if (mcp->cache[MCP_GPINTEN] != 0) {
711 mcp->cache[MCP_GPINTEN] = 0;
712 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
713 if (status < 0)
714 goto fail;
715 }
716
717 status = gpiochip_add_data(&mcp->chip, mcp);
718 if (status < 0)
719 goto fail;
720
721 if (mcp->irq && mcp->irq_controller) {
722 status = mcp23s08_irq_setup(mcp);
723 if (status) {
724 mcp23s08_irq_teardown(mcp);
725 goto fail;
726 }
727 }
728 fail:
729 if (status < 0)
730 dev_dbg(dev, "can't setup chip %d, --> %d\n",
731 addr, status);
732 return status;
733 }
734
735 /*----------------------------------------------------------------------*/
736
737 #ifdef CONFIG_OF
738 #ifdef CONFIG_SPI_MASTER
739 static const struct of_device_id mcp23s08_spi_of_match[] = {
740 {
741 .compatible = "microchip,mcp23s08",
742 .data = (void *) MCP_TYPE_S08,
743 },
744 {
745 .compatible = "microchip,mcp23s17",
746 .data = (void *) MCP_TYPE_S17,
747 },
748 {
749 .compatible = "microchip,mcp23s18",
750 .data = (void *) MCP_TYPE_S18,
751 },
752 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
753 {
754 .compatible = "mcp,mcp23s08",
755 .data = (void *) MCP_TYPE_S08,
756 },
757 {
758 .compatible = "mcp,mcp23s17",
759 .data = (void *) MCP_TYPE_S17,
760 },
761 { },
762 };
763 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
764 #endif
765
766 #if IS_ENABLED(CONFIG_I2C)
767 static const struct of_device_id mcp23s08_i2c_of_match[] = {
768 {
769 .compatible = "microchip,mcp23008",
770 .data = (void *) MCP_TYPE_008,
771 },
772 {
773 .compatible = "microchip,mcp23017",
774 .data = (void *) MCP_TYPE_017,
775 },
776 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
777 {
778 .compatible = "mcp,mcp23008",
779 .data = (void *) MCP_TYPE_008,
780 },
781 {
782 .compatible = "mcp,mcp23017",
783 .data = (void *) MCP_TYPE_017,
784 },
785 { },
786 };
787 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
788 #endif
789 #endif /* CONFIG_OF */
790
791
792 #if IS_ENABLED(CONFIG_I2C)
793
794 static int mcp230xx_probe(struct i2c_client *client,
795 const struct i2c_device_id *id)
796 {
797 struct mcp23s08_platform_data *pdata, local_pdata;
798 struct mcp23s08 *mcp;
799 int status;
800 const struct of_device_id *match;
801
802 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
803 &client->dev);
804 if (match) {
805 pdata = &local_pdata;
806 pdata->base = -1;
807 pdata->chip[0].pullups = 0;
808 pdata->irq_controller = of_property_read_bool(
809 client->dev.of_node,
810 "interrupt-controller");
811 pdata->mirror = of_property_read_bool(client->dev.of_node,
812 "microchip,irq-mirror");
813 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
814 } else {
815 pdata = dev_get_platdata(&client->dev);
816 if (!pdata) {
817 pdata = devm_kzalloc(&client->dev,
818 sizeof(struct mcp23s08_platform_data),
819 GFP_KERNEL);
820 if (!pdata)
821 return -ENOMEM;
822 pdata->base = -1;
823 }
824 }
825
826 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
827 if (!mcp)
828 return -ENOMEM;
829
830 mcp->irq = client->irq;
831 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
832 id->driver_data, pdata, 0);
833 if (status)
834 goto fail;
835
836 i2c_set_clientdata(client, mcp);
837
838 return 0;
839
840 fail:
841 kfree(mcp);
842
843 return status;
844 }
845
846 static int mcp230xx_remove(struct i2c_client *client)
847 {
848 struct mcp23s08 *mcp = i2c_get_clientdata(client);
849
850 if (client->irq && mcp->irq_controller)
851 mcp23s08_irq_teardown(mcp);
852
853 gpiochip_remove(&mcp->chip);
854 kfree(mcp);
855
856 return 0;
857 }
858
859 static const struct i2c_device_id mcp230xx_id[] = {
860 { "mcp23008", MCP_TYPE_008 },
861 { "mcp23017", MCP_TYPE_017 },
862 { },
863 };
864 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
865
866 static struct i2c_driver mcp230xx_driver = {
867 .driver = {
868 .name = "mcp230xx",
869 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
870 },
871 .probe = mcp230xx_probe,
872 .remove = mcp230xx_remove,
873 .id_table = mcp230xx_id,
874 };
875
876 static int __init mcp23s08_i2c_init(void)
877 {
878 return i2c_add_driver(&mcp230xx_driver);
879 }
880
881 static void mcp23s08_i2c_exit(void)
882 {
883 i2c_del_driver(&mcp230xx_driver);
884 }
885
886 #else
887
888 static int __init mcp23s08_i2c_init(void) { return 0; }
889 static void mcp23s08_i2c_exit(void) { }
890
891 #endif /* CONFIG_I2C */
892
893 /*----------------------------------------------------------------------*/
894
895 #ifdef CONFIG_SPI_MASTER
896
897 static int mcp23s08_probe(struct spi_device *spi)
898 {
899 struct mcp23s08_platform_data *pdata, local_pdata;
900 unsigned addr;
901 int chips = 0;
902 struct mcp23s08_driver_data *data;
903 int status, type;
904 unsigned ngpio = 0;
905 const struct of_device_id *match;
906 u32 spi_present_mask = 0;
907
908 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
909 if (match) {
910 type = (int)(uintptr_t)match->data;
911 status = of_property_read_u32(spi->dev.of_node,
912 "microchip,spi-present-mask", &spi_present_mask);
913 if (status) {
914 status = of_property_read_u32(spi->dev.of_node,
915 "mcp,spi-present-mask", &spi_present_mask);
916 if (status) {
917 dev_err(&spi->dev,
918 "DT has no spi-present-mask\n");
919 return -ENODEV;
920 }
921 }
922 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
923 dev_err(&spi->dev, "invalid spi-present-mask\n");
924 return -ENODEV;
925 }
926
927 pdata = &local_pdata;
928 pdata->base = -1;
929 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
930 pdata->chip[addr].pullups = 0;
931 if (spi_present_mask & (1 << addr))
932 chips++;
933 }
934 pdata->irq_controller = of_property_read_bool(
935 spi->dev.of_node,
936 "interrupt-controller");
937 pdata->mirror = of_property_read_bool(spi->dev.of_node,
938 "microchip,irq-mirror");
939 } else {
940 type = spi_get_device_id(spi)->driver_data;
941 pdata = dev_get_platdata(&spi->dev);
942 if (!pdata) {
943 pdata = devm_kzalloc(&spi->dev,
944 sizeof(struct mcp23s08_platform_data),
945 GFP_KERNEL);
946 pdata->base = -1;
947 }
948
949 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
950 if (!pdata->chip[addr].is_present)
951 continue;
952 chips++;
953 if ((type == MCP_TYPE_S08) && (addr > 3)) {
954 dev_err(&spi->dev,
955 "mcp23s08 only supports address 0..3\n");
956 return -EINVAL;
957 }
958 spi_present_mask |= 1 << addr;
959 }
960 }
961
962 if (!chips)
963 return -ENODEV;
964
965 data = devm_kzalloc(&spi->dev,
966 sizeof(*data) + chips * sizeof(struct mcp23s08),
967 GFP_KERNEL);
968 if (!data)
969 return -ENOMEM;
970
971 spi_set_drvdata(spi, data);
972
973 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
974
975 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
976 if (!(spi_present_mask & (1 << addr)))
977 continue;
978 chips--;
979 data->mcp[addr] = &data->chip[chips];
980 data->mcp[addr]->irq = spi->irq;
981 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
982 0x40 | (addr << 1), type, pdata,
983 addr);
984 if (status < 0)
985 goto fail;
986
987 if (pdata->base != -1)
988 pdata->base += data->mcp[addr]->chip.ngpio;
989 ngpio += data->mcp[addr]->chip.ngpio;
990 }
991 data->ngpio = ngpio;
992
993 /* NOTE: these chips have a relatively sane IRQ framework, with
994 * per-signal masking and level/edge triggering. It's not yet
995 * handled here...
996 */
997
998 return 0;
999
1000 fail:
1001 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
1002
1003 if (!data->mcp[addr])
1004 continue;
1005 gpiochip_remove(&data->mcp[addr]->chip);
1006 }
1007 return status;
1008 }
1009
1010 static int mcp23s08_remove(struct spi_device *spi)
1011 {
1012 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
1013 unsigned addr;
1014
1015 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
1016
1017 if (!data->mcp[addr])
1018 continue;
1019
1020 if (spi->irq && data->mcp[addr]->irq_controller)
1021 mcp23s08_irq_teardown(data->mcp[addr]);
1022 gpiochip_remove(&data->mcp[addr]->chip);
1023 }
1024
1025 return 0;
1026 }
1027
1028 static const struct spi_device_id mcp23s08_ids[] = {
1029 { "mcp23s08", MCP_TYPE_S08 },
1030 { "mcp23s17", MCP_TYPE_S17 },
1031 { "mcp23s18", MCP_TYPE_S18 },
1032 { },
1033 };
1034 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1035
1036 static struct spi_driver mcp23s08_driver = {
1037 .probe = mcp23s08_probe,
1038 .remove = mcp23s08_remove,
1039 .id_table = mcp23s08_ids,
1040 .driver = {
1041 .name = "mcp23s08",
1042 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1043 },
1044 };
1045
1046 static int __init mcp23s08_spi_init(void)
1047 {
1048 return spi_register_driver(&mcp23s08_driver);
1049 }
1050
1051 static void mcp23s08_spi_exit(void)
1052 {
1053 spi_unregister_driver(&mcp23s08_driver);
1054 }
1055
1056 #else
1057
1058 static int __init mcp23s08_spi_init(void) { return 0; }
1059 static void mcp23s08_spi_exit(void) { }
1060
1061 #endif /* CONFIG_SPI_MASTER */
1062
1063 /*----------------------------------------------------------------------*/
1064
1065 static int __init mcp23s08_init(void)
1066 {
1067 int ret;
1068
1069 ret = mcp23s08_spi_init();
1070 if (ret)
1071 goto spi_fail;
1072
1073 ret = mcp23s08_i2c_init();
1074 if (ret)
1075 goto i2c_fail;
1076
1077 return 0;
1078
1079 i2c_fail:
1080 mcp23s08_spi_exit();
1081 spi_fail:
1082 return ret;
1083 }
1084 /* register after spi/i2c postcore initcall and before
1085 * subsys initcalls that may rely on these GPIOs
1086 */
1087 subsys_initcall(mcp23s08_init);
1088
1089 static void __exit mcp23s08_exit(void)
1090 {
1091 mcp23s08_spi_exit();
1092 mcp23s08_i2c_exit();
1093 }
1094 module_exit(mcp23s08_exit);
1095
1096 MODULE_LICENSE("GPL");
Linux with added FPC-III support