drivers/gpio/gpio-sch.c

   1 /*
   2  * GPIO interface for Intel Poulsbo SCH
   3  *
   4  *  Copyright (c) 2010 CompuLab Ltd
   5  *  Author: Denis Turischev <denis@compulab.co.il>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License 2 as published
   9  *  by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; see the file COPYING.  If not, write to
  18  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/io.h>
  25 #include <linux/errno.h>
  26 #include <linux/acpi.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/pci_ids.h>
  29
  30 #include <linux/gpio.h>
  31
  32 #define GEN     0x00
  33 #define GIO     0x04
  34 #define GLV     0x08
  35
  36 struct sch_gpio {
  37         struct gpio_chip chip;
  38         spinlock_t lock;
  39         unsigned short iobase;
  40         unsigned short core_base;
  41         unsigned short resume_base;
  42 };
  43
  44 static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio,
  45                                 unsigned reg)
  46 {
  47         unsigned base = 0;
  48
  49         if (gpio >= sch->resume_base) {
  50                 gpio -= sch->resume_base;
  51                 base += 0x20;
  52         }
  53
  54         return base + reg + gpio / 8;
  55 }
  56
  57 static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio)
  58 {
  59         if (gpio >= sch->resume_base)
  60                 gpio -= sch->resume_base;
  61         return gpio % 8;
  62 }
  63
  64 static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg)
  65 {
  66         struct sch_gpio *sch = gpiochip_get_data(gc);
  67         unsigned short offset, bit;
  68         u8 reg_val;
  69
  70         offset = sch_gpio_offset(sch, gpio, reg);
  71         bit = sch_gpio_bit(sch, gpio);
  72
  73         reg_val = !!(inb(sch->iobase + offset) & BIT(bit));
  74
  75         return reg_val;
  76 }
  77
  78 static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg,
  79                              int val)
  80 {
  81         struct sch_gpio *sch = gpiochip_get_data(gc);
  82         unsigned short offset, bit;
  83         u8 reg_val;
  84
  85         offset = sch_gpio_offset(sch, gpio, reg);
  86         bit = sch_gpio_bit(sch, gpio);
  87
  88         reg_val = inb(sch->iobase + offset);
  89
  90         if (val)
  91                 outb(reg_val | BIT(bit), sch->iobase + offset);
  92         else
  93                 outb((reg_val & ~BIT(bit)), sch->iobase + offset);
  94 }
  95
  96 static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
  97 {
  98         struct sch_gpio *sch = gpiochip_get_data(gc);
  99
 100         spin_lock(&sch->lock);
 101         sch_gpio_reg_set(gc, gpio_num, GIO, 1);
 102         spin_unlock(&sch->lock);
 103         return 0;
 104 }
 105
 106 static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
 107 {
 108         return sch_gpio_reg_get(gc, gpio_num, GLV);
 109 }
 110
 111 static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
 112 {
 113         struct sch_gpio *sch = gpiochip_get_data(gc);
 114
 115         spin_lock(&sch->lock);
 116         sch_gpio_reg_set(gc, gpio_num, GLV, val);
 117         spin_unlock(&sch->lock);
 118 }
 119
 120 static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num,
 121                                   int val)
 122 {
 123         struct sch_gpio *sch = gpiochip_get_data(gc);
 124
 125         spin_lock(&sch->lock);
 126         sch_gpio_reg_set(gc, gpio_num, GIO, 0);
 127         spin_unlock(&sch->lock);
 128
 129         /*
 130          * according to the datasheet, writing to the level register has no
 131          * effect when GPIO is programmed as input.
 132          * Actually the the level register is read-only when configured as input.
 133          * Thus presetting the output level before switching to output is _NOT_ possible.
 134          * Hence we set the level after configuring the GPIO as output.
 135          * But we cannot prevent a short low pulse if direction is set to high
 136          * and an external pull-up is connected.
 137          */
 138         sch_gpio_set(gc, gpio_num, val);
 139         return 0;
 140 }
 141
 142 static struct gpio_chip sch_gpio_chip = {
 143         .label                  = "sch_gpio",
 144         .owner                  = THIS_MODULE,
 145         .direction_input        = sch_gpio_direction_in,
 146         .get                    = sch_gpio_get,
 147         .direction_output       = sch_gpio_direction_out,
 148         .set                    = sch_gpio_set,
 149 };
 150
 151 static int sch_gpio_probe(struct platform_device *pdev)
 152 {
 153         struct sch_gpio *sch;
 154         struct resource *res;
 155
 156         sch = devm_kzalloc(&pdev->dev, sizeof(*sch), GFP_KERNEL);
 157         if (!sch)
 158                 return -ENOMEM;
 159
 160         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
 161         if (!res)
 162                 return -EBUSY;
 163
 164         if (!devm_request_region(&pdev->dev, res->start, resource_size(res),
 165                                  pdev->name))
 166                 return -EBUSY;
 167
 168         spin_lock_init(&sch->lock);
 169         sch->iobase = res->start;
 170         sch->chip = sch_gpio_chip;
 171         sch->chip.label = dev_name(&pdev->dev);
 172         sch->chip.parent = &pdev->dev;
 173
 174         switch (pdev->id) {
 175         case PCI_DEVICE_ID_INTEL_SCH_LPC:
 176                 sch->core_base = 0;
 177                 sch->resume_base = 10;
 178                 sch->chip.ngpio = 14;
 179
 180                 /*
 181                  * GPIO[6:0] enabled by default
 182                  * GPIO7 is configured by the CMC as SLPIOVR
 183                  * Enable GPIO[9:8] core powered gpios explicitly
 184                  */
 185                 sch_gpio_reg_set(&sch->chip, 8, GEN, 1);
 186                 sch_gpio_reg_set(&sch->chip, 9, GEN, 1);
 187                 /*
 188                  * SUS_GPIO[2:0] enabled by default
 189                  * Enable SUS_GPIO3 resume powered gpio explicitly
 190                  */
 191                 sch_gpio_reg_set(&sch->chip, 13, GEN, 1);
 192                 break;
 193
 194         case PCI_DEVICE_ID_INTEL_ITC_LPC:
 195                 sch->core_base = 0;
 196                 sch->resume_base = 5;
 197                 sch->chip.ngpio = 14;
 198                 break;
 199
 200         case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
 201                 sch->core_base = 0;
 202                 sch->resume_base = 21;
 203                 sch->chip.ngpio = 30;
 204                 break;
 205
 206         case PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB:
 207                 sch->core_base = 0;
 208                 sch->resume_base = 2;
 209                 sch->chip.ngpio = 8;
 210                 break;
 211
 212         default:
 213                 return -ENODEV;
 214         }
 215
 216         platform_set_drvdata(pdev, sch);
 217
 218         return devm_gpiochip_add_data(&pdev->dev, &sch->chip, sch);
 219 }
 220
 221 static struct platform_driver sch_gpio_driver = {
 222         .driver = {
 223                 .name = "sch_gpio",
 224         },
 225         .probe          = sch_gpio_probe,
 226 };
 227
 228 module_platform_driver(sch_gpio_driver);
 229
 230 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
 231 MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
 232 MODULE_LICENSE("GPL");
 233 MODULE_ALIAS("platform:sch_gpio");