EDAC: i7core, sb_edac: Don't return NOTIFY_BAD from mce_decoder callback
[linux/fpc-iii.git] / drivers / scsi / aacraid / src.c
blobbc0203f3d243e8e8926e1975408017d9dd5f5012
1 /*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Module Name:
26 * src.c
28 * Abstract: Hardware Device Interface for PMC SRC based controllers
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/types.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
45 #include "aacraid.h"
47 static int aac_src_get_sync_status(struct aac_dev *dev);
49 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
53 unsigned long bellbits, bellbits_shifted;
54 int vector_no;
55 int isFastResponse, mode;
56 u32 index, handle;
58 ctx = (struct aac_msix_ctx *)dev_id;
59 dev = ctx->dev;
60 vector_no = ctx->vector_no;
62 if (dev->msi_enabled) {
63 mode = AAC_INT_MODE_MSI;
64 if (vector_no == 0) {
65 bellbits = src_readl(dev, MUnit.ODR_MSI);
66 if (bellbits & 0x40000)
67 mode |= AAC_INT_MODE_AIF;
68 if (bellbits & 0x1000)
69 mode |= AAC_INT_MODE_SYNC;
71 } else {
72 mode = AAC_INT_MODE_INTX;
73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
80 src_writel(dev, MUnit.ODR_C, bellbits);
81 src_readl(dev, MUnit.ODR_C);
83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
96 if (!aac_sync_mode && !dev->msi_enabled) {
97 src_writel(dev, MUnit.ODR_C, bellbits);
98 src_readl(dev, MUnit.ODR_C);
101 if (dev->sync_fib) {
102 if (dev->sync_fib->callback)
103 dev->sync_fib->callback(dev->sync_fib->callback_data,
104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
111 sflags);
112 spin_lock_irqsave(&dev->sync_lock, sflags);
113 if (!list_empty(&dev->sync_fib_list)) {
114 entry = dev->sync_fib_list.next;
115 dev->sync_fib = list_entry(entry,
116 struct fib,
117 fiblink);
118 list_del(entry);
119 send_it = 1;
120 } else {
121 dev->sync_fib = NULL;
123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
124 if (send_it) {
125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
126 (u32)dev->sync_fib->hw_fib_pa,
127 0, 0, 0, 0, 0,
128 NULL, NULL, NULL, NULL, NULL);
131 if (!dev->msi_enabled)
132 mode = 0;
136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 aac_intr_normal(dev, 0, 2, 0, NULL);
139 if (dev->msi_enabled)
140 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
141 mode = 0;
144 if (mode) {
145 index = dev->host_rrq_idx[vector_no];
147 for (;;) {
148 isFastResponse = 0;
149 /* remove toggle bit (31) */
150 handle = (dev->host_rrq[index] & 0x7fffffff);
151 /* check fast response bit (30) */
152 if (handle & 0x40000000)
153 isFastResponse = 1;
154 handle &= 0x0000ffff;
155 if (handle == 0)
156 break;
157 if (dev->msi_enabled && dev->max_msix > 1)
158 atomic_dec(&dev->rrq_outstanding[vector_no]);
159 dev->host_rrq[index++] = 0;
160 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
161 if (index == (vector_no + 1) * dev->vector_cap)
162 index = vector_no * dev->vector_cap;
163 dev->host_rrq_idx[vector_no] = index;
165 mode = 0;
168 return IRQ_HANDLED;
172 * aac_src_disable_interrupt - Disable interrupts
173 * @dev: Adapter
176 static void aac_src_disable_interrupt(struct aac_dev *dev)
178 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
182 * aac_src_enable_interrupt_message - Enable interrupts
183 * @dev: Adapter
186 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
188 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
192 * src_sync_cmd - send a command and wait
193 * @dev: Adapter
194 * @command: Command to execute
195 * @p1: first parameter
196 * @ret: adapter status
198 * This routine will send a synchronous command to the adapter and wait
199 * for its completion.
202 static int src_sync_cmd(struct aac_dev *dev, u32 command,
203 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
204 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
206 unsigned long start;
207 unsigned long delay;
208 int ok;
211 * Write the command into Mailbox 0
213 writel(command, &dev->IndexRegs->Mailbox[0]);
215 * Write the parameters into Mailboxes 1 - 6
217 writel(p1, &dev->IndexRegs->Mailbox[1]);
218 writel(p2, &dev->IndexRegs->Mailbox[2]);
219 writel(p3, &dev->IndexRegs->Mailbox[3]);
220 writel(p4, &dev->IndexRegs->Mailbox[4]);
223 * Clear the synch command doorbell to start on a clean slate.
225 if (!dev->msi_enabled)
226 src_writel(dev,
227 MUnit.ODR_C,
228 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
231 * Disable doorbell interrupts
233 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
236 * Force the completion of the mask register write before issuing
237 * the interrupt.
239 src_readl(dev, MUnit.OIMR);
242 * Signal that there is a new synch command
244 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
246 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
247 ok = 0;
248 start = jiffies;
250 if (command == IOP_RESET_ALWAYS) {
251 /* Wait up to 10 sec */
252 delay = 10*HZ;
253 } else {
254 /* Wait up to 5 minutes */
255 delay = 300*HZ;
257 while (time_before(jiffies, start+delay)) {
258 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
260 * Mon960 will set doorbell0 bit when it has completed the command.
262 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
264 * Clear the doorbell.
266 if (dev->msi_enabled)
267 aac_src_access_devreg(dev,
268 AAC_CLEAR_SYNC_BIT);
269 else
270 src_writel(dev,
271 MUnit.ODR_C,
272 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
273 ok = 1;
274 break;
277 * Yield the processor in case we are slow
279 msleep(1);
281 if (unlikely(ok != 1)) {
283 * Restore interrupt mask even though we timed out
285 aac_adapter_enable_int(dev);
286 return -ETIMEDOUT;
289 * Pull the synch status from Mailbox 0.
291 if (status)
292 *status = readl(&dev->IndexRegs->Mailbox[0]);
293 if (r1)
294 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
295 if (r2)
296 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
297 if (r3)
298 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
299 if (r4)
300 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
301 if (command == GET_COMM_PREFERRED_SETTINGS)
302 dev->max_msix =
303 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
305 * Clear the synch command doorbell.
307 if (!dev->msi_enabled)
308 src_writel(dev,
309 MUnit.ODR_C,
310 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
314 * Restore interrupt mask
316 aac_adapter_enable_int(dev);
317 return 0;
321 * aac_src_interrupt_adapter - interrupt adapter
322 * @dev: Adapter
324 * Send an interrupt to the i960 and breakpoint it.
327 static void aac_src_interrupt_adapter(struct aac_dev *dev)
329 src_sync_cmd(dev, BREAKPOINT_REQUEST,
330 0, 0, 0, 0, 0, 0,
331 NULL, NULL, NULL, NULL, NULL);
335 * aac_src_notify_adapter - send an event to the adapter
336 * @dev: Adapter
337 * @event: Event to send
339 * Notify the i960 that something it probably cares about has
340 * happened.
343 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
345 switch (event) {
347 case AdapNormCmdQue:
348 src_writel(dev, MUnit.ODR_C,
349 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
350 break;
351 case HostNormRespNotFull:
352 src_writel(dev, MUnit.ODR_C,
353 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
354 break;
355 case AdapNormRespQue:
356 src_writel(dev, MUnit.ODR_C,
357 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
358 break;
359 case HostNormCmdNotFull:
360 src_writel(dev, MUnit.ODR_C,
361 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
362 break;
363 case FastIo:
364 src_writel(dev, MUnit.ODR_C,
365 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
366 break;
367 case AdapPrintfDone:
368 src_writel(dev, MUnit.ODR_C,
369 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
370 break;
371 default:
372 BUG();
373 break;
378 * aac_src_start_adapter - activate adapter
379 * @dev: Adapter
381 * Start up processing on an i960 based AAC adapter
384 static void aac_src_start_adapter(struct aac_dev *dev)
386 struct aac_init *init;
387 int i;
389 /* reset host_rrq_idx first */
390 for (i = 0; i < dev->max_msix; i++) {
391 dev->host_rrq_idx[i] = i * dev->vector_cap;
392 atomic_set(&dev->rrq_outstanding[i], 0);
394 dev->fibs_pushed_no = 0;
396 init = dev->init;
397 init->HostElapsedSeconds = cpu_to_le32(get_seconds());
399 /* We can only use a 32 bit address here */
400 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
401 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
405 * aac_src_check_health
406 * @dev: device to check if healthy
408 * Will attempt to determine if the specified adapter is alive and
409 * capable of handling requests, returning 0 if alive.
411 static int aac_src_check_health(struct aac_dev *dev)
413 u32 status = src_readl(dev, MUnit.OMR);
416 * Check to see if the board failed any self tests.
418 if (unlikely(status & SELF_TEST_FAILED))
419 return -1;
422 * Check to see if the board panic'd.
424 if (unlikely(status & KERNEL_PANIC))
425 return (status >> 16) & 0xFF;
427 * Wait for the adapter to be up and running.
429 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
430 return -3;
432 * Everything is OK
434 return 0;
438 * aac_src_deliver_message
439 * @fib: fib to issue
441 * Will send a fib, returning 0 if successful.
443 static int aac_src_deliver_message(struct fib *fib)
445 struct aac_dev *dev = fib->dev;
446 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
447 u32 fibsize;
448 dma_addr_t address;
449 struct aac_fib_xporthdr *pFibX;
450 #if !defined(writeq)
451 unsigned long flags;
452 #endif
454 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
455 u16 vector_no;
457 atomic_inc(&q->numpending);
459 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest &&
460 dev->max_msix > 1) {
461 vector_no = fib->vector_no;
462 fib->hw_fib_va->header.Handle += (vector_no << 16);
463 } else {
464 vector_no = 0;
467 atomic_inc(&dev->rrq_outstanding[vector_no]);
469 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
470 /* Calculate the amount to the fibsize bits */
471 fibsize = (hdr_size + 127) / 128 - 1;
472 if (fibsize > (ALIGN32 - 1))
473 return -EMSGSIZE;
474 /* New FIB header, 32-bit */
475 address = fib->hw_fib_pa;
476 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
477 fib->hw_fib_va->header.SenderFibAddress = (u32)address;
478 fib->hw_fib_va->header.u.TimeStamp = 0;
479 BUG_ON(upper_32_bits(address) != 0L);
480 address |= fibsize;
481 } else {
482 /* Calculate the amount to the fibsize bits */
483 fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
484 if (fibsize > (ALIGN32 - 1))
485 return -EMSGSIZE;
487 /* Fill XPORT header */
488 pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
489 pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
490 pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
491 pFibX->Size = cpu_to_le32(hdr_size);
494 * The xport header has been 32-byte aligned for us so that fibsize
495 * can be masked out of this address by hardware. -- BenC
497 address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
498 if (address & (ALIGN32 - 1))
499 return -EINVAL;
500 address |= fibsize;
502 #if defined(writeq)
503 src_writeq(dev, MUnit.IQ_L, (u64)address);
504 #else
505 spin_lock_irqsave(&fib->dev->iq_lock, flags);
506 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff);
507 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
508 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
509 #endif
510 return 0;
514 * aac_src_ioremap
515 * @size: mapping resize request
518 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
520 if (!size) {
521 iounmap(dev->regs.src.bar1);
522 dev->regs.src.bar1 = NULL;
523 iounmap(dev->regs.src.bar0);
524 dev->base = dev->regs.src.bar0 = NULL;
525 return 0;
527 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
528 AAC_MIN_SRC_BAR1_SIZE);
529 dev->base = NULL;
530 if (dev->regs.src.bar1 == NULL)
531 return -1;
532 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
533 if (dev->base == NULL) {
534 iounmap(dev->regs.src.bar1);
535 dev->regs.src.bar1 = NULL;
536 return -1;
538 dev->IndexRegs = &((struct src_registers __iomem *)
539 dev->base)->u.tupelo.IndexRegs;
540 return 0;
544 * aac_srcv_ioremap
545 * @size: mapping resize request
548 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
550 if (!size) {
551 iounmap(dev->regs.src.bar0);
552 dev->base = dev->regs.src.bar0 = NULL;
553 return 0;
555 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
556 if (dev->base == NULL)
557 return -1;
558 dev->IndexRegs = &((struct src_registers __iomem *)
559 dev->base)->u.denali.IndexRegs;
560 return 0;
563 static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
565 u32 var, reset_mask;
567 if (bled >= 0) {
568 if (bled)
569 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
570 dev->name, dev->id, bled);
571 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
572 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
573 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
574 if ((bled || (var != 0x00000001)) &&
575 !dev->doorbell_mask)
576 return -EINVAL;
577 else if (dev->doorbell_mask) {
578 reset_mask = dev->doorbell_mask;
579 bled = 0;
580 var = 0x00000001;
583 if ((dev->pdev->device == PMC_DEVICE_S7 ||
584 dev->pdev->device == PMC_DEVICE_S8 ||
585 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) {
586 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
587 dev->msi_enabled = 0;
588 msleep(5000); /* Delay 5 seconds */
591 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 &
592 AAC_OPTION_DOORBELL_RESET)) {
593 src_writel(dev, MUnit.IDR, reset_mask);
594 ssleep(45);
595 } else {
596 src_writel(dev, MUnit.IDR, 0x100);
597 ssleep(45);
601 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
602 return -ENODEV;
604 if (startup_timeout < 300)
605 startup_timeout = 300;
607 return 0;
611 * aac_src_select_comm - Select communications method
612 * @dev: Adapter
613 * @comm: communications method
615 int aac_src_select_comm(struct aac_dev *dev, int comm)
617 switch (comm) {
618 case AAC_COMM_MESSAGE:
619 dev->a_ops.adapter_intr = aac_src_intr_message;
620 dev->a_ops.adapter_deliver = aac_src_deliver_message;
621 break;
622 default:
623 return 1;
625 return 0;
629 * aac_src_init - initialize an Cardinal Frey Bar card
630 * @dev: device to configure
634 int aac_src_init(struct aac_dev *dev)
636 unsigned long start;
637 unsigned long status;
638 int restart = 0;
639 int instance = dev->id;
640 const char *name = dev->name;
642 dev->a_ops.adapter_ioremap = aac_src_ioremap;
643 dev->a_ops.adapter_comm = aac_src_select_comm;
645 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
646 if (aac_adapter_ioremap(dev, dev->base_size)) {
647 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
648 goto error_iounmap;
651 /* Failure to reset here is an option ... */
652 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
653 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
654 if ((aac_reset_devices || reset_devices) &&
655 !aac_src_restart_adapter(dev, 0))
656 ++restart;
658 * Check to see if the board panic'd while booting.
660 status = src_readl(dev, MUnit.OMR);
661 if (status & KERNEL_PANIC) {
662 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
663 goto error_iounmap;
664 ++restart;
667 * Check to see if the board failed any self tests.
669 status = src_readl(dev, MUnit.OMR);
670 if (status & SELF_TEST_FAILED) {
671 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
672 dev->name, instance);
673 goto error_iounmap;
676 * Check to see if the monitor panic'd while booting.
678 if (status & MONITOR_PANIC) {
679 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
680 dev->name, instance);
681 goto error_iounmap;
683 start = jiffies;
685 * Wait for the adapter to be up and running. Wait up to 3 minutes
687 while (!((status = src_readl(dev, MUnit.OMR)) &
688 KERNEL_UP_AND_RUNNING)) {
689 if ((restart &&
690 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
691 time_after(jiffies, start+HZ*startup_timeout)) {
692 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
693 dev->name, instance, status);
694 goto error_iounmap;
696 if (!restart &&
697 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
698 time_after(jiffies, start + HZ *
699 ((startup_timeout > 60)
700 ? (startup_timeout - 60)
701 : (startup_timeout / 2))))) {
702 if (likely(!aac_src_restart_adapter(dev,
703 aac_src_check_health(dev))))
704 start = jiffies;
705 ++restart;
707 msleep(1);
709 if (restart && aac_commit)
710 aac_commit = 1;
712 * Fill in the common function dispatch table.
714 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
715 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
716 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
717 dev->a_ops.adapter_notify = aac_src_notify_adapter;
718 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
719 dev->a_ops.adapter_check_health = aac_src_check_health;
720 dev->a_ops.adapter_restart = aac_src_restart_adapter;
721 dev->a_ops.adapter_start = aac_src_start_adapter;
724 * First clear out all interrupts. Then enable the one's that we
725 * can handle.
727 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
728 aac_adapter_disable_int(dev);
729 src_writel(dev, MUnit.ODR_C, 0xffffffff);
730 aac_adapter_enable_int(dev);
732 if (aac_init_adapter(dev) == NULL)
733 goto error_iounmap;
734 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
735 goto error_iounmap;
737 dev->msi = !pci_enable_msi(dev->pdev);
739 dev->aac_msix[0].vector_no = 0;
740 dev->aac_msix[0].dev = dev;
742 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
743 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
745 if (dev->msi)
746 pci_disable_msi(dev->pdev);
748 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
749 name, instance);
750 goto error_iounmap;
752 dev->dbg_base = pci_resource_start(dev->pdev, 2);
753 dev->dbg_base_mapped = dev->regs.src.bar1;
754 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
755 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
757 aac_adapter_enable_int(dev);
759 if (!dev->sync_mode) {
761 * Tell the adapter that all is configured, and it can
762 * start accepting requests
764 aac_src_start_adapter(dev);
766 return 0;
768 error_iounmap:
770 return -1;
774 * aac_srcv_init - initialize an SRCv card
775 * @dev: device to configure
779 int aac_srcv_init(struct aac_dev *dev)
781 unsigned long start;
782 unsigned long status;
783 int restart = 0;
784 int instance = dev->id;
785 const char *name = dev->name;
787 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
788 dev->a_ops.adapter_comm = aac_src_select_comm;
790 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
791 if (aac_adapter_ioremap(dev, dev->base_size)) {
792 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
793 goto error_iounmap;
796 /* Failure to reset here is an option ... */
797 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
798 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
799 if ((aac_reset_devices || reset_devices) &&
800 !aac_src_restart_adapter(dev, 0))
801 ++restart;
803 * Check to see if flash update is running.
804 * Wait for the adapter to be up and running. Wait up to 5 minutes
806 status = src_readl(dev, MUnit.OMR);
807 if (status & FLASH_UPD_PENDING) {
808 start = jiffies;
809 do {
810 status = src_readl(dev, MUnit.OMR);
811 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
812 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
813 dev->name, instance);
814 goto error_iounmap;
816 } while (!(status & FLASH_UPD_SUCCESS) &&
817 !(status & FLASH_UPD_FAILED));
818 /* Delay 10 seconds.
819 * Because right now FW is doing a soft reset,
820 * do not read scratch pad register at this time
822 ssleep(10);
825 * Check to see if the board panic'd while booting.
827 status = src_readl(dev, MUnit.OMR);
828 if (status & KERNEL_PANIC) {
829 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
830 goto error_iounmap;
831 ++restart;
834 * Check to see if the board failed any self tests.
836 status = src_readl(dev, MUnit.OMR);
837 if (status & SELF_TEST_FAILED) {
838 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
839 goto error_iounmap;
842 * Check to see if the monitor panic'd while booting.
844 if (status & MONITOR_PANIC) {
845 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
846 goto error_iounmap;
848 start = jiffies;
850 * Wait for the adapter to be up and running. Wait up to 3 minutes
852 while (!((status = src_readl(dev, MUnit.OMR)) &
853 KERNEL_UP_AND_RUNNING) ||
854 status == 0xffffffff) {
855 if ((restart &&
856 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
857 time_after(jiffies, start+HZ*startup_timeout)) {
858 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
859 dev->name, instance, status);
860 goto error_iounmap;
862 if (!restart &&
863 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
864 time_after(jiffies, start + HZ *
865 ((startup_timeout > 60)
866 ? (startup_timeout - 60)
867 : (startup_timeout / 2))))) {
868 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
869 start = jiffies;
870 ++restart;
872 msleep(1);
874 if (restart && aac_commit)
875 aac_commit = 1;
877 * Fill in the common function dispatch table.
879 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
880 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
881 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
882 dev->a_ops.adapter_notify = aac_src_notify_adapter;
883 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
884 dev->a_ops.adapter_check_health = aac_src_check_health;
885 dev->a_ops.adapter_restart = aac_src_restart_adapter;
886 dev->a_ops.adapter_start = aac_src_start_adapter;
889 * First clear out all interrupts. Then enable the one's that we
890 * can handle.
892 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
893 aac_adapter_disable_int(dev);
894 src_writel(dev, MUnit.ODR_C, 0xffffffff);
895 aac_adapter_enable_int(dev);
897 if (aac_init_adapter(dev) == NULL)
898 goto error_iounmap;
899 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2)
900 goto error_iounmap;
901 if (dev->msi_enabled)
902 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
904 if (aac_acquire_irq(dev))
905 goto error_iounmap;
907 dev->dbg_base = dev->base_start;
908 dev->dbg_base_mapped = dev->base;
909 dev->dbg_size = dev->base_size;
910 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
912 aac_adapter_enable_int(dev);
914 if (!dev->sync_mode) {
916 * Tell the adapter that all is configured, and it can
917 * start accepting requests
919 aac_src_start_adapter(dev);
921 return 0;
923 error_iounmap:
925 return -1;
928 void aac_src_access_devreg(struct aac_dev *dev, int mode)
930 u_int32_t val;
932 switch (mode) {
933 case AAC_ENABLE_INTERRUPT:
934 src_writel(dev,
935 MUnit.OIMR,
936 dev->OIMR = (dev->msi_enabled ?
937 AAC_INT_ENABLE_TYPE1_MSIX :
938 AAC_INT_ENABLE_TYPE1_INTX));
939 break;
941 case AAC_DISABLE_INTERRUPT:
942 src_writel(dev,
943 MUnit.OIMR,
944 dev->OIMR = AAC_INT_DISABLE_ALL);
945 break;
947 case AAC_ENABLE_MSIX:
948 /* set bit 6 */
949 val = src_readl(dev, MUnit.IDR);
950 val |= 0x40;
951 src_writel(dev, MUnit.IDR, val);
952 src_readl(dev, MUnit.IDR);
953 /* unmask int. */
954 val = PMC_ALL_INTERRUPT_BITS;
955 src_writel(dev, MUnit.IOAR, val);
956 val = src_readl(dev, MUnit.OIMR);
957 src_writel(dev,
958 MUnit.OIMR,
959 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
960 break;
962 case AAC_DISABLE_MSIX:
963 /* reset bit 6 */
964 val = src_readl(dev, MUnit.IDR);
965 val &= ~0x40;
966 src_writel(dev, MUnit.IDR, val);
967 src_readl(dev, MUnit.IDR);
968 break;
970 case AAC_CLEAR_AIF_BIT:
971 /* set bit 5 */
972 val = src_readl(dev, MUnit.IDR);
973 val |= 0x20;
974 src_writel(dev, MUnit.IDR, val);
975 src_readl(dev, MUnit.IDR);
976 break;
978 case AAC_CLEAR_SYNC_BIT:
979 /* set bit 4 */
980 val = src_readl(dev, MUnit.IDR);
981 val |= 0x10;
982 src_writel(dev, MUnit.IDR, val);
983 src_readl(dev, MUnit.IDR);
984 break;
986 case AAC_ENABLE_INTX:
987 /* set bit 7 */
988 val = src_readl(dev, MUnit.IDR);
989 val |= 0x80;
990 src_writel(dev, MUnit.IDR, val);
991 src_readl(dev, MUnit.IDR);
992 /* unmask int. */
993 val = PMC_ALL_INTERRUPT_BITS;
994 src_writel(dev, MUnit.IOAR, val);
995 src_readl(dev, MUnit.IOAR);
996 val = src_readl(dev, MUnit.OIMR);
997 src_writel(dev, MUnit.OIMR,
998 val & (~(PMC_GLOBAL_INT_BIT2)));
999 break;
1001 default:
1002 break;
1006 static int aac_src_get_sync_status(struct aac_dev *dev)
1009 int val;
1011 if (dev->msi_enabled)
1012 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1013 else
1014 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1016 return val;