2 * Copyright (c) 2001-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 /* this file is part of ehci-hcd.c */
18 #ifdef CONFIG_DYNAMIC_DEBUG
21 * check the values in the HCSPARAMS register
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
25 static void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
)
27 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
32 HCS_DEBUG_PORT(params
),
33 HCS_INDICATOR(params
) ? " ind" : "",
36 HCS_PORTROUTED(params
) ? "" : " ordered",
37 HCS_PPC(params
) ? "" : " !ppc",
39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
40 if (HCS_PORTROUTED(params
)) {
42 char buf
[46], tmp
[7], byte
;
45 for (i
= 0; i
< HCS_N_PORTS(params
); i
++) {
46 /* FIXME MIPS won't readb() ... */
47 byte
= readb(&ehci
->caps
->portroute
[(i
>> 1)]);
49 (i
& 0x1) ? byte
& 0xf : (byte
>> 4) & 0xf);
52 ehci_dbg(ehci
, "%s portroute %s\n", label
, buf
);
57 static inline void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
) {}
61 #ifdef CONFIG_DYNAMIC_DEBUG
64 * check the values in the HCCPARAMS register
65 * (host controller _Capability_ parameters)
66 * see EHCI Spec, Table 2-5 for each value
68 static void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
)
70 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
72 if (HCC_ISOC_CACHE(params
)) {
74 "%s hcc_params %04x caching frame %s%s%s\n",
76 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
77 HCC_CANPARK(params
) ? " park" : "",
78 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "");
81 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
84 HCC_ISOC_THRES(params
),
85 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
86 HCC_CANPARK(params
) ? " park" : "",
87 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "",
88 HCC_LPM(params
) ? " LPM" : "",
89 HCC_PER_PORT_CHANGE_EVENT(params
) ? " ppce" : "",
90 HCC_HW_PREFETCH(params
) ? " hw prefetch" : "",
91 HCC_32FRAME_PERIODIC_LIST(params
) ?
92 " 32 periodic list" : "");
97 static inline void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
) {}
101 #ifdef CONFIG_DYNAMIC_DEBUG
103 static void __maybe_unused
104 dbg_qtd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
106 ehci_dbg(ehci
, "%s td %p n%08x %08x t%08x p0=%08x\n", label
, qtd
,
107 hc32_to_cpup(ehci
, &qtd
->hw_next
),
108 hc32_to_cpup(ehci
, &qtd
->hw_alt_next
),
109 hc32_to_cpup(ehci
, &qtd
->hw_token
),
110 hc32_to_cpup(ehci
, &qtd
->hw_buf
[0]));
112 ehci_dbg(ehci
, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
113 hc32_to_cpup(ehci
, &qtd
->hw_buf
[1]),
114 hc32_to_cpup(ehci
, &qtd
->hw_buf
[2]),
115 hc32_to_cpup(ehci
, &qtd
->hw_buf
[3]),
116 hc32_to_cpup(ehci
, &qtd
->hw_buf
[4]));
119 static void __maybe_unused
120 dbg_qh(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
122 struct ehci_qh_hw
*hw
= qh
->hw
;
124 ehci_dbg(ehci
, "%s qh %p n%08x info %x %x qtd %x\n", label
,
125 qh
, hw
->hw_next
, hw
->hw_info1
, hw
->hw_info2
, hw
->hw_current
);
126 dbg_qtd("overlay", ehci
, (struct ehci_qtd
*) &hw
->hw_qtd_next
);
129 static void __maybe_unused
130 dbg_itd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_itd
*itd
)
132 ehci_dbg(ehci
, "%s [%d] itd %p, next %08x, urb %p\n",
133 label
, itd
->frame
, itd
, hc32_to_cpu(ehci
, itd
->hw_next
),
136 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
137 hc32_to_cpu(ehci
, itd
->hw_transaction
[0]),
138 hc32_to_cpu(ehci
, itd
->hw_transaction
[1]),
139 hc32_to_cpu(ehci
, itd
->hw_transaction
[2]),
140 hc32_to_cpu(ehci
, itd
->hw_transaction
[3]),
141 hc32_to_cpu(ehci
, itd
->hw_transaction
[4]),
142 hc32_to_cpu(ehci
, itd
->hw_transaction
[5]),
143 hc32_to_cpu(ehci
, itd
->hw_transaction
[6]),
144 hc32_to_cpu(ehci
, itd
->hw_transaction
[7]));
146 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
147 hc32_to_cpu(ehci
, itd
->hw_bufp
[0]),
148 hc32_to_cpu(ehci
, itd
->hw_bufp
[1]),
149 hc32_to_cpu(ehci
, itd
->hw_bufp
[2]),
150 hc32_to_cpu(ehci
, itd
->hw_bufp
[3]),
151 hc32_to_cpu(ehci
, itd
->hw_bufp
[4]),
152 hc32_to_cpu(ehci
, itd
->hw_bufp
[5]),
153 hc32_to_cpu(ehci
, itd
->hw_bufp
[6]));
154 ehci_dbg(ehci
, " index: %d %d %d %d %d %d %d %d\n",
155 itd
->index
[0], itd
->index
[1], itd
->index
[2],
156 itd
->index
[3], itd
->index
[4], itd
->index
[5],
157 itd
->index
[6], itd
->index
[7]);
160 static void __maybe_unused
161 dbg_sitd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_sitd
*sitd
)
163 ehci_dbg(ehci
, "%s [%d] sitd %p, next %08x, urb %p\n",
164 label
, sitd
->frame
, sitd
, hc32_to_cpu(ehci
, sitd
->hw_next
),
167 " addr %08x sched %04x result %08x buf %08x %08x\n",
168 hc32_to_cpu(ehci
, sitd
->hw_fullspeed_ep
),
169 hc32_to_cpu(ehci
, sitd
->hw_uframe
),
170 hc32_to_cpu(ehci
, sitd
->hw_results
),
171 hc32_to_cpu(ehci
, sitd
->hw_buf
[0]),
172 hc32_to_cpu(ehci
, sitd
->hw_buf
[1]));
175 static int __maybe_unused
176 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
178 return scnprintf(buf
, len
,
179 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
180 label
, label
[0] ? " " : "", status
,
181 (status
& STS_PPCE_MASK
) ? " PPCE" : "",
182 (status
& STS_ASS
) ? " Async" : "",
183 (status
& STS_PSS
) ? " Periodic" : "",
184 (status
& STS_RECL
) ? " Recl" : "",
185 (status
& STS_HALT
) ? " Halt" : "",
186 (status
& STS_IAA
) ? " IAA" : "",
187 (status
& STS_FATAL
) ? " FATAL" : "",
188 (status
& STS_FLR
) ? " FLR" : "",
189 (status
& STS_PCD
) ? " PCD" : "",
190 (status
& STS_ERR
) ? " ERR" : "",
191 (status
& STS_INT
) ? " INT" : "");
194 static int __maybe_unused
195 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
197 return scnprintf(buf
, len
,
198 "%s%sintrenable %02x%s%s%s%s%s%s%s",
199 label
, label
[0] ? " " : "", enable
,
200 (enable
& STS_PPCE_MASK
) ? " PPCE" : "",
201 (enable
& STS_IAA
) ? " IAA" : "",
202 (enable
& STS_FATAL
) ? " FATAL" : "",
203 (enable
& STS_FLR
) ? " FLR" : "",
204 (enable
& STS_PCD
) ? " PCD" : "",
205 (enable
& STS_ERR
) ? " ERR" : "",
206 (enable
& STS_INT
) ? " INT" : "");
209 static const char *const fls_strings
[] = { "1024", "512", "256", "??" };
212 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
214 return scnprintf(buf
, len
,
215 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
217 label
, label
[0] ? " " : "", command
,
218 (command
& CMD_HIRD
) ? " HIRD" : "",
219 (command
& CMD_PPCEE
) ? " PPCEE" : "",
220 (command
& CMD_FSP
) ? " FSP" : "",
221 (command
& CMD_ASPE
) ? " ASPE" : "",
222 (command
& CMD_PSPE
) ? " PSPE" : "",
223 (command
& CMD_PARK
) ? " park" : "(park)",
224 CMD_PARK_CNT(command
),
225 (command
>> 16) & 0x3f,
226 (command
& CMD_LRESET
) ? " LReset" : "",
227 (command
& CMD_IAAD
) ? " IAAD" : "",
228 (command
& CMD_ASE
) ? " Async" : "",
229 (command
& CMD_PSE
) ? " Periodic" : "",
230 fls_strings
[(command
>> 2) & 0x3],
231 (command
& CMD_RESET
) ? " Reset" : "",
232 (command
& CMD_RUN
) ? "RUN" : "HALT");
236 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
240 /* signaling state */
241 switch (status
& (3 << 10)) {
245 case 1 << 10: /* low speed */
256 return scnprintf(buf
, len
,
257 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
258 "sig=%s%s%s%s%s%s%s%s%s%s%s",
259 label
, label
[0] ? " " : "", port
, status
,
260 status
>> 25, /*device address */
261 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ACK
?
263 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_NYET
?
265 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_STALL
?
267 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ERR
?
269 (status
& PORT_POWER
) ? " POWER" : "",
270 (status
& PORT_OWNER
) ? " OWNER" : "",
272 (status
& PORT_LPM
) ? " LPM" : "",
273 (status
& PORT_RESET
) ? " RESET" : "",
274 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
275 (status
& PORT_RESUME
) ? " RESUME" : "",
276 (status
& PORT_OCC
) ? " OCC" : "",
277 (status
& PORT_OC
) ? " OC" : "",
278 (status
& PORT_PEC
) ? " PEC" : "",
279 (status
& PORT_PE
) ? " PE" : "",
280 (status
& PORT_CSC
) ? " CSC" : "",
281 (status
& PORT_CONNECT
) ? " CONNECT" : "");
285 static inline void __maybe_unused
286 dbg_qh(char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
289 static inline int __maybe_unused
290 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
295 static inline int __maybe_unused
296 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
301 static inline int __maybe_unused
302 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
307 static inline int __maybe_unused
308 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
313 #endif /* CONFIG_DYNAMIC_DEBUG */
316 dbg_status(struct ehci_hcd
*ehci
, const char *label
, u32 status
)
320 dbg_status_buf(buf
, sizeof(buf
), label
, status
);
321 ehci_dbg(ehci
, "%s\n", buf
);
325 dbg_cmd(struct ehci_hcd
*ehci
, const char *label
, u32 command
)
329 dbg_command_buf(buf
, sizeof(buf
), label
, command
);
330 ehci_dbg(ehci
, "%s\n", buf
);
334 dbg_port(struct ehci_hcd
*ehci
, const char *label
, int port
, u32 status
)
338 dbg_port_buf(buf
, sizeof(buf
), label
, port
, status
);
339 ehci_dbg(ehci
, "%s\n", buf
);
342 /*-------------------------------------------------------------------------*/
344 #ifndef CONFIG_DYNAMIC_DEBUG
346 static inline void create_debug_files(struct ehci_hcd
*bus
) { }
347 static inline void remove_debug_files(struct ehci_hcd
*bus
) { }
351 /* troubleshooting help: expose state in debugfs */
353 static int debug_async_open(struct inode
*, struct file
*);
354 static int debug_bandwidth_open(struct inode
*, struct file
*);
355 static int debug_periodic_open(struct inode
*, struct file
*);
356 static int debug_registers_open(struct inode
*, struct file
*);
358 static ssize_t
debug_output(struct file
*, char __user
*, size_t, loff_t
*);
359 static int debug_close(struct inode
*, struct file
*);
361 static const struct file_operations debug_async_fops
= {
362 .owner
= THIS_MODULE
,
363 .open
= debug_async_open
,
364 .read
= debug_output
,
365 .release
= debug_close
,
366 .llseek
= default_llseek
,
369 static const struct file_operations debug_bandwidth_fops
= {
370 .owner
= THIS_MODULE
,
371 .open
= debug_bandwidth_open
,
372 .read
= debug_output
,
373 .release
= debug_close
,
374 .llseek
= default_llseek
,
377 static const struct file_operations debug_periodic_fops
= {
378 .owner
= THIS_MODULE
,
379 .open
= debug_periodic_open
,
380 .read
= debug_output
,
381 .release
= debug_close
,
382 .llseek
= default_llseek
,
385 static const struct file_operations debug_registers_fops
= {
386 .owner
= THIS_MODULE
,
387 .open
= debug_registers_open
,
388 .read
= debug_output
,
389 .release
= debug_close
,
390 .llseek
= default_llseek
,
393 static struct dentry
*ehci_debug_root
;
395 struct debug_buffer
{
396 ssize_t (*fill_func
)(struct debug_buffer
*); /* fill method */
398 struct mutex mutex
; /* protect filling of buffer */
399 size_t count
; /* number of characters filled into buffer */
404 static inline char speed_char(u32 info1
)
406 switch (info1
& (3 << 12)) {
418 static inline char token_mark(struct ehci_hcd
*ehci
, __hc32 token
)
420 __u32 v
= hc32_to_cpu(ehci
, token
);
422 if (v
& QTD_STS_ACTIVE
)
424 if (v
& QTD_STS_HALT
)
426 if (!IS_SHORT_READ(v
))
428 /* tries to advance through hw_alt_next */
432 static void qh_lines(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
,
433 char **nextp
, unsigned *sizep
)
437 struct list_head
*entry
;
440 unsigned size
= *sizep
;
443 __le32 list_end
= EHCI_LIST_END(ehci
);
444 struct ehci_qh_hw
*hw
= qh
->hw
;
446 if (hw
->hw_qtd_next
== list_end
) /* NEC does this */
449 mark
= token_mark(ehci
, hw
->hw_token
);
450 if (mark
== '/') { /* qh_alt_next controls qh advance? */
451 if ((hw
->hw_alt_next
& QTD_MASK(ehci
))
452 == ehci
->async
->hw
->hw_alt_next
)
453 mark
= '#'; /* blocked */
454 else if (hw
->hw_alt_next
== list_end
)
455 mark
= '.'; /* use hw_qtd_next */
456 /* else alt_next points to some other qtd */
458 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
459 hw_curr
= (mark
== '*') ? hc32_to_cpup(ehci
, &hw
->hw_current
) : 0;
460 temp
= scnprintf(next
, size
,
461 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
462 " [cur %08x next %08x buf[0] %08x]",
463 qh
, scratch
& 0x007f,
464 speed_char (scratch
),
465 (scratch
>> 8) & 0x000f,
466 scratch
, hc32_to_cpup(ehci
, &hw
->hw_info2
),
467 hc32_to_cpup(ehci
, &hw
->hw_token
), mark
,
468 (cpu_to_hc32(ehci
, QTD_TOGGLE
) & hw
->hw_token
)
470 (hc32_to_cpup(ehci
, &hw
->hw_alt_next
) >> 1) & 0x0f,
471 hc32_to_cpup(ehci
, &hw
->hw_current
),
472 hc32_to_cpup(ehci
, &hw
->hw_qtd_next
),
473 hc32_to_cpup(ehci
, &hw
->hw_buf
[0]));
477 /* hc may be modifying the list as we read it ... */
478 list_for_each(entry
, &qh
->qtd_list
) {
481 td
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
482 scratch
= hc32_to_cpup(ehci
, &td
->hw_token
);
484 if (hw_curr
== td
->qtd_dma
) {
486 } else if (hw
->hw_qtd_next
== cpu_to_hc32(ehci
, td
->qtd_dma
)) {
488 } else if (QTD_LENGTH(scratch
)) {
489 if (td
->hw_alt_next
== ehci
->async
->hw
->hw_alt_next
)
491 else if (td
->hw_alt_next
!= list_end
)
494 switch ((scratch
>> 8) & 0x03) {
508 temp
= scnprintf(next
, size
,
509 "\n\t%p%c%s len=%d %08x urb %p"
510 " [td %08x buf[0] %08x]",
512 (scratch
>> 16) & 0x7fff,
516 hc32_to_cpup(ehci
, &td
->hw_buf
[0]));
523 temp
= scnprintf(next
, size
, "\n");
532 static ssize_t
fill_async_buffer(struct debug_buffer
*buf
)
535 struct ehci_hcd
*ehci
;
541 hcd
= bus_to_hcd(buf
->bus
);
542 ehci
= hcd_to_ehci(hcd
);
543 next
= buf
->output_buf
;
544 size
= buf
->alloc_size
;
549 * dumps a snapshot of the async schedule.
550 * usually empty except for long-term bulk reads, or head.
551 * one QH per line, and TDs we know about
553 spin_lock_irqsave(&ehci
->lock
, flags
);
554 for (qh
= ehci
->async
->qh_next
.qh
; size
> 0 && qh
; qh
= qh
->qh_next
.qh
)
555 qh_lines(ehci
, qh
, &next
, &size
);
556 if (!list_empty(&ehci
->async_unlink
) && size
> 0) {
557 temp
= scnprintf(next
, size
, "\nunlink =\n");
561 list_for_each_entry(qh
, &ehci
->async_unlink
, unlink_node
) {
564 qh_lines(ehci
, qh
, &next
, &size
);
567 spin_unlock_irqrestore(&ehci
->lock
, flags
);
569 return strlen(buf
->output_buf
);
572 static ssize_t
fill_bandwidth_buffer(struct debug_buffer
*buf
)
574 struct ehci_hcd
*ehci
;
576 struct ehci_per_sched
*ps
;
582 u8 budget
[EHCI_BANDWIDTH_SIZE
];
584 ehci
= hcd_to_ehci(bus_to_hcd(buf
->bus
));
585 next
= buf
->output_buf
;
586 size
= buf
->alloc_size
;
590 spin_lock_irq(&ehci
->lock
);
592 /* Dump the HS bandwidth table */
593 temp
= scnprintf(next
, size
,
594 "HS bandwidth allocation (us per microframe)\n");
597 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
598 bw
= &ehci
->bandwidth
[i
];
599 temp
= scnprintf(next
, size
,
600 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
601 i
, bw
[0], bw
[1], bw
[2], bw
[3],
602 bw
[4], bw
[5], bw
[6], bw
[7]);
607 /* Dump all the FS/LS tables */
608 list_for_each_entry(tt
, &ehci
->tt_list
, tt_list
) {
609 temp
= scnprintf(next
, size
,
610 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
611 dev_name(&tt
->usb_tt
->hub
->dev
),
612 tt
->tt_port
+ !!tt
->usb_tt
->multi
);
617 temp
= scnprintf(next
, size
,
618 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
619 bf
[0], bf
[1], bf
[2], bf
[3],
620 bf
[4], bf
[5], bf
[6], bf
[7]);
624 temp
= scnprintf(next
, size
,
625 "FS/LS budget (us per microframe)\n");
628 compute_tt_budget(budget
, tt
);
629 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
631 temp
= scnprintf(next
, size
,
632 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
633 i
, bw
[0], bw
[1], bw
[2], bw
[3],
634 bw
[4], bw
[5], bw
[6], bw
[7]);
638 list_for_each_entry(ps
, &tt
->ps_list
, ps_list
) {
639 temp
= scnprintf(next
, size
,
640 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
641 dev_name(&ps
->udev
->dev
),
642 ps
->ep
->desc
.bEndpointAddress
,
644 ps
->bw_phase
, ps
->phase_uf
,
645 ps
->bw_period
, ps
->cs_mask
);
650 spin_unlock_irq(&ehci
->lock
);
652 return next
- buf
->output_buf
;
655 static unsigned output_buf_tds_dir(char *buf
, struct ehci_hcd
*ehci
,
656 struct ehci_qh_hw
*hw
, struct ehci_qh
*qh
, unsigned size
)
658 u32 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
659 struct ehci_qtd
*qtd
;
663 /* count tds, get ep direction */
664 list_for_each_entry(qtd
, &qh
->qtd_list
, qtd_list
) {
666 switch ((hc32_to_cpu(ehci
, qtd
->hw_token
) >> 8) & 0x03) {
676 return scnprintf(buf
, size
, " (%c%d ep%d%s [%d/%d] q%d p%d)",
677 speed_char(scratch
), scratch
& 0x007f,
678 (scratch
>> 8) & 0x000f, type
, qh
->ps
.usecs
,
679 qh
->ps
.c_usecs
, temp
, 0x7ff & (scratch
>> 16));
682 #define DBG_SCHED_LIMIT 64
683 static ssize_t
fill_periodic_buffer(struct debug_buffer
*buf
)
686 struct ehci_hcd
*ehci
;
688 union ehci_shadow p
, *seen
;
689 unsigned temp
, size
, seen_count
;
694 seen
= kmalloc_array(DBG_SCHED_LIMIT
, sizeof(*seen
), GFP_ATOMIC
);
699 hcd
= bus_to_hcd(buf
->bus
);
700 ehci
= hcd_to_ehci(hcd
);
701 next
= buf
->output_buf
;
702 size
= buf
->alloc_size
;
704 temp
= scnprintf(next
, size
, "size = %d\n", ehci
->periodic_size
);
709 * dump a snapshot of the periodic schedule.
710 * iso changes, interrupt usually doesn't.
712 spin_lock_irqsave(&ehci
->lock
, flags
);
713 for (i
= 0; i
< ehci
->periodic_size
; i
++) {
714 p
= ehci
->pshadow
[i
];
717 tag
= Q_NEXT_TYPE(ehci
, ehci
->periodic
[i
]);
719 temp
= scnprintf(next
, size
, "%4d: ", i
);
724 struct ehci_qh_hw
*hw
;
726 switch (hc32_to_cpu(ehci
, tag
)) {
729 temp
= scnprintf(next
, size
, " qh%d-%04x/%p",
734 & (QH_CMASK
| QH_SMASK
),
738 /* don't repeat what follows this qh */
739 for (temp
= 0; temp
< seen_count
; temp
++) {
740 if (seen
[temp
].ptr
!= p
.ptr
)
742 if (p
.qh
->qh_next
.ptr
) {
743 temp
= scnprintf(next
, size
,
750 /* show more info the first time around */
751 if (temp
== seen_count
) {
752 temp
= output_buf_tds_dir(next
, ehci
,
755 if (seen_count
< DBG_SCHED_LIMIT
)
756 seen
[seen_count
++].qh
= p
.qh
;
760 tag
= Q_NEXT_TYPE(ehci
, hw
->hw_next
);
764 temp
= scnprintf(next
, size
,
765 " fstn-%8x/%p", p
.fstn
->hw_prev
,
767 tag
= Q_NEXT_TYPE(ehci
, p
.fstn
->hw_next
);
768 p
= p
.fstn
->fstn_next
;
771 temp
= scnprintf(next
, size
,
773 tag
= Q_NEXT_TYPE(ehci
, p
.itd
->hw_next
);
777 temp
= scnprintf(next
, size
,
779 p
.sitd
->stream
->ps
.period
,
780 hc32_to_cpup(ehci
, &p
.sitd
->hw_uframe
)
783 tag
= Q_NEXT_TYPE(ehci
, p
.sitd
->hw_next
);
784 p
= p
.sitd
->sitd_next
;
791 temp
= scnprintf(next
, size
, "\n");
795 spin_unlock_irqrestore(&ehci
->lock
, flags
);
798 return buf
->alloc_size
- size
;
800 #undef DBG_SCHED_LIMIT
802 static const char *rh_state_string(struct ehci_hcd
*ehci
)
804 switch (ehci
->rh_state
) {
807 case EHCI_RH_SUSPENDED
:
809 case EHCI_RH_RUNNING
:
811 case EHCI_RH_STOPPING
:
817 static ssize_t
fill_registers_buffer(struct debug_buffer
*buf
)
820 struct ehci_hcd
*ehci
;
822 unsigned temp
, size
, i
;
823 char *next
, scratch
[80];
824 static char fmt
[] = "%*s\n";
825 static char label
[] = "";
827 hcd
= bus_to_hcd(buf
->bus
);
828 ehci
= hcd_to_ehci(hcd
);
829 next
= buf
->output_buf
;
830 size
= buf
->alloc_size
;
832 spin_lock_irqsave(&ehci
->lock
, flags
);
834 if (!HCD_HW_ACCESSIBLE(hcd
)) {
835 size
= scnprintf(next
, size
,
836 "bus %s, device %s\n"
838 "SUSPENDED (no register access)\n",
839 hcd
->self
.controller
->bus
->name
,
840 dev_name(hcd
->self
.controller
),
845 /* Capability Registers */
846 i
= HC_VERSION(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
847 temp
= scnprintf(next
, size
,
848 "bus %s, device %s\n"
850 "EHCI %x.%02x, rh state %s\n",
851 hcd
->self
.controller
->bus
->name
,
852 dev_name(hcd
->self
.controller
),
854 i
>> 8, i
& 0x0ff, rh_state_string(ehci
));
859 /* EHCI 0.96 and later may have "extended capabilities" */
860 if (dev_is_pci(hcd
->self
.controller
)) {
861 struct pci_dev
*pdev
;
862 u32 offset
, cap
, cap2
;
863 unsigned count
= 256 / 4;
865 pdev
= to_pci_dev(ehci_to_hcd(ehci
)->self
.controller
);
866 offset
= HCC_EXT_CAPS(ehci_readl(ehci
,
867 &ehci
->caps
->hcc_params
));
868 while (offset
&& count
--) {
869 pci_read_config_dword(pdev
, offset
, &cap
);
870 switch (cap
& 0xff) {
872 temp
= scnprintf(next
, size
,
873 "ownership %08x%s%s\n", cap
,
874 (cap
& (1 << 24)) ? " linux" : "",
875 (cap
& (1 << 16)) ? " firmware" : "");
880 pci_read_config_dword(pdev
, offset
, &cap2
);
881 temp
= scnprintf(next
, size
,
882 "SMI sts/enable 0x%08x\n", cap2
);
886 case 0: /* illegal reserved capability */
889 default: /* unknown */
892 temp
= (cap
>> 8) & 0xff;
897 /* FIXME interpret both types of params */
898 i
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
899 temp
= scnprintf(next
, size
, "structural params 0x%08x\n", i
);
903 i
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
904 temp
= scnprintf(next
, size
, "capability params 0x%08x\n", i
);
908 /* Operational Registers */
909 temp
= dbg_status_buf(scratch
, sizeof(scratch
), label
,
910 ehci_readl(ehci
, &ehci
->regs
->status
));
911 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
915 temp
= dbg_command_buf(scratch
, sizeof(scratch
), label
,
916 ehci_readl(ehci
, &ehci
->regs
->command
));
917 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
921 temp
= dbg_intr_buf(scratch
, sizeof(scratch
), label
,
922 ehci_readl(ehci
, &ehci
->regs
->intr_enable
));
923 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
927 temp
= scnprintf(next
, size
, "uframe %04x\n",
928 ehci_read_frame_index(ehci
));
932 for (i
= 1; i
<= HCS_N_PORTS(ehci
->hcs_params
); i
++) {
933 temp
= dbg_port_buf(scratch
, sizeof(scratch
), label
, i
,
935 &ehci
->regs
->port_status
[i
- 1]));
936 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
939 if (i
== HCS_DEBUG_PORT(ehci
->hcs_params
) && ehci
->debug
) {
940 temp
= scnprintf(next
, size
,
941 " debug control %08x\n",
943 &ehci
->debug
->control
));
949 if (!list_empty(&ehci
->async_unlink
)) {
950 temp
= scnprintf(next
, size
, "async unlink qh %p\n",
951 list_first_entry(&ehci
->async_unlink
,
952 struct ehci_qh
, unlink_node
));
958 temp
= scnprintf(next
, size
,
959 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
960 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.iaa
,
961 ehci
->stats
.lost_iaa
);
965 temp
= scnprintf(next
, size
, "complete %ld unlink %ld\n",
966 ehci
->stats
.complete
, ehci
->stats
.unlink
);
972 spin_unlock_irqrestore(&ehci
->lock
, flags
);
974 return buf
->alloc_size
- size
;
977 static struct debug_buffer
*alloc_buffer(struct usb_bus
*bus
,
978 ssize_t (*fill_func
)(struct debug_buffer
*))
980 struct debug_buffer
*buf
;
982 buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
986 buf
->fill_func
= fill_func
;
987 mutex_init(&buf
->mutex
);
988 buf
->alloc_size
= PAGE_SIZE
;
994 static int fill_buffer(struct debug_buffer
*buf
)
998 if (!buf
->output_buf
)
999 buf
->output_buf
= vmalloc(buf
->alloc_size
);
1001 if (!buf
->output_buf
) {
1006 ret
= buf
->fill_func(buf
);
1017 static ssize_t
debug_output(struct file
*file
, char __user
*user_buf
,
1018 size_t len
, loff_t
*offset
)
1020 struct debug_buffer
*buf
= file
->private_data
;
1023 mutex_lock(&buf
->mutex
);
1024 if (buf
->count
== 0) {
1025 ret
= fill_buffer(buf
);
1027 mutex_unlock(&buf
->mutex
);
1031 mutex_unlock(&buf
->mutex
);
1033 ret
= simple_read_from_buffer(user_buf
, len
, offset
,
1034 buf
->output_buf
, buf
->count
);
1040 static int debug_close(struct inode
*inode
, struct file
*file
)
1042 struct debug_buffer
*buf
= file
->private_data
;
1045 vfree(buf
->output_buf
);
1052 static int debug_async_open(struct inode
*inode
, struct file
*file
)
1054 file
->private_data
= alloc_buffer(inode
->i_private
, fill_async_buffer
);
1056 return file
->private_data
? 0 : -ENOMEM
;
1059 static int debug_bandwidth_open(struct inode
*inode
, struct file
*file
)
1061 file
->private_data
= alloc_buffer(inode
->i_private
,
1062 fill_bandwidth_buffer
);
1064 return file
->private_data
? 0 : -ENOMEM
;
1067 static int debug_periodic_open(struct inode
*inode
, struct file
*file
)
1069 struct debug_buffer
*buf
;
1071 buf
= alloc_buffer(inode
->i_private
, fill_periodic_buffer
);
1075 buf
->alloc_size
= (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE
;
1076 file
->private_data
= buf
;
1080 static int debug_registers_open(struct inode
*inode
, struct file
*file
)
1082 file
->private_data
= alloc_buffer(inode
->i_private
,
1083 fill_registers_buffer
);
1085 return file
->private_data
? 0 : -ENOMEM
;
1088 static inline void create_debug_files(struct ehci_hcd
*ehci
)
1090 struct usb_bus
*bus
= &ehci_to_hcd(ehci
)->self
;
1092 ehci
->debug_dir
= debugfs_create_dir(bus
->bus_name
, ehci_debug_root
);
1093 if (!ehci
->debug_dir
)
1096 if (!debugfs_create_file("async", S_IRUGO
, ehci
->debug_dir
, bus
,
1100 if (!debugfs_create_file("bandwidth", S_IRUGO
, ehci
->debug_dir
, bus
,
1101 &debug_bandwidth_fops
))
1104 if (!debugfs_create_file("periodic", S_IRUGO
, ehci
->debug_dir
, bus
,
1105 &debug_periodic_fops
))
1108 if (!debugfs_create_file("registers", S_IRUGO
, ehci
->debug_dir
, bus
,
1109 &debug_registers_fops
))
1115 debugfs_remove_recursive(ehci
->debug_dir
);
1118 static inline void remove_debug_files(struct ehci_hcd
*ehci
)
1120 debugfs_remove_recursive(ehci
->debug_dir
);
1123 #endif /* CONFIG_DYNAMIC_DEBUG */