Linux 3.16.75
[linux/fpc-iii.git] / drivers / cpufreq / intel_pstate.c
blob087b5c32a6a16538889911ed0715c11a11b03eb7
1 /*
2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
26 #include <linux/fs.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
32 #include <asm/msr.h>
33 #include <asm/cpu_device_id.h>
35 #define BYT_RATIOS 0x66a
36 #define BYT_VIDS 0x66b
37 #define BYT_TURBO_RATIOS 0x66c
38 #define BYT_TURBO_VIDS 0x66d
41 #define FRAC_BITS 8
42 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
43 #define fp_toint(X) ((X) >> FRAC_BITS)
46 static inline int32_t mul_fp(int32_t x, int32_t y)
48 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
51 static inline int32_t div_fp(s64 x, s64 y)
53 return div64_s64((int64_t)x << FRAC_BITS, y);
56 static inline int ceiling_fp(int32_t x)
58 int mask, ret;
60 ret = fp_toint(x);
61 mask = (1 << FRAC_BITS) - 1;
62 if (x & mask)
63 ret += 1;
64 return ret;
67 struct sample {
68 int32_t core_pct_busy;
69 u64 aperf;
70 u64 mperf;
71 int freq;
72 ktime_t time;
75 struct pstate_data {
76 int current_pstate;
77 int min_pstate;
78 int max_pstate;
79 int scaling;
80 int turbo_pstate;
83 struct vid_data {
84 int min;
85 int max;
86 int turbo;
87 int32_t ratio;
90 struct _pid {
91 int setpoint;
92 int32_t integral;
93 int32_t p_gain;
94 int32_t i_gain;
95 int32_t d_gain;
96 int deadband;
97 int32_t last_err;
100 struct cpudata {
101 int cpu;
103 struct timer_list timer;
105 struct pstate_data pstate;
106 struct vid_data vid;
107 struct _pid pid;
109 ktime_t last_sample_time;
110 u64 prev_aperf;
111 u64 prev_mperf;
112 struct sample sample;
115 static struct cpudata **all_cpu_data;
116 struct pstate_adjust_policy {
117 int sample_rate_ms;
118 int deadband;
119 int setpoint;
120 int p_gain_pct;
121 int d_gain_pct;
122 int i_gain_pct;
125 struct pstate_funcs {
126 int (*get_max)(void);
127 int (*get_min)(void);
128 int (*get_turbo)(void);
129 int (*get_scaling)(void);
130 void (*set)(struct cpudata*, int pstate);
131 void (*get_vid)(struct cpudata *);
134 struct cpu_defaults {
135 struct pstate_adjust_policy pid_policy;
136 struct pstate_funcs funcs;
139 static struct pstate_adjust_policy pid_params;
140 static struct pstate_funcs pstate_funcs;
142 struct perf_limits {
143 int no_turbo;
144 int turbo_disabled;
145 int max_perf_pct;
146 int min_perf_pct;
147 int32_t max_perf;
148 int32_t min_perf;
149 int max_policy_pct;
150 int max_sysfs_pct;
153 static struct perf_limits limits = {
154 .no_turbo = 0,
155 .turbo_disabled = 0,
156 .max_perf_pct = 100,
157 .max_perf = int_tofp(1),
158 .min_perf_pct = 0,
159 .min_perf = 0,
160 .max_policy_pct = 100,
161 .max_sysfs_pct = 100,
164 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
165 int deadband, int integral) {
166 pid->setpoint = setpoint;
167 pid->deadband = deadband;
168 pid->integral = int_tofp(integral);
169 pid->last_err = int_tofp(setpoint) - int_tofp(busy);
172 static inline void pid_p_gain_set(struct _pid *pid, int percent)
174 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
177 static inline void pid_i_gain_set(struct _pid *pid, int percent)
179 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
182 static inline void pid_d_gain_set(struct _pid *pid, int percent)
185 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
188 static signed int pid_calc(struct _pid *pid, int32_t busy)
190 signed int result;
191 int32_t pterm, dterm, fp_error;
192 int32_t integral_limit;
194 fp_error = int_tofp(pid->setpoint) - busy;
196 if (abs(fp_error) <= int_tofp(pid->deadband))
197 return 0;
199 pterm = mul_fp(pid->p_gain, fp_error);
201 pid->integral += fp_error;
203 /* limit the integral term */
204 integral_limit = int_tofp(30);
205 if (pid->integral > integral_limit)
206 pid->integral = integral_limit;
207 if (pid->integral < -integral_limit)
208 pid->integral = -integral_limit;
210 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
211 pid->last_err = fp_error;
213 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
214 result = result + (1 << (FRAC_BITS-1));
215 return (signed int)fp_toint(result);
218 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
220 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
221 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
222 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
224 pid_reset(&cpu->pid,
225 pid_params.setpoint,
226 100,
227 pid_params.deadband,
231 static inline void intel_pstate_reset_all_pid(void)
233 unsigned int cpu;
234 for_each_online_cpu(cpu) {
235 if (all_cpu_data[cpu])
236 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
240 static inline void update_turbo_state(void)
242 u64 misc_en;
243 struct cpudata *cpu;
245 cpu = all_cpu_data[0];
246 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);
247 limits.turbo_disabled =
248 (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ||
249 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate);
252 /************************** debugfs begin ************************/
253 static int pid_param_set(void *data, u64 val)
255 *(u32 *)data = val;
256 intel_pstate_reset_all_pid();
257 return 0;
259 static int pid_param_get(void *data, u64 *val)
261 *val = *(u32 *)data;
262 return 0;
264 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
265 pid_param_set, "%llu\n");
267 struct pid_param {
268 char *name;
269 void *value;
272 static struct pid_param pid_files[] = {
273 {"sample_rate_ms", &pid_params.sample_rate_ms},
274 {"d_gain_pct", &pid_params.d_gain_pct},
275 {"i_gain_pct", &pid_params.i_gain_pct},
276 {"deadband", &pid_params.deadband},
277 {"setpoint", &pid_params.setpoint},
278 {"p_gain_pct", &pid_params.p_gain_pct},
279 {NULL, NULL}
282 static struct dentry *debugfs_parent;
283 static void intel_pstate_debug_expose_params(void)
285 int i = 0;
287 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
288 if (IS_ERR_OR_NULL(debugfs_parent))
289 return;
290 while (pid_files[i].name) {
291 debugfs_create_file(pid_files[i].name, 0660,
292 debugfs_parent, pid_files[i].value,
293 &fops_pid_param);
294 i++;
298 /************************** debugfs end ************************/
300 /************************** sysfs begin ************************/
301 #define show_one(file_name, object) \
302 static ssize_t show_##file_name \
303 (struct kobject *kobj, struct attribute *attr, char *buf) \
305 return sprintf(buf, "%u\n", limits.object); \
308 static ssize_t show_no_turbo(struct kobject *kobj,
309 struct attribute *attr, char *buf)
311 ssize_t ret;
313 update_turbo_state();
314 if (limits.turbo_disabled)
315 ret = sprintf(buf, "%u\n", limits.turbo_disabled);
316 else
317 ret = sprintf(buf, "%u\n", limits.no_turbo);
319 return ret;
322 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
323 const char *buf, size_t count)
325 unsigned int input;
326 int ret;
327 ret = sscanf(buf, "%u", &input);
328 if (ret != 1)
329 return -EINVAL;
331 update_turbo_state();
332 if (limits.turbo_disabled) {
333 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
334 return -EPERM;
336 limits.no_turbo = clamp_t(int, input, 0, 1);
338 return count;
341 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
342 const char *buf, size_t count)
344 unsigned int input;
345 int ret;
346 ret = sscanf(buf, "%u", &input);
347 if (ret != 1)
348 return -EINVAL;
350 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
351 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
352 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
353 return count;
356 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
357 const char *buf, size_t count)
359 unsigned int input;
360 int ret;
361 ret = sscanf(buf, "%u", &input);
362 if (ret != 1)
363 return -EINVAL;
364 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
365 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
367 return count;
370 show_one(max_perf_pct, max_perf_pct);
371 show_one(min_perf_pct, min_perf_pct);
373 define_one_global_rw(no_turbo);
374 define_one_global_rw(max_perf_pct);
375 define_one_global_rw(min_perf_pct);
377 static struct attribute *intel_pstate_attributes[] = {
378 &no_turbo.attr,
379 &max_perf_pct.attr,
380 &min_perf_pct.attr,
381 NULL
384 static struct attribute_group intel_pstate_attr_group = {
385 .attrs = intel_pstate_attributes,
387 static struct kobject *intel_pstate_kobject;
389 static void intel_pstate_sysfs_expose_params(void)
391 int rc;
393 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
394 &cpu_subsys.dev_root->kobj);
395 BUG_ON(!intel_pstate_kobject);
396 rc = sysfs_create_group(intel_pstate_kobject,
397 &intel_pstate_attr_group);
398 BUG_ON(rc);
401 /************************** sysfs end ************************/
402 static int byt_get_min_pstate(void)
404 u64 value;
405 rdmsrl(BYT_RATIOS, value);
406 return (value >> 8) & 0x7F;
409 static int byt_get_max_pstate(void)
411 u64 value;
412 rdmsrl(BYT_RATIOS, value);
413 return (value >> 16) & 0x7F;
416 static int byt_get_turbo_pstate(void)
418 u64 value;
419 rdmsrl(BYT_TURBO_RATIOS, value);
420 return value & 0x7F;
423 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
425 u64 val;
426 int32_t vid_fp;
427 u32 vid;
429 val = pstate << 8;
430 if (limits.no_turbo && !limits.turbo_disabled)
431 val |= (u64)1 << 32;
433 vid_fp = cpudata->vid.min + mul_fp(
434 int_tofp(pstate - cpudata->pstate.min_pstate),
435 cpudata->vid.ratio);
437 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
438 vid = ceiling_fp(vid_fp);
440 if (pstate > cpudata->pstate.max_pstate)
441 vid = cpudata->vid.turbo;
443 val |= vid;
445 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
448 #define BYT_BCLK_FREQS 5
449 static int byt_freq_table[BYT_BCLK_FREQS] = { 833, 1000, 1333, 1167, 800};
451 static int byt_get_scaling(void)
453 u64 value;
454 int i;
456 rdmsrl(MSR_FSB_FREQ, value);
457 i = value & 0x3;
459 BUG_ON(i > BYT_BCLK_FREQS);
461 return byt_freq_table[i] * 100;
464 static void byt_get_vid(struct cpudata *cpudata)
466 u64 value;
469 rdmsrl(BYT_VIDS, value);
470 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
471 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
472 cpudata->vid.ratio = div_fp(
473 cpudata->vid.max - cpudata->vid.min,
474 int_tofp(cpudata->pstate.max_pstate -
475 cpudata->pstate.min_pstate));
477 rdmsrl(BYT_TURBO_VIDS, value);
478 cpudata->vid.turbo = value & 0x7f;
482 static int core_get_min_pstate(void)
484 u64 value;
485 rdmsrl(MSR_PLATFORM_INFO, value);
486 return (value >> 40) & 0xFF;
489 static int core_get_max_pstate(void)
491 u64 value;
492 rdmsrl(MSR_PLATFORM_INFO, value);
493 return (value >> 8) & 0xFF;
496 static int core_get_turbo_pstate(void)
498 u64 value;
499 int nont, ret;
500 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
501 nont = core_get_max_pstate();
502 ret = ((value) & 255);
503 if (ret <= nont)
504 ret = nont;
505 return ret;
508 static inline int core_get_scaling(void)
510 return 100000;
513 static void core_set_pstate(struct cpudata *cpudata, int pstate)
515 u64 val;
517 val = pstate << 8;
518 if (limits.no_turbo && !limits.turbo_disabled)
519 val |= (u64)1 << 32;
521 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
524 static struct cpu_defaults core_params = {
525 .pid_policy = {
526 .sample_rate_ms = 10,
527 .deadband = 0,
528 .setpoint = 97,
529 .p_gain_pct = 20,
530 .d_gain_pct = 0,
531 .i_gain_pct = 0,
533 .funcs = {
534 .get_max = core_get_max_pstate,
535 .get_min = core_get_min_pstate,
536 .get_turbo = core_get_turbo_pstate,
537 .get_scaling = core_get_scaling,
538 .set = core_set_pstate,
542 static struct cpu_defaults byt_params = {
543 .pid_policy = {
544 .sample_rate_ms = 10,
545 .deadband = 0,
546 .setpoint = 97,
547 .p_gain_pct = 14,
548 .d_gain_pct = 0,
549 .i_gain_pct = 4,
551 .funcs = {
552 .get_max = byt_get_max_pstate,
553 .get_min = byt_get_min_pstate,
554 .get_turbo = byt_get_turbo_pstate,
555 .set = byt_set_pstate,
556 .get_scaling = byt_get_scaling,
557 .get_vid = byt_get_vid,
562 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
564 int max_perf = cpu->pstate.turbo_pstate;
565 int max_perf_adj;
566 int min_perf;
568 if (limits.no_turbo || limits.turbo_disabled)
569 max_perf = cpu->pstate.max_pstate;
571 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
572 *max = clamp_t(int, max_perf_adj,
573 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
575 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
576 *min = clamp_t(int, min_perf,
577 cpu->pstate.min_pstate, max_perf);
580 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
582 int max_perf, min_perf;
584 update_turbo_state();
586 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
588 pstate = clamp_t(int, pstate, min_perf, max_perf);
590 if (pstate == cpu->pstate.current_pstate)
591 return;
593 trace_cpu_frequency(pstate * cpu->pstate.scaling, cpu->cpu);
595 cpu->pstate.current_pstate = pstate;
597 pstate_funcs.set(cpu, pstate);
600 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
602 int target;
603 target = cpu->pstate.current_pstate + steps;
605 intel_pstate_set_pstate(cpu, target);
608 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
610 int target;
611 target = cpu->pstate.current_pstate - steps;
612 intel_pstate_set_pstate(cpu, target);
615 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
617 cpu->pstate.min_pstate = pstate_funcs.get_min();
618 cpu->pstate.max_pstate = pstate_funcs.get_max();
619 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
620 cpu->pstate.scaling = pstate_funcs.get_scaling();
622 if (pstate_funcs.get_vid)
623 pstate_funcs.get_vid(cpu);
624 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
627 static inline void intel_pstate_calc_busy(struct cpudata *cpu)
629 struct sample *sample = &cpu->sample;
630 int64_t core_pct;
631 int32_t rem;
633 core_pct = int_tofp(sample->aperf) * int_tofp(100);
634 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem);
636 if ((rem << 1) >= int_tofp(sample->mperf))
637 core_pct += 1;
639 sample->freq = fp_toint(
640 mul_fp(int_tofp(
641 cpu->pstate.max_pstate * cpu->pstate.scaling / 100),
642 core_pct));
644 sample->core_pct_busy = (int32_t)core_pct;
647 static inline void intel_pstate_sample(struct cpudata *cpu)
649 u64 aperf, mperf;
651 rdmsrl(MSR_IA32_APERF, aperf);
652 rdmsrl(MSR_IA32_MPERF, mperf);
654 aperf = aperf >> FRAC_BITS;
655 mperf = mperf >> FRAC_BITS;
657 cpu->last_sample_time = cpu->sample.time;
658 cpu->sample.time = ktime_get();
659 cpu->sample.aperf = aperf;
660 cpu->sample.mperf = mperf;
661 cpu->sample.aperf -= cpu->prev_aperf;
662 cpu->sample.mperf -= cpu->prev_mperf;
664 intel_pstate_calc_busy(cpu);
666 cpu->prev_aperf = aperf;
667 cpu->prev_mperf = mperf;
670 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
672 int sample_time, delay;
674 sample_time = pid_params.sample_rate_ms;
675 delay = msecs_to_jiffies(sample_time);
676 mod_timer_pinned(&cpu->timer, jiffies + delay);
679 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
681 int32_t core_busy, max_pstate, current_pstate, sample_ratio;
682 s64 duration_us;
683 u32 sample_time;
685 core_busy = cpu->sample.core_pct_busy;
686 max_pstate = int_tofp(cpu->pstate.max_pstate);
687 current_pstate = int_tofp(cpu->pstate.current_pstate);
688 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
690 sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC);
691 duration_us = ktime_us_delta(cpu->sample.time,
692 cpu->last_sample_time);
693 if (duration_us > sample_time * 3) {
694 sample_ratio = div_fp(int_tofp(sample_time),
695 int_tofp(duration_us));
696 core_busy = mul_fp(core_busy, sample_ratio);
699 return core_busy;
702 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
704 int32_t busy_scaled;
705 struct _pid *pid;
706 signed int ctl = 0;
707 int steps;
709 pid = &cpu->pid;
710 busy_scaled = intel_pstate_get_scaled_busy(cpu);
712 ctl = pid_calc(pid, busy_scaled);
714 steps = abs(ctl);
716 if (ctl < 0)
717 intel_pstate_pstate_increase(cpu, steps);
718 else
719 intel_pstate_pstate_decrease(cpu, steps);
722 static void intel_pstate_timer_func(unsigned long __data)
724 struct cpudata *cpu = (struct cpudata *) __data;
725 struct sample *sample;
727 intel_pstate_sample(cpu);
729 sample = &cpu->sample;
731 intel_pstate_adjust_busy_pstate(cpu);
733 trace_pstate_sample(fp_toint(sample->core_pct_busy),
734 fp_toint(intel_pstate_get_scaled_busy(cpu)),
735 cpu->pstate.current_pstate,
736 sample->mperf,
737 sample->aperf,
738 sample->freq);
740 intel_pstate_set_sample_time(cpu);
743 #define ICPU(model, policy) \
744 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
745 (unsigned long)&policy }
747 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
748 ICPU(0x2a, core_params),
749 ICPU(0x2d, core_params),
750 ICPU(0x37, byt_params),
751 ICPU(0x3a, core_params),
752 ICPU(0x3c, core_params),
753 ICPU(0x3d, core_params),
754 ICPU(0x3e, core_params),
755 ICPU(0x3f, core_params),
756 ICPU(0x45, core_params),
757 ICPU(0x46, core_params),
758 ICPU(0x4c, byt_params),
759 ICPU(0x4f, core_params),
760 ICPU(0x56, core_params),
763 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
765 static int intel_pstate_init_cpu(unsigned int cpunum)
767 struct cpudata *cpu;
769 if (!all_cpu_data[cpunum])
770 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata),
771 GFP_KERNEL);
772 if (!all_cpu_data[cpunum])
773 return -ENOMEM;
775 cpu = all_cpu_data[cpunum];
777 cpu->cpu = cpunum;
778 intel_pstate_get_cpu_pstates(cpu);
780 init_timer_deferrable(&cpu->timer);
781 cpu->timer.function = intel_pstate_timer_func;
782 cpu->timer.data =
783 (unsigned long)cpu;
784 cpu->timer.expires = jiffies + HZ/100;
785 intel_pstate_busy_pid_reset(cpu);
786 intel_pstate_sample(cpu);
788 add_timer_on(&cpu->timer, cpunum);
790 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
792 return 0;
795 static unsigned int intel_pstate_get(unsigned int cpu_num)
797 struct sample *sample;
798 struct cpudata *cpu;
800 cpu = all_cpu_data[cpu_num];
801 if (!cpu)
802 return 0;
803 sample = &cpu->sample;
804 return sample->freq;
807 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
809 struct cpudata *cpu;
811 cpu = all_cpu_data[policy->cpu];
813 if (!policy->cpuinfo.max_freq)
814 return -ENODEV;
816 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
817 limits.min_perf_pct = 100;
818 limits.min_perf = int_tofp(1);
819 limits.max_policy_pct = 100;
820 limits.max_perf_pct = 100;
821 limits.max_perf = int_tofp(1);
822 limits.no_turbo = 0;
823 return 0;
825 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
826 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
827 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
829 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
830 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
831 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
832 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
834 return 0;
837 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
839 cpufreq_verify_within_cpu_limits(policy);
841 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
842 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
843 return -EINVAL;
845 return 0;
848 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
850 int cpu_num = policy->cpu;
851 struct cpudata *cpu = all_cpu_data[cpu_num];
853 pr_info("intel_pstate CPU %d exiting\n", cpu_num);
855 del_timer_sync(&all_cpu_data[cpu_num]->timer);
856 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
859 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
861 struct cpudata *cpu;
862 int rc;
864 rc = intel_pstate_init_cpu(policy->cpu);
865 if (rc)
866 return rc;
868 cpu = all_cpu_data[policy->cpu];
870 if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
871 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
872 else
873 policy->policy = CPUFREQ_POLICY_POWERSAVE;
875 policy->min = cpu->pstate.min_pstate * cpu->pstate.scaling;
876 policy->max = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
878 /* cpuinfo and default policy values */
879 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling;
880 update_turbo_state();
881 policy->cpuinfo.max_freq = limits.turbo_disabled ?
882 cpu->pstate.max_pstate : cpu->pstate.turbo_pstate;
883 policy->cpuinfo.max_freq *= cpu->pstate.scaling;
885 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
886 cpumask_set_cpu(policy->cpu, policy->cpus);
888 return 0;
891 static struct cpufreq_driver intel_pstate_driver = {
892 .flags = CPUFREQ_CONST_LOOPS,
893 .verify = intel_pstate_verify_policy,
894 .setpolicy = intel_pstate_set_policy,
895 .get = intel_pstate_get,
896 .init = intel_pstate_cpu_init,
897 .stop_cpu = intel_pstate_stop_cpu,
898 .name = "intel_pstate",
901 static int __initdata no_load;
903 static int intel_pstate_msrs_not_valid(void)
905 /* Check that all the msr's we are using are valid. */
906 u64 aperf, mperf, tmp;
908 rdmsrl(MSR_IA32_APERF, aperf);
909 rdmsrl(MSR_IA32_MPERF, mperf);
911 if (!pstate_funcs.get_max() ||
912 !pstate_funcs.get_min() ||
913 !pstate_funcs.get_turbo())
914 return -ENODEV;
916 rdmsrl(MSR_IA32_APERF, tmp);
917 if (!(tmp - aperf))
918 return -ENODEV;
920 rdmsrl(MSR_IA32_MPERF, tmp);
921 if (!(tmp - mperf))
922 return -ENODEV;
924 return 0;
927 static void copy_pid_params(struct pstate_adjust_policy *policy)
929 pid_params.sample_rate_ms = policy->sample_rate_ms;
930 pid_params.p_gain_pct = policy->p_gain_pct;
931 pid_params.i_gain_pct = policy->i_gain_pct;
932 pid_params.d_gain_pct = policy->d_gain_pct;
933 pid_params.deadband = policy->deadband;
934 pid_params.setpoint = policy->setpoint;
937 static void copy_cpu_funcs(struct pstate_funcs *funcs)
939 pstate_funcs.get_max = funcs->get_max;
940 pstate_funcs.get_min = funcs->get_min;
941 pstate_funcs.get_turbo = funcs->get_turbo;
942 pstate_funcs.get_scaling = funcs->get_scaling;
943 pstate_funcs.set = funcs->set;
944 pstate_funcs.get_vid = funcs->get_vid;
947 #if IS_ENABLED(CONFIG_ACPI)
948 #include <acpi/processor.h>
950 static bool intel_pstate_no_acpi_pss(void)
952 int i;
954 for_each_possible_cpu(i) {
955 acpi_status status;
956 union acpi_object *pss;
957 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
958 struct acpi_processor *pr = per_cpu(processors, i);
960 if (!pr)
961 continue;
963 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
964 if (ACPI_FAILURE(status))
965 continue;
967 pss = buffer.pointer;
968 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
969 kfree(pss);
970 return false;
973 kfree(pss);
976 return true;
979 struct hw_vendor_info {
980 u16 valid;
981 char oem_id[ACPI_OEM_ID_SIZE];
982 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
985 /* Hardware vendor-specific info that has its own power management modes */
986 static struct hw_vendor_info vendor_info[] = {
987 {1, "HP ", "ProLiant"},
988 {0, "", ""},
991 static bool intel_pstate_platform_pwr_mgmt_exists(void)
993 struct acpi_table_header hdr;
994 struct hw_vendor_info *v_info;
996 if (acpi_disabled
997 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
998 return false;
1000 for (v_info = vendor_info; v_info->valid; v_info++) {
1001 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
1002 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
1003 && intel_pstate_no_acpi_pss())
1004 return true;
1007 return false;
1009 #else /* CONFIG_ACPI not enabled */
1010 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
1011 #endif /* CONFIG_ACPI */
1013 static int __init intel_pstate_init(void)
1015 int cpu, rc = 0;
1016 const struct x86_cpu_id *id;
1017 struct cpu_defaults *cpu_info;
1019 if (no_load)
1020 return -ENODEV;
1022 id = x86_match_cpu(intel_pstate_cpu_ids);
1023 if (!id)
1024 return -ENODEV;
1027 * The Intel pstate driver will be ignored if the platform
1028 * firmware has its own power management modes.
1030 if (intel_pstate_platform_pwr_mgmt_exists())
1031 return -ENODEV;
1033 cpu_info = (struct cpu_defaults *)id->driver_data;
1035 copy_pid_params(&cpu_info->pid_policy);
1036 copy_cpu_funcs(&cpu_info->funcs);
1038 if (intel_pstate_msrs_not_valid())
1039 return -ENODEV;
1041 pr_info("Intel P-state driver initializing.\n");
1043 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
1044 if (!all_cpu_data)
1045 return -ENOMEM;
1047 rc = cpufreq_register_driver(&intel_pstate_driver);
1048 if (rc)
1049 goto out;
1051 intel_pstate_debug_expose_params();
1052 intel_pstate_sysfs_expose_params();
1054 return rc;
1055 out:
1056 get_online_cpus();
1057 for_each_online_cpu(cpu) {
1058 if (all_cpu_data[cpu]) {
1059 del_timer_sync(&all_cpu_data[cpu]->timer);
1060 kfree(all_cpu_data[cpu]);
1064 put_online_cpus();
1065 vfree(all_cpu_data);
1066 return -ENODEV;
1068 device_initcall(intel_pstate_init);
1070 static int __init intel_pstate_setup(char *str)
1072 if (!str)
1073 return -EINVAL;
1075 if (!strcmp(str, "disable"))
1076 no_load = 1;
1077 return 0;
1079 early_param("intel_pstate", intel_pstate_setup);
1081 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1082 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1083 MODULE_LICENSE("GPL");