2 * Driver for the Atmel USBA high speed USB device controller
4 * Copyright (C) 2005-2007 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/clk/at91_pmc.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/list.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <linux/usb/ch9.h>
24 #include <linux/usb/gadget.h>
25 #include <linux/usb/atmel_usba_udc.h>
26 #include <linux/delay.h>
28 #include <linux/of_gpio.h>
30 #include "atmel_usba_udc.h"
31 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
32 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
34 #ifdef CONFIG_USB_GADGET_DEBUG_FS
35 #include <linux/debugfs.h>
36 #include <linux/uaccess.h>
38 static int queue_dbg_open(struct inode
*inode
, struct file
*file
)
40 struct usba_ep
*ep
= inode
->i_private
;
41 struct usba_request
*req
, *req_copy
;
42 struct list_head
*queue_data
;
44 queue_data
= kmalloc(sizeof(*queue_data
), GFP_KERNEL
);
47 INIT_LIST_HEAD(queue_data
);
49 spin_lock_irq(&ep
->udc
->lock
);
50 list_for_each_entry(req
, &ep
->queue
, queue
) {
51 req_copy
= kmemdup(req
, sizeof(*req_copy
), GFP_ATOMIC
);
54 list_add_tail(&req_copy
->queue
, queue_data
);
56 spin_unlock_irq(&ep
->udc
->lock
);
58 file
->private_data
= queue_data
;
62 spin_unlock_irq(&ep
->udc
->lock
);
63 list_for_each_entry_safe(req
, req_copy
, queue_data
, queue
) {
64 list_del(&req
->queue
);
72 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
76 * I/i: interrupt/no interrupt
78 * S/s: short ok/short not ok
81 * F/f: submitted/not submitted to FIFO
82 * D/d: using/not using DMA
83 * L/l: last transaction/not last transaction
85 static ssize_t
queue_dbg_read(struct file
*file
, char __user
*buf
,
86 size_t nbytes
, loff_t
*ppos
)
88 struct list_head
*queue
= file
->private_data
;
89 struct usba_request
*req
, *tmp_req
;
90 size_t len
, remaining
, actual
= 0;
93 if (!access_ok(VERIFY_WRITE
, buf
, nbytes
))
96 inode_lock(file_inode(file
));
97 list_for_each_entry_safe(req
, tmp_req
, queue
, queue
) {
98 len
= snprintf(tmpbuf
, sizeof(tmpbuf
),
99 "%8p %08x %c%c%c %5d %c%c%c\n",
100 req
->req
.buf
, req
->req
.length
,
101 req
->req
.no_interrupt
? 'i' : 'I',
102 req
->req
.zero
? 'Z' : 'z',
103 req
->req
.short_not_ok
? 's' : 'S',
105 req
->submitted
? 'F' : 'f',
106 req
->using_dma
? 'D' : 'd',
107 req
->last_transaction
? 'L' : 'l');
108 len
= min(len
, sizeof(tmpbuf
));
112 list_del(&req
->queue
);
115 remaining
= __copy_to_user(buf
, tmpbuf
, len
);
116 actual
+= len
- remaining
;
123 inode_unlock(file_inode(file
));
128 static int queue_dbg_release(struct inode
*inode
, struct file
*file
)
130 struct list_head
*queue_data
= file
->private_data
;
131 struct usba_request
*req
, *tmp_req
;
133 list_for_each_entry_safe(req
, tmp_req
, queue_data
, queue
) {
134 list_del(&req
->queue
);
141 static int regs_dbg_open(struct inode
*inode
, struct file
*file
)
143 struct usba_udc
*udc
;
149 udc
= inode
->i_private
;
150 data
= kmalloc(inode
->i_size
, GFP_KERNEL
);
154 spin_lock_irq(&udc
->lock
);
155 for (i
= 0; i
< inode
->i_size
/ 4; i
++)
156 data
[i
] = usba_io_readl(udc
->regs
+ i
* 4);
157 spin_unlock_irq(&udc
->lock
);
159 file
->private_data
= data
;
168 static ssize_t
regs_dbg_read(struct file
*file
, char __user
*buf
,
169 size_t nbytes
, loff_t
*ppos
)
171 struct inode
*inode
= file_inode(file
);
175 ret
= simple_read_from_buffer(buf
, nbytes
, ppos
,
177 file_inode(file
)->i_size
);
183 static int regs_dbg_release(struct inode
*inode
, struct file
*file
)
185 kfree(file
->private_data
);
189 const struct file_operations queue_dbg_fops
= {
190 .owner
= THIS_MODULE
,
191 .open
= queue_dbg_open
,
193 .read
= queue_dbg_read
,
194 .release
= queue_dbg_release
,
197 const struct file_operations regs_dbg_fops
= {
198 .owner
= THIS_MODULE
,
199 .open
= regs_dbg_open
,
200 .llseek
= generic_file_llseek
,
201 .read
= regs_dbg_read
,
202 .release
= regs_dbg_release
,
205 static void usba_ep_init_debugfs(struct usba_udc
*udc
,
208 struct dentry
*ep_root
;
210 ep_root
= debugfs_create_dir(ep
->ep
.name
, udc
->debugfs_root
);
213 ep
->debugfs_dir
= ep_root
;
215 ep
->debugfs_queue
= debugfs_create_file("queue", 0400, ep_root
,
216 ep
, &queue_dbg_fops
);
217 if (!ep
->debugfs_queue
)
221 ep
->debugfs_dma_status
222 = debugfs_create_u32("dma_status", 0400, ep_root
,
223 &ep
->last_dma_status
);
224 if (!ep
->debugfs_dma_status
)
227 if (ep_is_control(ep
)) {
229 = debugfs_create_u32("state", 0400, ep_root
,
231 if (!ep
->debugfs_state
)
239 debugfs_remove(ep
->debugfs_dma_status
);
241 debugfs_remove(ep
->debugfs_queue
);
243 debugfs_remove(ep_root
);
245 dev_err(&ep
->udc
->pdev
->dev
,
246 "failed to create debugfs directory for %s\n", ep
->ep
.name
);
249 static void usba_ep_cleanup_debugfs(struct usba_ep
*ep
)
251 debugfs_remove(ep
->debugfs_queue
);
252 debugfs_remove(ep
->debugfs_dma_status
);
253 debugfs_remove(ep
->debugfs_state
);
254 debugfs_remove(ep
->debugfs_dir
);
255 ep
->debugfs_dma_status
= NULL
;
256 ep
->debugfs_dir
= NULL
;
259 static void usba_init_debugfs(struct usba_udc
*udc
)
261 struct dentry
*root
, *regs
;
262 struct resource
*regs_resource
;
264 root
= debugfs_create_dir(udc
->gadget
.name
, NULL
);
265 if (IS_ERR(root
) || !root
)
267 udc
->debugfs_root
= root
;
269 regs_resource
= platform_get_resource(udc
->pdev
, IORESOURCE_MEM
,
273 regs
= debugfs_create_file_size("regs", 0400, root
, udc
,
275 resource_size(regs_resource
));
278 udc
->debugfs_regs
= regs
;
281 usba_ep_init_debugfs(udc
, to_usba_ep(udc
->gadget
.ep0
));
286 debugfs_remove(root
);
288 udc
->debugfs_root
= NULL
;
289 dev_err(&udc
->pdev
->dev
, "debugfs is not available\n");
292 static void usba_cleanup_debugfs(struct usba_udc
*udc
)
294 usba_ep_cleanup_debugfs(to_usba_ep(udc
->gadget
.ep0
));
295 debugfs_remove(udc
->debugfs_regs
);
296 debugfs_remove(udc
->debugfs_root
);
297 udc
->debugfs_regs
= NULL
;
298 udc
->debugfs_root
= NULL
;
301 static inline void usba_ep_init_debugfs(struct usba_udc
*udc
,
307 static inline void usba_ep_cleanup_debugfs(struct usba_ep
*ep
)
312 static inline void usba_init_debugfs(struct usba_udc
*udc
)
317 static inline void usba_cleanup_debugfs(struct usba_udc
*udc
)
323 static inline u32
usba_int_enb_get(struct usba_udc
*udc
)
325 return udc
->int_enb_cache
;
328 static inline void usba_int_enb_set(struct usba_udc
*udc
, u32 val
)
330 usba_writel(udc
, INT_ENB
, val
);
331 udc
->int_enb_cache
= val
;
334 static int vbus_is_present(struct usba_udc
*udc
)
336 if (gpio_is_valid(udc
->vbus_pin
))
337 return gpio_get_value(udc
->vbus_pin
) ^ udc
->vbus_pin_inverted
;
339 /* No Vbus detection: Assume always present */
343 static void toggle_bias(struct usba_udc
*udc
, int is_on
)
345 if (udc
->errata
&& udc
->errata
->toggle_bias
)
346 udc
->errata
->toggle_bias(udc
, is_on
);
349 static void generate_bias_pulse(struct usba_udc
*udc
)
351 if (!udc
->bias_pulse_needed
)
354 if (udc
->errata
&& udc
->errata
->pulse_bias
)
355 udc
->errata
->pulse_bias(udc
);
357 udc
->bias_pulse_needed
= false;
360 static void next_fifo_transaction(struct usba_ep
*ep
, struct usba_request
*req
)
362 unsigned int transaction_len
;
364 transaction_len
= req
->req
.length
- req
->req
.actual
;
365 req
->last_transaction
= 1;
366 if (transaction_len
> ep
->ep
.maxpacket
) {
367 transaction_len
= ep
->ep
.maxpacket
;
368 req
->last_transaction
= 0;
369 } else if (transaction_len
== ep
->ep
.maxpacket
&& req
->req
.zero
)
370 req
->last_transaction
= 0;
372 DBG(DBG_QUEUE
, "%s: submit_transaction, req %p (length %d)%s\n",
373 ep
->ep
.name
, req
, transaction_len
,
374 req
->last_transaction
? ", done" : "");
376 memcpy_toio(ep
->fifo
, req
->req
.buf
+ req
->req
.actual
, transaction_len
);
377 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
378 req
->req
.actual
+= transaction_len
;
381 static void submit_request(struct usba_ep
*ep
, struct usba_request
*req
)
383 DBG(DBG_QUEUE
, "%s: submit_request: req %p (length %d)\n",
384 ep
->ep
.name
, req
, req
->req
.length
);
389 if (req
->using_dma
) {
390 if (req
->req
.length
== 0) {
391 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
396 usba_ep_writel(ep
, CTL_ENB
, USBA_SHORT_PACKET
);
398 usba_ep_writel(ep
, CTL_DIS
, USBA_SHORT_PACKET
);
400 usba_dma_writel(ep
, ADDRESS
, req
->req
.dma
);
401 usba_dma_writel(ep
, CONTROL
, req
->ctrl
);
403 next_fifo_transaction(ep
, req
);
404 if (req
->last_transaction
) {
405 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
406 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
408 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
409 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
414 static void submit_next_request(struct usba_ep
*ep
)
416 struct usba_request
*req
;
418 if (list_empty(&ep
->queue
)) {
419 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
| USBA_RX_BK_RDY
);
423 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
425 submit_request(ep
, req
);
428 static void send_status(struct usba_udc
*udc
, struct usba_ep
*ep
)
430 ep
->state
= STATUS_STAGE_IN
;
431 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
432 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
435 static void receive_data(struct usba_ep
*ep
)
437 struct usba_udc
*udc
= ep
->udc
;
438 struct usba_request
*req
;
439 unsigned long status
;
440 unsigned int bytecount
, nr_busy
;
443 status
= usba_ep_readl(ep
, STA
);
444 nr_busy
= USBA_BFEXT(BUSY_BANKS
, status
);
446 DBG(DBG_QUEUE
, "receive data: nr_busy=%u\n", nr_busy
);
448 while (nr_busy
> 0) {
449 if (list_empty(&ep
->queue
)) {
450 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
453 req
= list_entry(ep
->queue
.next
,
454 struct usba_request
, queue
);
456 bytecount
= USBA_BFEXT(BYTE_COUNT
, status
);
458 if (status
& (1 << 31))
460 if (req
->req
.actual
+ bytecount
>= req
->req
.length
) {
462 bytecount
= req
->req
.length
- req
->req
.actual
;
465 memcpy_fromio(req
->req
.buf
+ req
->req
.actual
,
466 ep
->fifo
, bytecount
);
467 req
->req
.actual
+= bytecount
;
469 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
472 DBG(DBG_QUEUE
, "%s: request done\n", ep
->ep
.name
);
474 list_del_init(&req
->queue
);
475 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
476 spin_unlock(&udc
->lock
);
477 usb_gadget_giveback_request(&ep
->ep
, &req
->req
);
478 spin_lock(&udc
->lock
);
481 status
= usba_ep_readl(ep
, STA
);
482 nr_busy
= USBA_BFEXT(BUSY_BANKS
, status
);
484 if (is_complete
&& ep_is_control(ep
)) {
485 send_status(udc
, ep
);
492 request_complete(struct usba_ep
*ep
, struct usba_request
*req
, int status
)
494 struct usba_udc
*udc
= ep
->udc
;
496 WARN_ON(!list_empty(&req
->queue
));
498 if (req
->req
.status
== -EINPROGRESS
)
499 req
->req
.status
= status
;
502 usb_gadget_unmap_request(&udc
->gadget
, &req
->req
, ep
->is_in
);
504 DBG(DBG_GADGET
| DBG_REQ
,
505 "%s: req %p complete: status %d, actual %u\n",
506 ep
->ep
.name
, req
, req
->req
.status
, req
->req
.actual
);
508 spin_unlock(&udc
->lock
);
509 usb_gadget_giveback_request(&ep
->ep
, &req
->req
);
510 spin_lock(&udc
->lock
);
514 request_complete_list(struct usba_ep
*ep
, struct list_head
*list
, int status
)
516 struct usba_request
*req
, *tmp_req
;
518 list_for_each_entry_safe(req
, tmp_req
, list
, queue
) {
519 list_del_init(&req
->queue
);
520 request_complete(ep
, req
, status
);
525 usba_ep_enable(struct usb_ep
*_ep
, const struct usb_endpoint_descriptor
*desc
)
527 struct usba_ep
*ep
= to_usba_ep(_ep
);
528 struct usba_udc
*udc
= ep
->udc
;
529 unsigned long flags
, ept_cfg
, maxpacket
;
530 unsigned int nr_trans
;
532 DBG(DBG_GADGET
, "%s: ep_enable: desc=%p\n", ep
->ep
.name
, desc
);
534 maxpacket
= usb_endpoint_maxp(desc
) & 0x7ff;
536 if (((desc
->bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK
) != ep
->index
)
538 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
540 || maxpacket
> ep
->fifo_size
) {
541 DBG(DBG_ERR
, "ep_enable: Invalid argument");
549 ept_cfg
= USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_8
);
551 /* LSB is bit 1, not 0 */
552 ept_cfg
= USBA_BF(EPT_SIZE
, fls(maxpacket
- 1) - 3);
554 DBG(DBG_HW
, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
555 ep
->ep
.name
, ept_cfg
, maxpacket
);
557 if (usb_endpoint_dir_in(desc
)) {
559 ept_cfg
|= USBA_EPT_DIR_IN
;
562 switch (usb_endpoint_type(desc
)) {
563 case USB_ENDPOINT_XFER_CONTROL
:
564 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_CONTROL
);
565 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_ONE
);
567 case USB_ENDPOINT_XFER_ISOC
:
569 DBG(DBG_ERR
, "ep_enable: %s is not isoc capable\n",
575 * Bits 11:12 specify number of _additional_
576 * transactions per microframe.
578 nr_trans
= ((usb_endpoint_maxp(desc
) >> 11) & 3) + 1;
583 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_ISO
);
586 * Do triple-buffering on high-bandwidth iso endpoints.
588 if (nr_trans
> 1 && ep
->nr_banks
== 3)
589 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_TRIPLE
);
591 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
592 ept_cfg
|= USBA_BF(NB_TRANS
, nr_trans
);
594 case USB_ENDPOINT_XFER_BULK
:
595 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
);
596 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
598 case USB_ENDPOINT_XFER_INT
:
599 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_INT
);
600 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
604 spin_lock_irqsave(&ep
->udc
->lock
, flags
);
607 ep
->ep
.maxpacket
= maxpacket
;
609 usba_ep_writel(ep
, CFG
, ept_cfg
);
610 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
615 usba_int_enb_set(udc
, usba_int_enb_get(udc
) |
616 USBA_BF(EPT_INT
, 1 << ep
->index
) |
617 USBA_BF(DMA_INT
, 1 << ep
->index
));
618 ctrl
= USBA_AUTO_VALID
| USBA_INTDIS_DMA
;
619 usba_ep_writel(ep
, CTL_ENB
, ctrl
);
621 usba_int_enb_set(udc
, usba_int_enb_get(udc
) |
622 USBA_BF(EPT_INT
, 1 << ep
->index
));
625 spin_unlock_irqrestore(&udc
->lock
, flags
);
627 DBG(DBG_HW
, "EPT_CFG%d after init: %#08lx\n", ep
->index
,
628 (unsigned long)usba_ep_readl(ep
, CFG
));
629 DBG(DBG_HW
, "INT_ENB after init: %#08lx\n",
630 (unsigned long)usba_int_enb_get(udc
));
635 static int usba_ep_disable(struct usb_ep
*_ep
)
637 struct usba_ep
*ep
= to_usba_ep(_ep
);
638 struct usba_udc
*udc
= ep
->udc
;
642 DBG(DBG_GADGET
, "ep_disable: %s\n", ep
->ep
.name
);
644 spin_lock_irqsave(&udc
->lock
, flags
);
647 spin_unlock_irqrestore(&udc
->lock
, flags
);
648 /* REVISIT because this driver disables endpoints in
649 * reset_all_endpoints() before calling disconnect(),
650 * most gadget drivers would trigger this non-error ...
652 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
)
653 DBG(DBG_ERR
, "ep_disable: %s not enabled\n",
659 list_splice_init(&ep
->queue
, &req_list
);
661 usba_dma_writel(ep
, CONTROL
, 0);
662 usba_dma_writel(ep
, ADDRESS
, 0);
663 usba_dma_readl(ep
, STATUS
);
665 usba_ep_writel(ep
, CTL_DIS
, USBA_EPT_ENABLE
);
666 usba_int_enb_set(udc
, usba_int_enb_get(udc
) &
667 ~USBA_BF(EPT_INT
, 1 << ep
->index
));
669 request_complete_list(ep
, &req_list
, -ESHUTDOWN
);
671 spin_unlock_irqrestore(&udc
->lock
, flags
);
676 static struct usb_request
*
677 usba_ep_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
679 struct usba_request
*req
;
681 DBG(DBG_GADGET
, "ep_alloc_request: %p, 0x%x\n", _ep
, gfp_flags
);
683 req
= kzalloc(sizeof(*req
), gfp_flags
);
687 INIT_LIST_HEAD(&req
->queue
);
693 usba_ep_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
695 struct usba_request
*req
= to_usba_req(_req
);
697 DBG(DBG_GADGET
, "ep_free_request: %p, %p\n", _ep
, _req
);
702 static int queue_dma(struct usba_udc
*udc
, struct usba_ep
*ep
,
703 struct usba_request
*req
, gfp_t gfp_flags
)
708 DBG(DBG_DMA
, "%s: req l/%u d/%pad %c%c%c\n",
709 ep
->ep
.name
, req
->req
.length
, &req
->req
.dma
,
710 req
->req
.zero
? 'Z' : 'z',
711 req
->req
.short_not_ok
? 'S' : 's',
712 req
->req
.no_interrupt
? 'I' : 'i');
714 if (req
->req
.length
> 0x10000) {
715 /* Lengths from 0 to 65536 (inclusive) are supported */
716 DBG(DBG_ERR
, "invalid request length %u\n", req
->req
.length
);
720 ret
= usb_gadget_map_request(&udc
->gadget
, &req
->req
, ep
->is_in
);
725 req
->ctrl
= USBA_BF(DMA_BUF_LEN
, req
->req
.length
)
726 | USBA_DMA_CH_EN
| USBA_DMA_END_BUF_IE
727 | USBA_DMA_END_BUF_EN
;
730 req
->ctrl
|= USBA_DMA_END_TR_EN
| USBA_DMA_END_TR_IE
;
733 * Add this request to the queue and submit for DMA if
734 * possible. Check if we're still alive first -- we may have
735 * received a reset since last time we checked.
738 spin_lock_irqsave(&udc
->lock
, flags
);
740 if (list_empty(&ep
->queue
))
741 submit_request(ep
, req
);
743 list_add_tail(&req
->queue
, &ep
->queue
);
746 spin_unlock_irqrestore(&udc
->lock
, flags
);
752 usba_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
754 struct usba_request
*req
= to_usba_req(_req
);
755 struct usba_ep
*ep
= to_usba_ep(_ep
);
756 struct usba_udc
*udc
= ep
->udc
;
760 DBG(DBG_GADGET
| DBG_QUEUE
| DBG_REQ
, "%s: queue req %p, len %u\n",
761 ep
->ep
.name
, req
, _req
->length
);
763 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
||
769 req
->last_transaction
= 0;
771 _req
->status
= -EINPROGRESS
;
775 return queue_dma(udc
, ep
, req
, gfp_flags
);
777 /* May have received a reset since last time we checked */
779 spin_lock_irqsave(&udc
->lock
, flags
);
781 list_add_tail(&req
->queue
, &ep
->queue
);
783 if ((!ep_is_control(ep
) && ep
->is_in
) ||
785 && (ep
->state
== DATA_STAGE_IN
786 || ep
->state
== STATUS_STAGE_IN
)))
787 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
789 usba_ep_writel(ep
, CTL_ENB
, USBA_RX_BK_RDY
);
792 spin_unlock_irqrestore(&udc
->lock
, flags
);
798 usba_update_req(struct usba_ep
*ep
, struct usba_request
*req
, u32 status
)
800 req
->req
.actual
= req
->req
.length
- USBA_BFEXT(DMA_BUF_LEN
, status
);
803 static int stop_dma(struct usba_ep
*ep
, u32
*pstatus
)
805 unsigned int timeout
;
809 * Stop the DMA controller. When writing both CH_EN
810 * and LINK to 0, the other bits are not affected.
812 usba_dma_writel(ep
, CONTROL
, 0);
814 /* Wait for the FIFO to empty */
815 for (timeout
= 40; timeout
; --timeout
) {
816 status
= usba_dma_readl(ep
, STATUS
);
817 if (!(status
& USBA_DMA_CH_EN
))
826 dev_err(&ep
->udc
->pdev
->dev
,
827 "%s: timed out waiting for DMA FIFO to empty\n",
835 static int usba_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
837 struct usba_ep
*ep
= to_usba_ep(_ep
);
838 struct usba_udc
*udc
= ep
->udc
;
839 struct usba_request
*req
;
843 DBG(DBG_GADGET
| DBG_QUEUE
, "ep_dequeue: %s, req %p\n",
846 spin_lock_irqsave(&udc
->lock
, flags
);
848 list_for_each_entry(req
, &ep
->queue
, queue
) {
849 if (&req
->req
== _req
)
853 if (&req
->req
!= _req
) {
854 spin_unlock_irqrestore(&udc
->lock
, flags
);
858 if (req
->using_dma
) {
860 * If this request is currently being transferred,
861 * stop the DMA controller and reset the FIFO.
863 if (ep
->queue
.next
== &req
->queue
) {
864 status
= usba_dma_readl(ep
, STATUS
);
865 if (status
& USBA_DMA_CH_EN
)
866 stop_dma(ep
, &status
);
868 #ifdef CONFIG_USB_GADGET_DEBUG_FS
869 ep
->last_dma_status
= status
;
872 usba_writel(udc
, EPT_RST
, 1 << ep
->index
);
874 usba_update_req(ep
, req
, status
);
879 * Errors should stop the queue from advancing until the
880 * completion function returns.
882 list_del_init(&req
->queue
);
884 request_complete(ep
, req
, -ECONNRESET
);
886 /* Process the next request if any */
887 submit_next_request(ep
);
888 spin_unlock_irqrestore(&udc
->lock
, flags
);
893 static int usba_ep_set_halt(struct usb_ep
*_ep
, int value
)
895 struct usba_ep
*ep
= to_usba_ep(_ep
);
896 struct usba_udc
*udc
= ep
->udc
;
900 DBG(DBG_GADGET
, "endpoint %s: %s HALT\n", ep
->ep
.name
,
901 value
? "set" : "clear");
904 DBG(DBG_ERR
, "Attempted to halt uninitialized ep %s\n",
909 DBG(DBG_ERR
, "Attempted to halt isochronous ep %s\n",
914 spin_lock_irqsave(&udc
->lock
, flags
);
917 * We can't halt IN endpoints while there are still data to be
920 if (!list_empty(&ep
->queue
)
921 || ((value
&& ep
->is_in
&& (usba_ep_readl(ep
, STA
)
922 & USBA_BF(BUSY_BANKS
, -1L))))) {
926 usba_ep_writel(ep
, SET_STA
, USBA_FORCE_STALL
);
928 usba_ep_writel(ep
, CLR_STA
,
929 USBA_FORCE_STALL
| USBA_TOGGLE_CLR
);
930 usba_ep_readl(ep
, STA
);
933 spin_unlock_irqrestore(&udc
->lock
, flags
);
938 static int usba_ep_fifo_status(struct usb_ep
*_ep
)
940 struct usba_ep
*ep
= to_usba_ep(_ep
);
942 return USBA_BFEXT(BYTE_COUNT
, usba_ep_readl(ep
, STA
));
945 static void usba_ep_fifo_flush(struct usb_ep
*_ep
)
947 struct usba_ep
*ep
= to_usba_ep(_ep
);
948 struct usba_udc
*udc
= ep
->udc
;
950 usba_writel(udc
, EPT_RST
, 1 << ep
->index
);
953 static const struct usb_ep_ops usba_ep_ops
= {
954 .enable
= usba_ep_enable
,
955 .disable
= usba_ep_disable
,
956 .alloc_request
= usba_ep_alloc_request
,
957 .free_request
= usba_ep_free_request
,
958 .queue
= usba_ep_queue
,
959 .dequeue
= usba_ep_dequeue
,
960 .set_halt
= usba_ep_set_halt
,
961 .fifo_status
= usba_ep_fifo_status
,
962 .fifo_flush
= usba_ep_fifo_flush
,
965 static int usba_udc_get_frame(struct usb_gadget
*gadget
)
967 struct usba_udc
*udc
= to_usba_udc(gadget
);
969 return USBA_BFEXT(FRAME_NUMBER
, usba_readl(udc
, FNUM
));
972 static int usba_udc_wakeup(struct usb_gadget
*gadget
)
974 struct usba_udc
*udc
= to_usba_udc(gadget
);
979 spin_lock_irqsave(&udc
->lock
, flags
);
980 if (udc
->devstatus
& (1 << USB_DEVICE_REMOTE_WAKEUP
)) {
981 ctrl
= usba_readl(udc
, CTRL
);
982 usba_writel(udc
, CTRL
, ctrl
| USBA_REMOTE_WAKE_UP
);
985 spin_unlock_irqrestore(&udc
->lock
, flags
);
991 usba_udc_set_selfpowered(struct usb_gadget
*gadget
, int is_selfpowered
)
993 struct usba_udc
*udc
= to_usba_udc(gadget
);
996 gadget
->is_selfpowered
= (is_selfpowered
!= 0);
997 spin_lock_irqsave(&udc
->lock
, flags
);
999 udc
->devstatus
|= 1 << USB_DEVICE_SELF_POWERED
;
1001 udc
->devstatus
&= ~(1 << USB_DEVICE_SELF_POWERED
);
1002 spin_unlock_irqrestore(&udc
->lock
, flags
);
1007 static int atmel_usba_start(struct usb_gadget
*gadget
,
1008 struct usb_gadget_driver
*driver
);
1009 static int atmel_usba_stop(struct usb_gadget
*gadget
);
1011 static const struct usb_gadget_ops usba_udc_ops
= {
1012 .get_frame
= usba_udc_get_frame
,
1013 .wakeup
= usba_udc_wakeup
,
1014 .set_selfpowered
= usba_udc_set_selfpowered
,
1015 .udc_start
= atmel_usba_start
,
1016 .udc_stop
= atmel_usba_stop
,
1019 static struct usb_endpoint_descriptor usba_ep0_desc
= {
1020 .bLength
= USB_DT_ENDPOINT_SIZE
,
1021 .bDescriptorType
= USB_DT_ENDPOINT
,
1022 .bEndpointAddress
= 0,
1023 .bmAttributes
= USB_ENDPOINT_XFER_CONTROL
,
1024 .wMaxPacketSize
= cpu_to_le16(64),
1025 /* FIXME: I have no idea what to put here */
1029 static struct usb_gadget usba_gadget_template
= {
1030 .ops
= &usba_udc_ops
,
1031 .max_speed
= USB_SPEED_HIGH
,
1032 .name
= "atmel_usba_udc",
1036 * Called with interrupts disabled and udc->lock held.
1038 static void reset_all_endpoints(struct usba_udc
*udc
)
1041 struct usba_request
*req
, *tmp_req
;
1043 usba_writel(udc
, EPT_RST
, ~0UL);
1045 ep
= to_usba_ep(udc
->gadget
.ep0
);
1046 list_for_each_entry_safe(req
, tmp_req
, &ep
->queue
, queue
) {
1047 list_del_init(&req
->queue
);
1048 request_complete(ep
, req
, -ECONNRESET
);
1052 static struct usba_ep
*get_ep_by_addr(struct usba_udc
*udc
, u16 wIndex
)
1056 if ((wIndex
& USB_ENDPOINT_NUMBER_MASK
) == 0)
1057 return to_usba_ep(udc
->gadget
.ep0
);
1059 list_for_each_entry (ep
, &udc
->gadget
.ep_list
, ep
.ep_list
) {
1060 u8 bEndpointAddress
;
1064 bEndpointAddress
= ep
->ep
.desc
->bEndpointAddress
;
1065 if ((wIndex
^ bEndpointAddress
) & USB_DIR_IN
)
1067 if ((bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK
)
1068 == (wIndex
& USB_ENDPOINT_NUMBER_MASK
))
1075 /* Called with interrupts disabled and udc->lock held */
1076 static inline void set_protocol_stall(struct usba_udc
*udc
, struct usba_ep
*ep
)
1078 usba_ep_writel(ep
, SET_STA
, USBA_FORCE_STALL
);
1079 ep
->state
= WAIT_FOR_SETUP
;
1082 static inline int is_stalled(struct usba_udc
*udc
, struct usba_ep
*ep
)
1084 if (usba_ep_readl(ep
, STA
) & USBA_FORCE_STALL
)
1089 static inline void set_address(struct usba_udc
*udc
, unsigned int addr
)
1093 DBG(DBG_BUS
, "setting address %u...\n", addr
);
1094 regval
= usba_readl(udc
, CTRL
);
1095 regval
= USBA_BFINS(DEV_ADDR
, addr
, regval
);
1096 usba_writel(udc
, CTRL
, regval
);
1099 static int do_test_mode(struct usba_udc
*udc
)
1101 static const char test_packet_buffer
[] = {
1103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1105 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1107 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1108 /* JJJJJJJKKKKKKK * 8 */
1109 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1110 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1112 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1113 /* {JKKKKKKK * 10}, JK */
1114 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1117 struct device
*dev
= &udc
->pdev
->dev
;
1120 test_mode
= udc
->test_mode
;
1122 /* Start from a clean slate */
1123 reset_all_endpoints(udc
);
1125 switch (test_mode
) {
1128 usba_writel(udc
, TST
, USBA_TST_J_MODE
);
1129 dev_info(dev
, "Entering Test_J mode...\n");
1133 usba_writel(udc
, TST
, USBA_TST_K_MODE
);
1134 dev_info(dev
, "Entering Test_K mode...\n");
1138 * Test_SE0_NAK: Force high-speed mode and set up ep0
1139 * for Bulk IN transfers
1141 ep
= &udc
->usba_ep
[0];
1142 usba_writel(udc
, TST
,
1143 USBA_BF(SPEED_CFG
, USBA_SPEED_CFG_FORCE_HIGH
));
1144 usba_ep_writel(ep
, CFG
,
1145 USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_64
)
1147 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
)
1148 | USBA_BF(BK_NUMBER
, 1));
1149 if (!(usba_ep_readl(ep
, CFG
) & USBA_EPT_MAPPED
)) {
1150 set_protocol_stall(udc
, ep
);
1151 dev_err(dev
, "Test_SE0_NAK: ep0 not mapped\n");
1153 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
1154 dev_info(dev
, "Entering Test_SE0_NAK mode...\n");
1159 ep
= &udc
->usba_ep
[0];
1160 usba_ep_writel(ep
, CFG
,
1161 USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_64
)
1163 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
)
1164 | USBA_BF(BK_NUMBER
, 1));
1165 if (!(usba_ep_readl(ep
, CFG
) & USBA_EPT_MAPPED
)) {
1166 set_protocol_stall(udc
, ep
);
1167 dev_err(dev
, "Test_Packet: ep0 not mapped\n");
1169 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
1170 usba_writel(udc
, TST
, USBA_TST_PKT_MODE
);
1171 memcpy_toio(ep
->fifo
, test_packet_buffer
,
1172 sizeof(test_packet_buffer
));
1173 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
1174 dev_info(dev
, "Entering Test_Packet mode...\n");
1178 dev_err(dev
, "Invalid test mode: 0x%04x\n", test_mode
);
1185 /* Avoid overly long expressions */
1186 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest
*crq
)
1188 if (crq
->wValue
== cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP
))
1193 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest
*crq
)
1195 if (crq
->wValue
== cpu_to_le16(USB_DEVICE_TEST_MODE
))
1200 static inline bool feature_is_ep_halt(struct usb_ctrlrequest
*crq
)
1202 if (crq
->wValue
== cpu_to_le16(USB_ENDPOINT_HALT
))
1207 static int handle_ep0_setup(struct usba_udc
*udc
, struct usba_ep
*ep
,
1208 struct usb_ctrlrequest
*crq
)
1212 switch (crq
->bRequest
) {
1213 case USB_REQ_GET_STATUS
: {
1216 if (crq
->bRequestType
== (USB_DIR_IN
| USB_RECIP_DEVICE
)) {
1217 status
= cpu_to_le16(udc
->devstatus
);
1218 } else if (crq
->bRequestType
1219 == (USB_DIR_IN
| USB_RECIP_INTERFACE
)) {
1220 status
= cpu_to_le16(0);
1221 } else if (crq
->bRequestType
1222 == (USB_DIR_IN
| USB_RECIP_ENDPOINT
)) {
1223 struct usba_ep
*target
;
1225 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1230 if (is_stalled(udc
, target
))
1231 status
|= cpu_to_le16(1);
1235 /* Write directly to the FIFO. No queueing is done. */
1236 if (crq
->wLength
!= cpu_to_le16(sizeof(status
)))
1238 ep
->state
= DATA_STAGE_IN
;
1239 usba_io_writew(status
, ep
->fifo
);
1240 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
1244 case USB_REQ_CLEAR_FEATURE
: {
1245 if (crq
->bRequestType
== USB_RECIP_DEVICE
) {
1246 if (feature_is_dev_remote_wakeup(crq
))
1248 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP
);
1250 /* Can't CLEAR_FEATURE TEST_MODE */
1252 } else if (crq
->bRequestType
== USB_RECIP_ENDPOINT
) {
1253 struct usba_ep
*target
;
1255 if (crq
->wLength
!= cpu_to_le16(0)
1256 || !feature_is_ep_halt(crq
))
1258 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1262 usba_ep_writel(target
, CLR_STA
, USBA_FORCE_STALL
);
1263 if (target
->index
!= 0)
1264 usba_ep_writel(target
, CLR_STA
,
1270 send_status(udc
, ep
);
1274 case USB_REQ_SET_FEATURE
: {
1275 if (crq
->bRequestType
== USB_RECIP_DEVICE
) {
1276 if (feature_is_dev_test_mode(crq
)) {
1277 send_status(udc
, ep
);
1278 ep
->state
= STATUS_STAGE_TEST
;
1279 udc
->test_mode
= le16_to_cpu(crq
->wIndex
);
1281 } else if (feature_is_dev_remote_wakeup(crq
)) {
1282 udc
->devstatus
|= 1 << USB_DEVICE_REMOTE_WAKEUP
;
1286 } else if (crq
->bRequestType
== USB_RECIP_ENDPOINT
) {
1287 struct usba_ep
*target
;
1289 if (crq
->wLength
!= cpu_to_le16(0)
1290 || !feature_is_ep_halt(crq
))
1293 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1297 usba_ep_writel(target
, SET_STA
, USBA_FORCE_STALL
);
1301 send_status(udc
, ep
);
1305 case USB_REQ_SET_ADDRESS
:
1306 if (crq
->bRequestType
!= (USB_DIR_OUT
| USB_RECIP_DEVICE
))
1309 set_address(udc
, le16_to_cpu(crq
->wValue
));
1310 send_status(udc
, ep
);
1311 ep
->state
= STATUS_STAGE_ADDR
;
1316 spin_unlock(&udc
->lock
);
1317 retval
= udc
->driver
->setup(&udc
->gadget
, crq
);
1318 spin_lock(&udc
->lock
);
1324 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1325 "halting endpoint...\n",
1326 ep
->ep
.name
, crq
->bRequestType
, crq
->bRequest
,
1327 le16_to_cpu(crq
->wValue
), le16_to_cpu(crq
->wIndex
),
1328 le16_to_cpu(crq
->wLength
));
1329 set_protocol_stall(udc
, ep
);
1333 static void usba_control_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1335 struct usba_request
*req
;
1340 epstatus
= usba_ep_readl(ep
, STA
);
1341 epctrl
= usba_ep_readl(ep
, CTL
);
1343 DBG(DBG_INT
, "%s [%d]: s/%08x c/%08x\n",
1344 ep
->ep
.name
, ep
->state
, epstatus
, epctrl
);
1347 if (!list_empty(&ep
->queue
))
1348 req
= list_entry(ep
->queue
.next
,
1349 struct usba_request
, queue
);
1351 if ((epctrl
& USBA_TX_PK_RDY
) && !(epstatus
& USBA_TX_PK_RDY
)) {
1353 next_fifo_transaction(ep
, req
);
1355 submit_request(ep
, req
);
1357 if (req
->last_transaction
) {
1358 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
1359 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
1363 if ((epstatus
& epctrl
) & USBA_TX_COMPLETE
) {
1364 usba_ep_writel(ep
, CLR_STA
, USBA_TX_COMPLETE
);
1366 switch (ep
->state
) {
1368 usba_ep_writel(ep
, CTL_ENB
, USBA_RX_BK_RDY
);
1369 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1370 ep
->state
= STATUS_STAGE_OUT
;
1372 case STATUS_STAGE_ADDR
:
1373 /* Activate our new address */
1374 usba_writel(udc
, CTRL
, (usba_readl(udc
, CTRL
)
1376 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1377 ep
->state
= WAIT_FOR_SETUP
;
1379 case STATUS_STAGE_IN
:
1381 list_del_init(&req
->queue
);
1382 request_complete(ep
, req
, 0);
1383 submit_next_request(ep
);
1385 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1386 ep
->state
= WAIT_FOR_SETUP
;
1388 case STATUS_STAGE_TEST
:
1389 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1390 ep
->state
= WAIT_FOR_SETUP
;
1391 if (do_test_mode(udc
))
1392 set_protocol_stall(udc
, ep
);
1395 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1396 "halting endpoint...\n",
1397 ep
->ep
.name
, ep
->state
);
1398 set_protocol_stall(udc
, ep
);
1404 if ((epstatus
& epctrl
) & USBA_RX_BK_RDY
) {
1405 switch (ep
->state
) {
1406 case STATUS_STAGE_OUT
:
1407 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
1408 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1411 list_del_init(&req
->queue
);
1412 request_complete(ep
, req
, 0);
1414 ep
->state
= WAIT_FOR_SETUP
;
1417 case DATA_STAGE_OUT
:
1422 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
1423 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1424 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1425 "halting endpoint...\n",
1426 ep
->ep
.name
, ep
->state
);
1427 set_protocol_stall(udc
, ep
);
1433 if (epstatus
& USBA_RX_SETUP
) {
1435 struct usb_ctrlrequest crq
;
1436 unsigned long data
[2];
1438 unsigned int pkt_len
;
1441 if (ep
->state
!= WAIT_FOR_SETUP
) {
1443 * Didn't expect a SETUP packet at this
1444 * point. Clean up any pending requests (which
1445 * may be successful).
1447 int status
= -EPROTO
;
1450 * RXRDY and TXCOMP are dropped when SETUP
1451 * packets arrive. Just pretend we received
1452 * the status packet.
1454 if (ep
->state
== STATUS_STAGE_OUT
1455 || ep
->state
== STATUS_STAGE_IN
) {
1456 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1461 list_del_init(&req
->queue
);
1462 request_complete(ep
, req
, status
);
1466 pkt_len
= USBA_BFEXT(BYTE_COUNT
, usba_ep_readl(ep
, STA
));
1467 DBG(DBG_HW
, "Packet length: %u\n", pkt_len
);
1468 if (pkt_len
!= sizeof(crq
)) {
1469 pr_warning("udc: Invalid packet length %u "
1470 "(expected %zu)\n", pkt_len
, sizeof(crq
));
1471 set_protocol_stall(udc
, ep
);
1475 DBG(DBG_FIFO
, "Copying ctrl request from 0x%p:\n", ep
->fifo
);
1476 memcpy_fromio(crq
.data
, ep
->fifo
, sizeof(crq
));
1478 /* Free up one bank in the FIFO so that we can
1479 * generate or receive a reply right away. */
1480 usba_ep_writel(ep
, CLR_STA
, USBA_RX_SETUP
);
1482 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1483 ep->state, crq.crq.bRequestType,
1484 crq.crq.bRequest); */
1486 if (crq
.crq
.bRequestType
& USB_DIR_IN
) {
1488 * The USB 2.0 spec states that "if wLength is
1489 * zero, there is no data transfer phase."
1490 * However, testusb #14 seems to actually
1491 * expect a data phase even if wLength = 0...
1493 ep
->state
= DATA_STAGE_IN
;
1495 if (crq
.crq
.wLength
!= cpu_to_le16(0))
1496 ep
->state
= DATA_STAGE_OUT
;
1498 ep
->state
= STATUS_STAGE_IN
;
1503 ret
= handle_ep0_setup(udc
, ep
, &crq
.crq
);
1505 spin_unlock(&udc
->lock
);
1506 ret
= udc
->driver
->setup(&udc
->gadget
, &crq
.crq
);
1507 spin_lock(&udc
->lock
);
1510 DBG(DBG_BUS
, "req %02x.%02x, length %d, state %d, ret %d\n",
1511 crq
.crq
.bRequestType
, crq
.crq
.bRequest
,
1512 le16_to_cpu(crq
.crq
.wLength
), ep
->state
, ret
);
1515 /* Let the host know that we failed */
1516 set_protocol_stall(udc
, ep
);
1521 static void usba_ep_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1523 struct usba_request
*req
;
1527 epstatus
= usba_ep_readl(ep
, STA
);
1528 epctrl
= usba_ep_readl(ep
, CTL
);
1530 DBG(DBG_INT
, "%s: interrupt, status: 0x%08x\n", ep
->ep
.name
, epstatus
);
1532 while ((epctrl
& USBA_TX_PK_RDY
) && !(epstatus
& USBA_TX_PK_RDY
)) {
1533 DBG(DBG_BUS
, "%s: TX PK ready\n", ep
->ep
.name
);
1535 if (list_empty(&ep
->queue
)) {
1536 dev_warn(&udc
->pdev
->dev
, "ep_irq: queue empty\n");
1537 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
1541 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
1543 if (req
->using_dma
) {
1544 /* Send a zero-length packet */
1545 usba_ep_writel(ep
, SET_STA
,
1547 usba_ep_writel(ep
, CTL_DIS
,
1549 list_del_init(&req
->queue
);
1550 submit_next_request(ep
);
1551 request_complete(ep
, req
, 0);
1554 next_fifo_transaction(ep
, req
);
1556 submit_request(ep
, req
);
1558 if (req
->last_transaction
) {
1559 list_del_init(&req
->queue
);
1560 submit_next_request(ep
);
1561 request_complete(ep
, req
, 0);
1565 epstatus
= usba_ep_readl(ep
, STA
);
1566 epctrl
= usba_ep_readl(ep
, CTL
);
1568 if ((epstatus
& epctrl
) & USBA_RX_BK_RDY
) {
1569 DBG(DBG_BUS
, "%s: RX data ready\n", ep
->ep
.name
);
1574 static void usba_dma_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1576 struct usba_request
*req
;
1577 u32 status
, control
, pending
;
1579 status
= usba_dma_readl(ep
, STATUS
);
1580 control
= usba_dma_readl(ep
, CONTROL
);
1581 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1582 ep
->last_dma_status
= status
;
1584 pending
= status
& control
;
1585 DBG(DBG_INT
| DBG_DMA
, "dma irq, s/%#08x, c/%#08x\n", status
, control
);
1587 if (status
& USBA_DMA_CH_EN
) {
1588 dev_err(&udc
->pdev
->dev
,
1589 "DMA_CH_EN is set after transfer is finished!\n");
1590 dev_err(&udc
->pdev
->dev
,
1591 "status=%#08x, pending=%#08x, control=%#08x\n",
1592 status
, pending
, control
);
1595 * try to pretend nothing happened. We might have to
1596 * do something here...
1600 if (list_empty(&ep
->queue
))
1601 /* Might happen if a reset comes along at the right moment */
1604 if (pending
& (USBA_DMA_END_TR_ST
| USBA_DMA_END_BUF_ST
)) {
1605 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
1606 usba_update_req(ep
, req
, status
);
1608 list_del_init(&req
->queue
);
1609 submit_next_request(ep
);
1610 request_complete(ep
, req
, 0);
1614 static irqreturn_t
usba_udc_irq(int irq
, void *devid
)
1616 struct usba_udc
*udc
= devid
;
1617 u32 status
, int_enb
;
1621 spin_lock(&udc
->lock
);
1623 int_enb
= usba_int_enb_get(udc
);
1624 status
= usba_readl(udc
, INT_STA
) & (int_enb
| USBA_HIGH_SPEED
);
1625 DBG(DBG_INT
, "irq, status=%#08x\n", status
);
1627 if (status
& USBA_DET_SUSPEND
) {
1628 toggle_bias(udc
, 0);
1629 usba_writel(udc
, INT_CLR
, USBA_DET_SUSPEND
);
1630 usba_int_enb_set(udc
, int_enb
| USBA_WAKE_UP
);
1631 udc
->bias_pulse_needed
= true;
1632 DBG(DBG_BUS
, "Suspend detected\n");
1633 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
1634 && udc
->driver
&& udc
->driver
->suspend
) {
1635 spin_unlock(&udc
->lock
);
1636 udc
->driver
->suspend(&udc
->gadget
);
1637 spin_lock(&udc
->lock
);
1641 if (status
& USBA_WAKE_UP
) {
1642 toggle_bias(udc
, 1);
1643 usba_writel(udc
, INT_CLR
, USBA_WAKE_UP
);
1644 usba_int_enb_set(udc
, int_enb
& ~USBA_WAKE_UP
);
1645 DBG(DBG_BUS
, "Wake Up CPU detected\n");
1648 if (status
& USBA_END_OF_RESUME
) {
1649 usba_writel(udc
, INT_CLR
, USBA_END_OF_RESUME
);
1650 generate_bias_pulse(udc
);
1651 DBG(DBG_BUS
, "Resume detected\n");
1652 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
1653 && udc
->driver
&& udc
->driver
->resume
) {
1654 spin_unlock(&udc
->lock
);
1655 udc
->driver
->resume(&udc
->gadget
);
1656 spin_lock(&udc
->lock
);
1660 dma_status
= USBA_BFEXT(DMA_INT
, status
);
1664 for (i
= 1; i
<= USBA_NR_DMAS
; i
++)
1665 if (dma_status
& (1 << i
))
1666 usba_dma_irq(udc
, &udc
->usba_ep
[i
]);
1669 ep_status
= USBA_BFEXT(EPT_INT
, status
);
1673 for (i
= 0; i
< udc
->num_ep
; i
++)
1674 if (ep_status
& (1 << i
)) {
1675 if (ep_is_control(&udc
->usba_ep
[i
]))
1676 usba_control_irq(udc
, &udc
->usba_ep
[i
]);
1678 usba_ep_irq(udc
, &udc
->usba_ep
[i
]);
1682 if (status
& USBA_END_OF_RESET
) {
1683 struct usba_ep
*ep0
;
1685 usba_writel(udc
, INT_CLR
, USBA_END_OF_RESET
);
1686 generate_bias_pulse(udc
);
1687 reset_all_endpoints(udc
);
1689 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
&& udc
->driver
) {
1690 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1691 spin_unlock(&udc
->lock
);
1692 usb_gadget_udc_reset(&udc
->gadget
, udc
->driver
);
1693 spin_lock(&udc
->lock
);
1696 if (status
& USBA_HIGH_SPEED
)
1697 udc
->gadget
.speed
= USB_SPEED_HIGH
;
1699 udc
->gadget
.speed
= USB_SPEED_FULL
;
1700 DBG(DBG_BUS
, "%s bus reset detected\n",
1701 usb_speed_string(udc
->gadget
.speed
));
1703 ep0
= &udc
->usba_ep
[0];
1704 ep0
->ep
.desc
= &usba_ep0_desc
;
1705 ep0
->state
= WAIT_FOR_SETUP
;
1706 usba_ep_writel(ep0
, CFG
,
1707 (USBA_BF(EPT_SIZE
, EP0_EPT_SIZE
)
1708 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_CONTROL
)
1709 | USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_ONE
)));
1710 usba_ep_writel(ep0
, CTL_ENB
,
1711 USBA_EPT_ENABLE
| USBA_RX_SETUP
);
1712 usba_int_enb_set(udc
, int_enb
| USBA_BF(EPT_INT
, 1) |
1713 USBA_DET_SUSPEND
| USBA_END_OF_RESUME
);
1716 * Unclear why we hit this irregularly, e.g. in usbtest,
1717 * but it's clearly harmless...
1719 if (!(usba_ep_readl(ep0
, CFG
) & USBA_EPT_MAPPED
))
1720 dev_dbg(&udc
->pdev
->dev
,
1721 "ODD: EP0 configuration is invalid!\n");
1724 spin_unlock(&udc
->lock
);
1729 static int start_clock(struct usba_udc
*udc
)
1736 ret
= clk_prepare_enable(udc
->pclk
);
1739 ret
= clk_prepare_enable(udc
->hclk
);
1741 clk_disable_unprepare(udc
->pclk
);
1745 udc
->clocked
= true;
1749 static void stop_clock(struct usba_udc
*udc
)
1754 clk_disable_unprepare(udc
->hclk
);
1755 clk_disable_unprepare(udc
->pclk
);
1757 udc
->clocked
= false;
1760 static int usba_start(struct usba_udc
*udc
)
1762 unsigned long flags
;
1765 ret
= start_clock(udc
);
1769 spin_lock_irqsave(&udc
->lock
, flags
);
1770 toggle_bias(udc
, 1);
1771 usba_writel(udc
, CTRL
, USBA_ENABLE_MASK
);
1772 usba_int_enb_set(udc
, USBA_END_OF_RESET
);
1773 spin_unlock_irqrestore(&udc
->lock
, flags
);
1778 static void usba_stop(struct usba_udc
*udc
)
1780 unsigned long flags
;
1782 spin_lock_irqsave(&udc
->lock
, flags
);
1783 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1784 reset_all_endpoints(udc
);
1786 /* This will also disable the DP pullup */
1787 toggle_bias(udc
, 0);
1788 usba_writel(udc
, CTRL
, USBA_DISABLE_MASK
);
1789 spin_unlock_irqrestore(&udc
->lock
, flags
);
1794 static irqreturn_t
usba_vbus_irq_thread(int irq
, void *devid
)
1796 struct usba_udc
*udc
= devid
;
1802 mutex_lock(&udc
->vbus_mutex
);
1804 vbus
= vbus_is_present(udc
);
1805 if (vbus
!= udc
->vbus_prev
) {
1811 if (udc
->driver
->disconnect
)
1812 udc
->driver
->disconnect(&udc
->gadget
);
1814 udc
->vbus_prev
= vbus
;
1817 mutex_unlock(&udc
->vbus_mutex
);
1821 static int atmel_usba_start(struct usb_gadget
*gadget
,
1822 struct usb_gadget_driver
*driver
)
1825 struct usba_udc
*udc
= container_of(gadget
, struct usba_udc
, gadget
);
1826 unsigned long flags
;
1828 spin_lock_irqsave(&udc
->lock
, flags
);
1829 udc
->devstatus
= 1 << USB_DEVICE_SELF_POWERED
;
1830 udc
->driver
= driver
;
1831 spin_unlock_irqrestore(&udc
->lock
, flags
);
1833 mutex_lock(&udc
->vbus_mutex
);
1835 if (gpio_is_valid(udc
->vbus_pin
))
1836 enable_irq(gpio_to_irq(udc
->vbus_pin
));
1838 /* If Vbus is present, enable the controller and wait for reset */
1839 udc
->vbus_prev
= vbus_is_present(udc
);
1840 if (udc
->vbus_prev
) {
1841 ret
= usba_start(udc
);
1846 mutex_unlock(&udc
->vbus_mutex
);
1850 if (gpio_is_valid(udc
->vbus_pin
))
1851 disable_irq(gpio_to_irq(udc
->vbus_pin
));
1853 mutex_unlock(&udc
->vbus_mutex
);
1855 spin_lock_irqsave(&udc
->lock
, flags
);
1856 udc
->devstatus
&= ~(1 << USB_DEVICE_SELF_POWERED
);
1858 spin_unlock_irqrestore(&udc
->lock
, flags
);
1862 static int atmel_usba_stop(struct usb_gadget
*gadget
)
1864 struct usba_udc
*udc
= container_of(gadget
, struct usba_udc
, gadget
);
1866 if (gpio_is_valid(udc
->vbus_pin
))
1867 disable_irq(gpio_to_irq(udc
->vbus_pin
));
1877 static void at91sam9rl_toggle_bias(struct usba_udc
*udc
, int is_on
)
1879 regmap_update_bits(udc
->pmc
, AT91_CKGR_UCKR
, AT91_PMC_BIASEN
,
1880 is_on
? AT91_PMC_BIASEN
: 0);
1883 static void at91sam9g45_pulse_bias(struct usba_udc
*udc
)
1885 regmap_update_bits(udc
->pmc
, AT91_CKGR_UCKR
, AT91_PMC_BIASEN
, 0);
1886 regmap_update_bits(udc
->pmc
, AT91_CKGR_UCKR
, AT91_PMC_BIASEN
,
1890 static const struct usba_udc_errata at91sam9rl_errata
= {
1891 .toggle_bias
= at91sam9rl_toggle_bias
,
1894 static const struct usba_udc_errata at91sam9g45_errata
= {
1895 .pulse_bias
= at91sam9g45_pulse_bias
,
1898 static const struct of_device_id atmel_udc_dt_ids
[] = {
1899 { .compatible
= "atmel,at91sam9rl-udc", .data
= &at91sam9rl_errata
},
1900 { .compatible
= "atmel,at91sam9g45-udc", .data
= &at91sam9g45_errata
},
1901 { .compatible
= "atmel,sama5d3-udc" },
1905 MODULE_DEVICE_TABLE(of
, atmel_udc_dt_ids
);
1907 static struct usba_ep
* atmel_udc_of_init(struct platform_device
*pdev
,
1908 struct usba_udc
*udc
)
1912 enum of_gpio_flags flags
;
1913 struct device_node
*np
= pdev
->dev
.of_node
;
1914 const struct of_device_id
*match
;
1915 struct device_node
*pp
;
1917 struct usba_ep
*eps
, *ep
;
1919 match
= of_match_node(atmel_udc_dt_ids
, np
);
1921 return ERR_PTR(-EINVAL
);
1923 udc
->errata
= match
->data
;
1924 udc
->pmc
= syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
1925 if (IS_ERR(udc
->pmc
))
1926 udc
->pmc
= syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
1927 if (udc
->errata
&& IS_ERR(udc
->pmc
))
1928 return ERR_CAST(udc
->pmc
);
1932 udc
->vbus_pin
= of_get_named_gpio_flags(np
, "atmel,vbus-gpio", 0,
1934 udc
->vbus_pin_inverted
= (flags
& OF_GPIO_ACTIVE_LOW
) ? 1 : 0;
1937 while ((pp
= of_get_next_child(np
, pp
)))
1940 eps
= devm_kzalloc(&pdev
->dev
, sizeof(struct usba_ep
) * udc
->num_ep
,
1943 return ERR_PTR(-ENOMEM
);
1945 udc
->gadget
.ep0
= &eps
[0].ep
;
1947 INIT_LIST_HEAD(&eps
[0].ep
.ep_list
);
1951 while ((pp
= of_get_next_child(np
, pp
))) {
1954 ret
= of_property_read_u32(pp
, "reg", &val
);
1956 dev_err(&pdev
->dev
, "of_probe: reg error(%d)\n", ret
);
1961 ret
= of_property_read_u32(pp
, "atmel,fifo-size", &val
);
1963 dev_err(&pdev
->dev
, "of_probe: fifo-size error(%d)\n", ret
);
1966 ep
->fifo_size
= val
;
1968 ret
= of_property_read_u32(pp
, "atmel,nb-banks", &val
);
1970 dev_err(&pdev
->dev
, "of_probe: nb-banks error(%d)\n", ret
);
1975 ep
->can_dma
= of_property_read_bool(pp
, "atmel,can-dma");
1976 ep
->can_isoc
= of_property_read_bool(pp
, "atmel,can-isoc");
1978 ret
= of_property_read_string(pp
, "name", &name
);
1980 dev_err(&pdev
->dev
, "of_probe: name error(%d)\n", ret
);
1983 sprintf(ep
->name
, "ep%d", ep
->index
);
1984 ep
->ep
.name
= ep
->name
;
1986 ep
->ep_regs
= udc
->regs
+ USBA_EPT_BASE(i
);
1987 ep
->dma_regs
= udc
->regs
+ USBA_DMA_BASE(i
);
1988 ep
->fifo
= udc
->fifo
+ USBA_FIFO_BASE(i
);
1989 ep
->ep
.ops
= &usba_ep_ops
;
1990 usb_ep_set_maxpacket_limit(&ep
->ep
, ep
->fifo_size
);
1992 INIT_LIST_HEAD(&ep
->queue
);
1994 if (ep
->index
== 0) {
1995 ep
->ep
.caps
.type_control
= true;
1997 ep
->ep
.caps
.type_iso
= ep
->can_isoc
;
1998 ep
->ep
.caps
.type_bulk
= true;
1999 ep
->ep
.caps
.type_int
= true;
2002 ep
->ep
.caps
.dir_in
= true;
2003 ep
->ep
.caps
.dir_out
= true;
2006 list_add_tail(&ep
->ep
.ep_list
, &udc
->gadget
.ep_list
);
2012 dev_err(&pdev
->dev
, "of_probe: no endpoint specified\n");
2019 return ERR_PTR(ret
);
2022 static struct usba_ep
* atmel_udc_of_init(struct platform_device
*pdev
,
2023 struct usba_udc
*udc
)
2025 return ERR_PTR(-ENOSYS
);
2029 static struct usba_ep
* usba_udc_pdata(struct platform_device
*pdev
,
2030 struct usba_udc
*udc
)
2032 struct usba_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
2033 struct usba_ep
*eps
;
2037 return ERR_PTR(-ENXIO
);
2039 eps
= devm_kzalloc(&pdev
->dev
, sizeof(struct usba_ep
) * pdata
->num_ep
,
2042 return ERR_PTR(-ENOMEM
);
2044 udc
->gadget
.ep0
= &eps
[0].ep
;
2046 udc
->vbus_pin
= pdata
->vbus_pin
;
2047 udc
->vbus_pin_inverted
= pdata
->vbus_pin_inverted
;
2048 udc
->num_ep
= pdata
->num_ep
;
2050 INIT_LIST_HEAD(&eps
[0].ep
.ep_list
);
2052 for (i
= 0; i
< pdata
->num_ep
; i
++) {
2053 struct usba_ep
*ep
= &eps
[i
];
2055 ep
->ep_regs
= udc
->regs
+ USBA_EPT_BASE(i
);
2056 ep
->dma_regs
= udc
->regs
+ USBA_DMA_BASE(i
);
2057 ep
->fifo
= udc
->fifo
+ USBA_FIFO_BASE(i
);
2058 ep
->ep
.ops
= &usba_ep_ops
;
2059 ep
->ep
.name
= pdata
->ep
[i
].name
;
2060 ep
->fifo_size
= pdata
->ep
[i
].fifo_size
;
2061 usb_ep_set_maxpacket_limit(&ep
->ep
, ep
->fifo_size
);
2063 INIT_LIST_HEAD(&ep
->queue
);
2064 ep
->nr_banks
= pdata
->ep
[i
].nr_banks
;
2065 ep
->index
= pdata
->ep
[i
].index
;
2066 ep
->can_dma
= pdata
->ep
[i
].can_dma
;
2067 ep
->can_isoc
= pdata
->ep
[i
].can_isoc
;
2070 ep
->ep
.caps
.type_control
= true;
2072 ep
->ep
.caps
.type_iso
= ep
->can_isoc
;
2073 ep
->ep
.caps
.type_bulk
= true;
2074 ep
->ep
.caps
.type_int
= true;
2077 ep
->ep
.caps
.dir_in
= true;
2078 ep
->ep
.caps
.dir_out
= true;
2081 list_add_tail(&ep
->ep
.ep_list
, &udc
->gadget
.ep_list
);
2087 static int usba_udc_probe(struct platform_device
*pdev
)
2089 struct resource
*regs
, *fifo
;
2090 struct clk
*pclk
, *hclk
;
2091 struct usba_udc
*udc
;
2094 udc
= devm_kzalloc(&pdev
->dev
, sizeof(*udc
), GFP_KERNEL
);
2098 udc
->gadget
= usba_gadget_template
;
2099 INIT_LIST_HEAD(&udc
->gadget
.ep_list
);
2101 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, CTRL_IOMEM_ID
);
2102 fifo
= platform_get_resource(pdev
, IORESOURCE_MEM
, FIFO_IOMEM_ID
);
2106 irq
= platform_get_irq(pdev
, 0);
2110 pclk
= devm_clk_get(&pdev
->dev
, "pclk");
2112 return PTR_ERR(pclk
);
2113 hclk
= devm_clk_get(&pdev
->dev
, "hclk");
2115 return PTR_ERR(hclk
);
2117 spin_lock_init(&udc
->lock
);
2118 mutex_init(&udc
->vbus_mutex
);
2122 udc
->vbus_pin
= -ENODEV
;
2125 udc
->regs
= devm_ioremap(&pdev
->dev
, regs
->start
, resource_size(regs
));
2127 dev_err(&pdev
->dev
, "Unable to map I/O memory, aborting.\n");
2130 dev_info(&pdev
->dev
, "MMIO registers at 0x%08lx mapped at %p\n",
2131 (unsigned long)regs
->start
, udc
->regs
);
2132 udc
->fifo
= devm_ioremap(&pdev
->dev
, fifo
->start
, resource_size(fifo
));
2134 dev_err(&pdev
->dev
, "Unable to map FIFO, aborting.\n");
2137 dev_info(&pdev
->dev
, "FIFO at 0x%08lx mapped at %p\n",
2138 (unsigned long)fifo
->start
, udc
->fifo
);
2140 platform_set_drvdata(pdev
, udc
);
2142 /* Make sure we start from a clean slate */
2143 ret
= clk_prepare_enable(pclk
);
2145 dev_err(&pdev
->dev
, "Unable to enable pclk, aborting.\n");
2149 usba_writel(udc
, CTRL
, USBA_DISABLE_MASK
);
2150 clk_disable_unprepare(pclk
);
2152 if (pdev
->dev
.of_node
)
2153 udc
->usba_ep
= atmel_udc_of_init(pdev
, udc
);
2155 udc
->usba_ep
= usba_udc_pdata(pdev
, udc
);
2157 toggle_bias(udc
, 0);
2159 if (IS_ERR(udc
->usba_ep
))
2160 return PTR_ERR(udc
->usba_ep
);
2162 ret
= devm_request_irq(&pdev
->dev
, irq
, usba_udc_irq
, 0,
2163 "atmel_usba_udc", udc
);
2165 dev_err(&pdev
->dev
, "Cannot request irq %d (error %d)\n",
2171 if (gpio_is_valid(udc
->vbus_pin
)) {
2172 if (!devm_gpio_request(&pdev
->dev
, udc
->vbus_pin
, "atmel_usba_udc")) {
2173 irq_set_status_flags(gpio_to_irq(udc
->vbus_pin
),
2175 ret
= devm_request_threaded_irq(&pdev
->dev
,
2176 gpio_to_irq(udc
->vbus_pin
), NULL
,
2177 usba_vbus_irq_thread
, USBA_VBUS_IRQFLAGS
,
2178 "atmel_usba_udc", udc
);
2180 udc
->vbus_pin
= -ENODEV
;
2181 dev_warn(&udc
->pdev
->dev
,
2182 "failed to request vbus irq; "
2183 "assuming always on\n");
2186 /* gpio_request fail so use -EINVAL for gpio_is_valid */
2187 udc
->vbus_pin
= -EINVAL
;
2191 ret
= usb_add_gadget_udc(&pdev
->dev
, &udc
->gadget
);
2194 device_init_wakeup(&pdev
->dev
, 1);
2196 usba_init_debugfs(udc
);
2197 for (i
= 1; i
< udc
->num_ep
; i
++)
2198 usba_ep_init_debugfs(udc
, &udc
->usba_ep
[i
]);
2203 static int usba_udc_remove(struct platform_device
*pdev
)
2205 struct usba_udc
*udc
;
2208 udc
= platform_get_drvdata(pdev
);
2210 device_init_wakeup(&pdev
->dev
, 0);
2211 usb_del_gadget_udc(&udc
->gadget
);
2213 for (i
= 1; i
< udc
->num_ep
; i
++)
2214 usba_ep_cleanup_debugfs(&udc
->usba_ep
[i
]);
2215 usba_cleanup_debugfs(udc
);
2220 #ifdef CONFIG_PM_SLEEP
2221 static int usba_udc_suspend(struct device
*dev
)
2223 struct usba_udc
*udc
= dev_get_drvdata(dev
);
2229 mutex_lock(&udc
->vbus_mutex
);
2231 if (!device_may_wakeup(dev
)) {
2237 * Device may wake up. We stay clocked if we failed
2238 * to request vbus irq, assuming always on.
2240 if (gpio_is_valid(udc
->vbus_pin
)) {
2242 enable_irq_wake(gpio_to_irq(udc
->vbus_pin
));
2246 mutex_unlock(&udc
->vbus_mutex
);
2250 static int usba_udc_resume(struct device
*dev
)
2252 struct usba_udc
*udc
= dev_get_drvdata(dev
);
2258 if (device_may_wakeup(dev
) && gpio_is_valid(udc
->vbus_pin
))
2259 disable_irq_wake(gpio_to_irq(udc
->vbus_pin
));
2261 /* If Vbus is present, enable the controller and wait for reset */
2262 mutex_lock(&udc
->vbus_mutex
);
2263 udc
->vbus_prev
= vbus_is_present(udc
);
2266 mutex_unlock(&udc
->vbus_mutex
);
2272 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops
, usba_udc_suspend
, usba_udc_resume
);
2274 static struct platform_driver udc_driver
= {
2275 .remove
= usba_udc_remove
,
2277 .name
= "atmel_usba_udc",
2278 .pm
= &usba_udc_pm_ops
,
2279 .of_match_table
= of_match_ptr(atmel_udc_dt_ids
),
2283 module_platform_driver_probe(udc_driver
, usba_udc_probe
);
2285 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2286 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2287 MODULE_LICENSE("GPL");
2288 MODULE_ALIAS("platform:atmel_usba_udc");