2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
54 #define DRIVER_AUTHOR \
55 "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, " \
56 "Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, " \
57 "Roman Weissgaerber, Alan Stern"
58 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
60 /* for flakey hardware, ignore overcurrent indicators */
61 static bool ignore_oc
;
62 module_param(ignore_oc
, bool, S_IRUGO
);
63 MODULE_PARM_DESC(ignore_oc
, "ignore hardware overcurrent indications");
66 * debug = 0, no debugging messages
67 * debug = 1, dump failed URBs except for stalls
68 * debug = 2, dump all failed URBs (including stalls)
69 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
70 * debug = 3, show all TDs in URBs when dumping
72 #ifdef CONFIG_DYNAMIC_DEBUG
75 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
76 MODULE_PARM_DESC(debug
, "Debug level");
87 #define ERRBUF_LEN (32 * 1024)
89 static struct kmem_cache
*uhci_up_cachep
; /* urb_priv */
91 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
);
92 static void wakeup_rh(struct uhci_hcd
*uhci
);
93 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
);
96 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
98 static __hc32
uhci_frame_skel_link(struct uhci_hcd
*uhci
, int frame
)
103 * The interrupt queues will be interleaved as evenly as possible.
104 * There's not much to be done about period-1 interrupts; they have
105 * to occur in every frame. But we can schedule period-2 interrupts
106 * in odd-numbered frames, period-4 interrupts in frames congruent
107 * to 2 (mod 4), and so on. This way each frame only has two
108 * interrupt QHs, which will help spread out bandwidth utilization.
110 * ffs (Find First bit Set) does exactly what we need:
111 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
112 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
113 * ffs >= 7 => not on any high-period queue, so use
114 * period-1 QH = skelqh[9].
115 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
117 skelnum
= 8 - (int) __ffs(frame
| UHCI_NUMFRAMES
);
120 return LINK_TO_QH(uhci
, uhci
->skelqh
[skelnum
]);
123 #include "uhci-debug.c"
125 #include "uhci-hub.c"
128 * Finish up a host controller reset and update the recorded state.
130 static void finish_reset(struct uhci_hcd
*uhci
)
134 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
135 * bits in the port status and control registers.
136 * We have to clear them by hand.
138 for (port
= 0; port
< uhci
->rh_numports
; ++port
)
139 uhci_writew(uhci
, 0, USBPORTSC1
+ (port
* 2));
141 uhci
->port_c_suspend
= uhci
->resuming_ports
= 0;
142 uhci
->rh_state
= UHCI_RH_RESET
;
143 uhci
->is_stopped
= UHCI_IS_STOPPED
;
144 clear_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
148 * Last rites for a defunct/nonfunctional controller
149 * or one we don't want to use any more.
151 static void uhci_hc_died(struct uhci_hcd
*uhci
)
153 uhci_get_current_frame_number(uhci
);
154 uhci
->reset_hc(uhci
);
158 /* The current frame may already be partway finished */
159 ++uhci
->frame_number
;
163 * Initialize a controller that was newly discovered or has lost power
164 * or otherwise been reset while it was suspended. In none of these cases
165 * can we be sure of its previous state.
167 static void check_and_reset_hc(struct uhci_hcd
*uhci
)
169 if (uhci
->check_and_reset_hc(uhci
))
173 #if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
175 * The two functions below are generic reset functions that are used on systems
176 * that do not have keyboard and mouse legacy support. We assume that we are
177 * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined.
181 * Make sure the controller is completely inactive, unable to
182 * generate interrupts or do DMA.
184 static void uhci_generic_reset_hc(struct uhci_hcd
*uhci
)
186 /* Reset the HC - this will force us to get a
187 * new notification of any already connected
188 * ports due to the virtual disconnect that it
191 uhci_writew(uhci
, USBCMD_HCRESET
, USBCMD
);
194 if (uhci_readw(uhci
, USBCMD
) & USBCMD_HCRESET
)
195 dev_warn(uhci_dev(uhci
), "HCRESET not completed yet!\n");
197 /* Just to be safe, disable interrupt requests and
198 * make sure the controller is stopped.
200 uhci_writew(uhci
, 0, USBINTR
);
201 uhci_writew(uhci
, 0, USBCMD
);
205 * Initialize a controller that was newly discovered or has just been
206 * resumed. In either case we can't be sure of its previous state.
208 * Returns: 1 if the controller was reset, 0 otherwise.
210 static int uhci_generic_check_and_reset_hc(struct uhci_hcd
*uhci
)
212 unsigned int cmd
, intr
;
215 * When restarting a suspended controller, we expect all the
216 * settings to be the same as we left them:
218 * Controller is stopped and configured with EGSM set;
219 * No interrupts enabled except possibly Resume Detect.
221 * If any of these conditions are violated we do a complete reset.
224 cmd
= uhci_readw(uhci
, USBCMD
);
225 if ((cmd
& USBCMD_RS
) || !(cmd
& USBCMD_CF
) || !(cmd
& USBCMD_EGSM
)) {
226 dev_dbg(uhci_dev(uhci
), "%s: cmd = 0x%04x\n",
231 intr
= uhci_readw(uhci
, USBINTR
);
232 if (intr
& (~USBINTR_RESUME
)) {
233 dev_dbg(uhci_dev(uhci
), "%s: intr = 0x%04x\n",
240 dev_dbg(uhci_dev(uhci
), "Performing full reset\n");
241 uhci_generic_reset_hc(uhci
);
244 #endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */
247 * Store the basic register settings needed by the controller.
249 static void configure_hc(struct uhci_hcd
*uhci
)
251 /* Set the frame length to the default: 1 ms exactly */
252 uhci_writeb(uhci
, USBSOF_DEFAULT
, USBSOF
);
254 /* Store the frame list base address */
255 uhci_writel(uhci
, uhci
->frame_dma_handle
, USBFLBASEADD
);
257 /* Set the current frame number */
258 uhci_writew(uhci
, uhci
->frame_number
& UHCI_MAX_SOF_NUMBER
,
261 /* perform any arch/bus specific configuration */
262 if (uhci
->configure_hc
)
263 uhci
->configure_hc(uhci
);
266 static int resume_detect_interrupts_are_broken(struct uhci_hcd
*uhci
)
268 /* If we have to ignore overcurrent events then almost by definition
269 * we can't depend on resume-detect interrupts. */
273 return uhci
->resume_detect_interrupts_are_broken
?
274 uhci
->resume_detect_interrupts_are_broken(uhci
) : 0;
277 static int global_suspend_mode_is_broken(struct uhci_hcd
*uhci
)
279 return uhci
->global_suspend_mode_is_broken
?
280 uhci
->global_suspend_mode_is_broken(uhci
) : 0;
283 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
)
284 __releases(uhci
->lock
)
285 __acquires(uhci
->lock
)
288 int int_enable
, egsm_enable
, wakeup_enable
;
289 struct usb_device
*rhdev
= uhci_to_hcd(uhci
)->self
.root_hub
;
291 auto_stop
= (new_state
== UHCI_RH_AUTO_STOPPED
);
292 dev_dbg(&rhdev
->dev
, "%s%s\n", __func__
,
293 (auto_stop
? " (auto-stop)" : ""));
295 /* Start off by assuming Resume-Detect interrupts and EGSM work
296 * and that remote wakeups should be enabled.
298 egsm_enable
= USBCMD_EGSM
;
299 int_enable
= USBINTR_RESUME
;
303 * In auto-stop mode, we must be able to detect new connections.
304 * The user can force us to poll by disabling remote wakeup;
305 * otherwise we will use the EGSM/RD mechanism.
308 if (!device_may_wakeup(&rhdev
->dev
))
309 egsm_enable
= int_enable
= 0;
314 * In bus-suspend mode, we use the wakeup setting specified
318 if (!rhdev
->do_remote_wakeup
)
324 * UHCI doesn't distinguish between wakeup requests from downstream
325 * devices and local connect/disconnect events. There's no way to
326 * enable one without the other; both are controlled by EGSM. Thus
327 * if wakeups are disallowed then EGSM must be turned off -- in which
328 * case remote wakeup requests from downstream during system sleep
331 * In addition, if EGSM is broken then we can't use it. Likewise,
332 * if Resume-Detect interrupts are broken then we can't use them.
334 * Finally, neither EGSM nor RD is useful by itself. Without EGSM,
335 * the RD status bit will never get set. Without RD, the controller
336 * won't generate interrupts to tell the system about wakeup events.
338 if (!wakeup_enable
|| global_suspend_mode_is_broken(uhci
) ||
339 resume_detect_interrupts_are_broken(uhci
))
340 egsm_enable
= int_enable
= 0;
342 uhci
->RD_enable
= !!int_enable
;
343 uhci_writew(uhci
, int_enable
, USBINTR
);
344 uhci_writew(uhci
, egsm_enable
| USBCMD_CF
, USBCMD
);
348 /* If we're auto-stopping then no devices have been attached
349 * for a while, so there shouldn't be any active URBs and the
350 * controller should stop after a few microseconds. Otherwise
351 * we will give the controller one frame to stop.
353 if (!auto_stop
&& !(uhci_readw(uhci
, USBSTS
) & USBSTS_HCH
)) {
354 uhci
->rh_state
= UHCI_RH_SUSPENDING
;
355 spin_unlock_irq(&uhci
->lock
);
357 spin_lock_irq(&uhci
->lock
);
361 if (!(uhci_readw(uhci
, USBSTS
) & USBSTS_HCH
))
362 dev_warn(uhci_dev(uhci
), "Controller not stopped yet!\n");
364 uhci_get_current_frame_number(uhci
);
366 uhci
->rh_state
= new_state
;
367 uhci
->is_stopped
= UHCI_IS_STOPPED
;
370 * If remote wakeup is enabled but either EGSM or RD interrupts
371 * doesn't work, then we won't get an interrupt when a wakeup event
372 * occurs. Thus the suspended root hub needs to be polled.
374 if (wakeup_enable
&& (!int_enable
|| !egsm_enable
))
375 set_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
377 clear_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
379 uhci_scan_schedule(uhci
);
383 static void start_rh(struct uhci_hcd
*uhci
)
385 uhci
->is_stopped
= 0;
387 /* Mark it configured and running with a 64-byte max packet.
388 * All interrupts are enabled, even though RESUME won't do anything.
390 uhci_writew(uhci
, USBCMD_RS
| USBCMD_CF
| USBCMD_MAXP
, USBCMD
);
391 uhci_writew(uhci
, USBINTR_TIMEOUT
| USBINTR_RESUME
|
392 USBINTR_IOC
| USBINTR_SP
, USBINTR
);
394 uhci
->rh_state
= UHCI_RH_RUNNING
;
395 set_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
398 static void wakeup_rh(struct uhci_hcd
*uhci
)
399 __releases(uhci
->lock
)
400 __acquires(uhci
->lock
)
402 dev_dbg(&uhci_to_hcd(uhci
)->self
.root_hub
->dev
,
404 uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
?
405 " (auto-start)" : "");
407 /* If we are auto-stopped then no devices are attached so there's
408 * no need for wakeup signals. Otherwise we send Global Resume
411 if (uhci
->rh_state
== UHCI_RH_SUSPENDED
) {
414 /* Keep EGSM on if it was set before */
415 egsm
= uhci_readw(uhci
, USBCMD
) & USBCMD_EGSM
;
416 uhci
->rh_state
= UHCI_RH_RESUMING
;
417 uhci_writew(uhci
, USBCMD_FGR
| USBCMD_CF
| egsm
, USBCMD
);
418 spin_unlock_irq(&uhci
->lock
);
420 spin_lock_irq(&uhci
->lock
);
424 /* End Global Resume and wait for EOP to be sent */
425 uhci_writew(uhci
, USBCMD_CF
, USBCMD
);
428 if (uhci_readw(uhci
, USBCMD
) & USBCMD_FGR
)
429 dev_warn(uhci_dev(uhci
), "FGR not stopped yet!\n");
434 /* Restart root hub polling */
435 mod_timer(&uhci_to_hcd(uhci
)->rh_timer
, jiffies
);
438 static irqreturn_t
uhci_irq(struct usb_hcd
*hcd
)
440 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
441 unsigned short status
;
444 * Read the interrupt status, and write it back to clear the
445 * interrupt cause. Contrary to the UHCI specification, the
446 * "HC Halted" status bit is persistent: it is RO, not R/WC.
448 status
= uhci_readw(uhci
, USBSTS
);
449 if (!(status
& ~USBSTS_HCH
)) /* shared interrupt, not mine */
451 uhci_writew(uhci
, status
, USBSTS
); /* Clear it */
453 spin_lock(&uhci
->lock
);
454 if (unlikely(!uhci
->is_initialized
)) /* not yet configured */
457 if (status
& ~(USBSTS_USBINT
| USBSTS_ERROR
| USBSTS_RD
)) {
458 if (status
& USBSTS_HSE
)
459 dev_err(uhci_dev(uhci
),
460 "host system error, PCI problems?\n");
461 if (status
& USBSTS_HCPE
)
462 dev_err(uhci_dev(uhci
),
463 "host controller process error, something bad happened!\n");
464 if (status
& USBSTS_HCH
) {
465 if (uhci
->rh_state
>= UHCI_RH_RUNNING
) {
466 dev_err(uhci_dev(uhci
),
467 "host controller halted, very bad!\n");
468 if (debug
> 1 && errbuf
) {
469 /* Print the schedule for debugging */
470 uhci_sprint_schedule(uhci
, errbuf
,
471 ERRBUF_LEN
- EXTRA_SPACE
);
477 /* Force a callback in case there are
479 mod_timer(&hcd
->rh_timer
, jiffies
);
484 if (status
& USBSTS_RD
) {
485 spin_unlock(&uhci
->lock
);
486 usb_hcd_poll_rh_status(hcd
);
488 uhci_scan_schedule(uhci
);
490 spin_unlock(&uhci
->lock
);
497 * Store the current frame number in uhci->frame_number if the controller
498 * is running. Expand from 11 bits (of which we use only 10) to a
499 * full-sized integer.
501 * Like many other parts of the driver, this code relies on being polled
502 * more than once per second as long as the controller is running.
504 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
)
506 if (!uhci
->is_stopped
) {
509 delta
= (uhci_readw(uhci
, USBFRNUM
) - uhci
->frame_number
) &
510 (UHCI_NUMFRAMES
- 1);
511 uhci
->frame_number
+= delta
;
516 * De-allocate all resources
518 static void release_uhci(struct uhci_hcd
*uhci
)
523 spin_lock_irq(&uhci
->lock
);
524 uhci
->is_initialized
= 0;
525 spin_unlock_irq(&uhci
->lock
);
527 debugfs_remove(uhci
->dentry
);
529 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++)
530 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
532 uhci_free_td(uhci
, uhci
->term_td
);
534 dma_pool_destroy(uhci
->qh_pool
);
536 dma_pool_destroy(uhci
->td_pool
);
538 kfree(uhci
->frame_cpu
);
540 dma_free_coherent(uhci_dev(uhci
),
541 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
542 uhci
->frame
, uhci
->frame_dma_handle
);
546 * Allocate a frame list, and then setup the skeleton
548 * The hardware doesn't really know any difference
549 * in the queues, but the order does matter for the
550 * protocols higher up. The order in which the queues
551 * are encountered by the hardware is:
553 * - All isochronous events are handled before any
554 * of the queues. We don't do that here, because
555 * we'll create the actual TD entries on demand.
556 * - The first queue is the high-period interrupt queue.
557 * - The second queue is the period-1 interrupt and async
558 * (low-speed control, full-speed control, then bulk) queue.
559 * - The third queue is the terminating bandwidth reclamation queue,
560 * which contains no members, loops back to itself, and is present
561 * only when FSBR is on and there are no full-speed control or bulk QHs.
563 static int uhci_start(struct usb_hcd
*hcd
)
565 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
568 struct dentry __maybe_unused
*dentry
;
570 hcd
->uses_new_polling
= 1;
571 /* Accept arbitrarily long scatter-gather lists */
572 if (!(hcd
->driver
->flags
& HCD_LOCAL_MEM
))
573 hcd
->self
.sg_tablesize
= ~0;
575 spin_lock_init(&uhci
->lock
);
576 setup_timer(&uhci
->fsbr_timer
, uhci_fsbr_timeout
,
577 (unsigned long) uhci
);
578 INIT_LIST_HEAD(&uhci
->idle_qh_list
);
579 init_waitqueue_head(&uhci
->waitqh
);
581 #ifdef UHCI_DEBUG_OPS
582 dentry
= debugfs_create_file(hcd
->self
.bus_name
,
583 S_IFREG
|S_IRUGO
|S_IWUSR
, uhci_debugfs_root
,
584 uhci
, &uhci_debug_operations
);
586 dev_err(uhci_dev(uhci
), "couldn't create uhci debugfs entry\n");
589 uhci
->dentry
= dentry
;
592 uhci
->frame
= dma_alloc_coherent(uhci_dev(uhci
),
593 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
594 &uhci
->frame_dma_handle
, GFP_KERNEL
);
596 dev_err(uhci_dev(uhci
),
597 "unable to allocate consistent memory for frame list\n");
598 goto err_alloc_frame
;
600 memset(uhci
->frame
, 0, UHCI_NUMFRAMES
* sizeof(*uhci
->frame
));
602 uhci
->frame_cpu
= kcalloc(UHCI_NUMFRAMES
, sizeof(*uhci
->frame_cpu
),
604 if (!uhci
->frame_cpu
)
605 goto err_alloc_frame_cpu
;
607 uhci
->td_pool
= dma_pool_create("uhci_td", uhci_dev(uhci
),
608 sizeof(struct uhci_td
), 16, 0);
609 if (!uhci
->td_pool
) {
610 dev_err(uhci_dev(uhci
), "unable to create td dma_pool\n");
611 goto err_create_td_pool
;
614 uhci
->qh_pool
= dma_pool_create("uhci_qh", uhci_dev(uhci
),
615 sizeof(struct uhci_qh
), 16, 0);
616 if (!uhci
->qh_pool
) {
617 dev_err(uhci_dev(uhci
), "unable to create qh dma_pool\n");
618 goto err_create_qh_pool
;
621 uhci
->term_td
= uhci_alloc_td(uhci
);
622 if (!uhci
->term_td
) {
623 dev_err(uhci_dev(uhci
), "unable to allocate terminating TD\n");
624 goto err_alloc_term_td
;
627 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
628 uhci
->skelqh
[i
] = uhci_alloc_qh(uhci
, NULL
, NULL
);
629 if (!uhci
->skelqh
[i
]) {
630 dev_err(uhci_dev(uhci
), "unable to allocate QH\n");
631 goto err_alloc_skelqh
;
636 * 8 Interrupt queues; link all higher int queues to int1 = async
638 for (i
= SKEL_ISO
+ 1; i
< SKEL_ASYNC
; ++i
)
639 uhci
->skelqh
[i
]->link
= LINK_TO_QH(uhci
, uhci
->skel_async_qh
);
640 uhci
->skel_async_qh
->link
= UHCI_PTR_TERM(uhci
);
641 uhci
->skel_term_qh
->link
= LINK_TO_QH(uhci
, uhci
->skel_term_qh
);
643 /* This dummy TD is to work around a bug in Intel PIIX controllers */
644 uhci_fill_td(uhci
, uhci
->term_td
, 0, uhci_explen(0) |
645 (0x7f << TD_TOKEN_DEVADDR_SHIFT
) | USB_PID_IN
, 0);
646 uhci
->term_td
->link
= UHCI_PTR_TERM(uhci
);
647 uhci
->skel_async_qh
->element
= uhci
->skel_term_qh
->element
=
648 LINK_TO_TD(uhci
, uhci
->term_td
);
651 * Fill the frame list: make all entries point to the proper
654 for (i
= 0; i
< UHCI_NUMFRAMES
; i
++) {
656 /* Only place we don't use the frame list routines */
657 uhci
->frame
[i
] = uhci_frame_skel_link(uhci
, i
);
661 * Some architectures require a full mb() to enforce completion of
662 * the memory writes above before the I/O transfers in configure_hc().
666 spin_lock_irq(&uhci
->lock
);
668 uhci
->is_initialized
= 1;
670 spin_unlock_irq(&uhci
->lock
);
677 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
679 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
682 uhci_free_td(uhci
, uhci
->term_td
);
685 dma_pool_destroy(uhci
->qh_pool
);
688 dma_pool_destroy(uhci
->td_pool
);
691 kfree(uhci
->frame_cpu
);
694 dma_free_coherent(uhci_dev(uhci
),
695 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
696 uhci
->frame
, uhci
->frame_dma_handle
);
699 debugfs_remove(uhci
->dentry
);
704 static void uhci_stop(struct usb_hcd
*hcd
)
706 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
708 spin_lock_irq(&uhci
->lock
);
709 if (HCD_HW_ACCESSIBLE(hcd
) && !uhci
->dead
)
711 uhci_scan_schedule(uhci
);
712 spin_unlock_irq(&uhci
->lock
);
713 synchronize_irq(hcd
->irq
);
715 del_timer_sync(&uhci
->fsbr_timer
);
720 static int uhci_rh_suspend(struct usb_hcd
*hcd
)
722 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
725 spin_lock_irq(&uhci
->lock
);
726 if (!HCD_HW_ACCESSIBLE(hcd
))
729 ; /* Dead controllers tell no tales */
731 /* Once the controller is stopped, port resumes that are already
732 * in progress won't complete. Hence if remote wakeup is enabled
733 * for the root hub and any ports are in the middle of a resume or
734 * remote wakeup, we must fail the suspend.
736 else if (hcd
->self
.root_hub
->do_remote_wakeup
&&
737 uhci
->resuming_ports
) {
738 dev_dbg(uhci_dev(uhci
),
739 "suspend failed because a port is resuming\n");
742 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
743 spin_unlock_irq(&uhci
->lock
);
747 static int uhci_rh_resume(struct usb_hcd
*hcd
)
749 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
752 spin_lock_irq(&uhci
->lock
);
753 if (!HCD_HW_ACCESSIBLE(hcd
))
755 else if (!uhci
->dead
)
757 spin_unlock_irq(&uhci
->lock
);
763 /* Wait until a particular device/endpoint's QH is idle, and free it */
764 static void uhci_hcd_endpoint_disable(struct usb_hcd
*hcd
,
765 struct usb_host_endpoint
*hep
)
767 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
770 spin_lock_irq(&uhci
->lock
);
771 qh
= (struct uhci_qh
*) hep
->hcpriv
;
775 while (qh
->state
!= QH_STATE_IDLE
) {
777 spin_unlock_irq(&uhci
->lock
);
778 wait_event_interruptible(uhci
->waitqh
,
779 qh
->state
== QH_STATE_IDLE
);
780 spin_lock_irq(&uhci
->lock
);
784 uhci_free_qh(uhci
, qh
);
786 spin_unlock_irq(&uhci
->lock
);
789 static int uhci_hcd_get_frame_number(struct usb_hcd
*hcd
)
791 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
792 unsigned frame_number
;
795 /* Minimize latency by avoiding the spinlock */
796 frame_number
= uhci
->frame_number
;
798 delta
= (uhci_readw(uhci
, USBFRNUM
) - frame_number
) &
799 (UHCI_NUMFRAMES
- 1);
800 return frame_number
+ delta
;
803 /* Determines number of ports on controller */
804 static int uhci_count_ports(struct usb_hcd
*hcd
)
806 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
807 unsigned io_size
= (unsigned) hcd
->rsrc_len
;
810 /* The UHCI spec says devices must have 2 ports, and goes on to say
811 * they may have more but gives no way to determine how many there
812 * are. However according to the UHCI spec, Bit 7 of the port
813 * status and control register is always set to 1. So we try to
814 * use this to our advantage. Another common failure mode when
815 * a nonexistent register is addressed is to return all ones, so
816 * we test for that also.
818 for (port
= 0; port
< (io_size
- USBPORTSC1
) / 2; port
++) {
819 unsigned int portstatus
;
821 portstatus
= uhci_readw(uhci
, USBPORTSC1
+ (port
* 2));
822 if (!(portstatus
& 0x0080) || portstatus
== 0xffff)
826 dev_info(uhci_dev(uhci
), "detected %d ports\n", port
);
828 /* Anything greater than 7 is weird so we'll ignore it. */
829 if (port
> UHCI_RH_MAXCHILD
) {
830 dev_info(uhci_dev(uhci
),
831 "port count misdetected? forcing to 2 ports\n");
838 static const char hcd_name
[] = "uhci_hcd";
841 #include "uhci-pci.c"
842 #define PCI_DRIVER uhci_pci_driver
845 #ifdef CONFIG_SPARC_LEON
846 #include "uhci-grlib.c"
847 #define PLATFORM_DRIVER uhci_grlib_driver
850 #ifdef CONFIG_USB_UHCI_PLATFORM
851 #include "uhci-platform.c"
852 #define PLATFORM_DRIVER uhci_platform_driver
855 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
856 #error "missing bus glue for uhci-hcd"
859 static int __init
uhci_hcd_init(void)
861 int retval
= -ENOMEM
;
866 printk(KERN_INFO
"uhci_hcd: " DRIVER_DESC
"%s\n",
867 ignore_oc
? ", overcurrent ignored" : "");
868 set_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
870 #ifdef CONFIG_DYNAMIC_DEBUG
871 errbuf
= kmalloc(ERRBUF_LEN
, GFP_KERNEL
);
874 uhci_debugfs_root
= debugfs_create_dir("uhci", usb_debug_root
);
875 if (!uhci_debugfs_root
)
879 uhci_up_cachep
= kmem_cache_create("uhci_urb_priv",
880 sizeof(struct urb_priv
), 0, 0, NULL
);
884 #ifdef PLATFORM_DRIVER
885 retval
= platform_driver_register(&PLATFORM_DRIVER
);
891 retval
= pci_register_driver(&PCI_DRIVER
);
901 #ifdef PLATFORM_DRIVER
902 platform_driver_unregister(&PLATFORM_DRIVER
);
905 kmem_cache_destroy(uhci_up_cachep
);
908 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
909 debugfs_remove(uhci_debugfs_root
);
917 clear_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
921 static void __exit
uhci_hcd_cleanup(void)
923 #ifdef PLATFORM_DRIVER
924 platform_driver_unregister(&PLATFORM_DRIVER
);
927 pci_unregister_driver(&PCI_DRIVER
);
929 kmem_cache_destroy(uhci_up_cachep
);
930 debugfs_remove(uhci_debugfs_root
);
931 #ifdef CONFIG_DYNAMIC_DEBUG
934 clear_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
937 module_init(uhci_hcd_init
);
938 module_exit(uhci_hcd_cleanup
);
940 MODULE_AUTHOR(DRIVER_AUTHOR
);
941 MODULE_DESCRIPTION(DRIVER_DESC
);
942 MODULE_LICENSE("GPL");