2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/linkage.h>
10 #include <asm/cache.h>
13 * The memset implementation below is optimized to use prefetchw and prealloc
14 * instruction in case of CPU with 64B L1 data cache line (L1_CACHE_SHIFT == 6)
15 * If you want to implement optimized memset for other possible L1 data cache
16 * line lengths (32B and 128B) you should rewrite code carefully checking
17 * we don't call any prefetchw/prealloc instruction for L1 cache lines which
18 * don't belongs to memset area.
21 #if L1_CACHE_SHIFT == 6
23 .macro PREALLOC_INSTR reg, off
27 .macro PREFETCHW_INSTR reg, off
28 prefetchw [\reg, \off]
36 .macro PREFETCHW_INSTR
42 PREFETCHW_INSTR r0, 0 ; Prefetch the first write location
46 mov r3, r0 ; don't clobber ret val
49 brls.d.nt r2, 8, .Lsmallchunk
54 lpnz @.Laligndestination
60 ;;; Destination is aligned
74 ;;; Convert len to Dwords, unfold x8
75 lsr.f lp_count, lp_count, 6
79 PREALLOC_INSTR r3, 64 ; alloc next line w/o fetching
81 #ifdef CONFIG_ARC_HAS_LL64
110 lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes
113 #ifdef CONFIG_ARC_HAS_LL64
130 and.f lp_count, r2, 0x1F ;Last remaining 31 bytes
142 ; adjust bzero args to memset args
144 b.d memset ;tail call so need to tinker with blink