| blob | e58fab8aec5df2a885ea8c04f9eefda09cf2d307 |
1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 / {
15 compatible = "ti,am33xx";
16 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 chosen { };
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 d_can0 = &dcan0;
32 d_can1 = &dcan1;
33 usb0 = &usb0;
34 usb1 = &usb1;
35 phy0 = &usb0_phy;
36 phy1 = &usb1_phy;
37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
39 spi0 = &spi0;
40 spi1 = &spi1;
41 };
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46 cpu@0 {
47 compatible = "arm,cortex-a8";
48 device_type = "cpu";
49 reg = <0>;
51 operating-points-v2 = <&cpu0_opp_table>;
53 clocks = <&dpll_mpu_ck>;
54 clock-names = "cpu";
56 clock-latency = <300000>; /* From omap-cpufreq driver */
57 };
58 };
60 cpu0_opp_table: opp-table {
61 compatible = "operating-points-v2-ti-cpu";
62 syscon = <&scm_conf>;
64 /*
65 * The three following nodes are marked with opp-suspend
66 * because the can not be enabled simultaneously on a
67 * single SoC.
68 */
69 opp50-300000000 {
70 opp-hz = /bits/ 64 <300000000>;
71 opp-microvolt = <950000 931000 969000>;
72 opp-supported-hw = <0x06 0x0010>;
73 opp-suspend;
74 };
76 opp100-275000000 {
77 opp-hz = /bits/ 64 <275000000>;
78 opp-microvolt = <1100000 1078000 1122000>;
79 opp-supported-hw = <0x01 0x00FF>;
80 opp-suspend;
81 };
83 opp100-300000000 {
84 opp-hz = /bits/ 64 <300000000>;
85 opp-microvolt = <1100000 1078000 1122000>;
86 opp-supported-hw = <0x06 0x0020>;
87 opp-suspend;
88 };
90 opp100-500000000 {
91 opp-hz = /bits/ 64 <500000000>;
92 opp-microvolt = <1100000 1078000 1122000>;
93 opp-supported-hw = <0x01 0xFFFF>;
94 };
96 opp100-600000000 {
97 opp-hz = /bits/ 64 <600000000>;
98 opp-microvolt = <1100000 1078000 1122000>;
99 opp-supported-hw = <0x06 0x0040>;
100 };
102 opp120-600000000 {
103 opp-hz = /bits/ 64 <600000000>;
104 opp-microvolt = <1200000 1176000 1224000>;
105 opp-supported-hw = <0x01 0xFFFF>;
106 };
108 opp120-720000000 {
109 opp-hz = /bits/ 64 <720000000>;
110 opp-microvolt = <1200000 1176000 1224000>;
111 opp-supported-hw = <0x06 0x0080>;
112 };
114 oppturbo-720000000 {
115 opp-hz = /bits/ 64 <720000000>;
116 opp-microvolt = <1260000 1234800 1285200>;
117 opp-supported-hw = <0x01 0xFFFF>;
118 };
120 oppturbo-800000000 {
121 opp-hz = /bits/ 64 <800000000>;
122 opp-microvolt = <1260000 1234800 1285200>;
123 opp-supported-hw = <0x06 0x0100>;
124 };
126 oppnitro-1000000000 {
127 opp-hz = /bits/ 64 <1000000000>;
128 opp-microvolt = <1325000 1298500 1351500>;
129 opp-supported-hw = <0x04 0x0200>;
130 };
131 };
133 pmu {
134 compatible = "arm,cortex-a8-pmu";
135 interrupts = <3>;
136 };
138 /*
139 * The soc node represents the soc top level view. It is used for IPs
140 * that are not memory mapped in the MPU view or for the MPU itself.
141 */
142 soc {
143 compatible = "ti,omap-infra";
144 mpu {
145 compatible = "ti,omap3-mpu";
146 ti,hwmods = "mpu";
147 };
148 };
150 /*
151 * XXX: Use a flat representation of the AM33XX interconnect.
152 * The real AM33XX interconnect network is quite complex. Since
153 * it will not bring real advantage to represent that in DT
154 * for the moment, just use a fake OCP bus entry to represent
155 * the whole bus hierarchy.
156 */
157 ocp {
158 compatible = "simple-bus";
159 #address-cells = <1>;
160 #size-cells = <1>;
161 ranges;
162 ti,hwmods = "l3_main";
164 l4_wkup: l4_wkup@44c00000 {
165 compatible = "ti,am3-l4-wkup", "simple-bus";
166 #address-cells = <1>;
167 #size-cells = <1>;
168 ranges = <0 0x44c00000 0x280000>;
170 wkup_m3: wkup_m3@100000 {
171 compatible = "ti,am3352-wkup-m3";
172 reg = <0x100000 0x4000>,
173 <0x180000 0x2000>;
174 reg-names = "umem", "dmem";
175 ti,hwmods = "wkup_m3";
176 ti,pm-firmware = "am335x-pm-firmware.elf";
177 };
179 prcm: prcm@200000 {
180 compatible = "ti,am3-prcm";
181 reg = <0x200000 0x4000>;
183 prcm_clocks: clocks {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 };
188 prcm_clockdomains: clockdomains {
189 };
190 };
192 scm: scm@210000 {
193 compatible = "ti,am3-scm", "simple-bus";
194 reg = <0x210000 0x2000>;
195 #address-cells = <1>;
196 #size-cells = <1>;
197 #pinctrl-cells = <1>;
198 ranges = <0 0x210000 0x2000>;
200 am33xx_pinmux: pinmux@800 {
201 compatible = "pinctrl-single";
202 reg = <0x800 0x238>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 #pinctrl-cells = <1>;
206 pinctrl-single,register-width = <32>;
207 pinctrl-single,function-mask = <0x7f>;
208 };
210 scm_conf: scm_conf@0 {
211 compatible = "syscon", "simple-bus";
212 reg = <0x0 0x800>;
213 #address-cells = <1>;
214 #size-cells = <1>;
215 ranges = <0 0 0x800>;
217 scm_clocks: clocks {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 };
221 };
223 wkup_m3_ipc: wkup_m3_ipc@1324 {
224 compatible = "ti,am3352-wkup-m3-ipc";
225 reg = <0x1324 0x24>;
226 interrupts = <78>;
227 ti,rproc = <&wkup_m3>;
228 mboxes = <&mailbox &mbox_wkupm3>;
229 };
231 edma_xbar: dma-router@f90 {
232 compatible = "ti,am335x-edma-crossbar";
233 reg = <0xf90 0x40>;
234 #dma-cells = <3>;
235 dma-requests = <32>;
236 dma-masters = <&edma>;
237 };
239 scm_clockdomains: clockdomains {
240 };
241 };
242 };
244 intc: interrupt-controller@48200000 {
245 compatible = "ti,am33xx-intc";
246 interrupt-controller;
247 #interrupt-cells = <1>;
248 reg = <0x48200000 0x1000>;
249 };
251 edma: edma@49000000 {
252 compatible = "ti,edma3-tpcc";
253 ti,hwmods = "tpcc";
254 reg = <0x49000000 0x10000>;
255 reg-names = "edma3_cc";
256 interrupts = <12 13 14>;
257 interrupt-names = "edma3_ccint", "edma3_mperr",
258 "edma3_ccerrint";
259 dma-requests = <64>;
260 #dma-cells = <2>;
262 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
263 <&edma_tptc2 0>;
265 ti,edma-memcpy-channels = <20 21>;
266 };
268 edma_tptc0: tptc@49800000 {
269 compatible = "ti,edma3-tptc";
270 ti,hwmods = "tptc0";
271 reg = <0x49800000 0x100000>;
272 interrupts = <112>;
273 interrupt-names = "edma3_tcerrint";
274 };
276 edma_tptc1: tptc@49900000 {
277 compatible = "ti,edma3-tptc";
278 ti,hwmods = "tptc1";
279 reg = <0x49900000 0x100000>;
280 interrupts = <113>;
281 interrupt-names = "edma3_tcerrint";
282 };
284 edma_tptc2: tptc@49a00000 {
285 compatible = "ti,edma3-tptc";
286 ti,hwmods = "tptc2";
287 reg = <0x49a00000 0x100000>;
288 interrupts = <114>;
289 interrupt-names = "edma3_tcerrint";
290 };
292 gpio0: gpio@44e07000 {
293 compatible = "ti,omap4-gpio";
294 ti,hwmods = "gpio1";
295 gpio-controller;
296 #gpio-cells = <2>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
299 reg = <0x44e07000 0x1000>;
300 interrupts = <96>;
301 };
303 gpio1: gpio@4804c000 {
304 compatible = "ti,omap4-gpio";
305 ti,hwmods = "gpio2";
306 gpio-controller;
307 #gpio-cells = <2>;
308 interrupt-controller;
309 #interrupt-cells = <2>;
310 reg = <0x4804c000 0x1000>;
311 interrupts = <98>;
312 };
314 gpio2: gpio@481ac000 {
315 compatible = "ti,omap4-gpio";
316 ti,hwmods = "gpio3";
317 gpio-controller;
318 #gpio-cells = <2>;
319 interrupt-controller;
320 #interrupt-cells = <2>;
321 reg = <0x481ac000 0x1000>;
322 interrupts = <32>;
323 };
325 gpio3: gpio@481ae000 {
326 compatible = "ti,omap4-gpio";
327 ti,hwmods = "gpio4";
328 gpio-controller;
329 #gpio-cells = <2>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 reg = <0x481ae000 0x1000>;
333 interrupts = <62>;
334 };
336 uart0: serial@44e09000 {
337 compatible = "ti,am3352-uart", "ti,omap3-uart";
338 ti,hwmods = "uart1";
339 clock-frequency = <48000000>;
340 reg = <0x44e09000 0x2000>;
341 interrupts = <72>;
342 status = "disabled";
343 dmas = <&edma 26 0>, <&edma 27 0>;
344 dma-names = "tx", "rx";
345 };
347 uart1: serial@48022000 {
348 compatible = "ti,am3352-uart", "ti,omap3-uart";
349 ti,hwmods = "uart2";
350 clock-frequency = <48000000>;
351 reg = <0x48022000 0x2000>;
352 interrupts = <73>;
353 status = "disabled";
354 dmas = <&edma 28 0>, <&edma 29 0>;
355 dma-names = "tx", "rx";
356 };
358 uart2: serial@48024000 {
359 compatible = "ti,am3352-uart", "ti,omap3-uart";
360 ti,hwmods = "uart3";
361 clock-frequency = <48000000>;
362 reg = <0x48024000 0x2000>;
363 interrupts = <74>;
364 status = "disabled";
365 dmas = <&edma 30 0>, <&edma 31 0>;
366 dma-names = "tx", "rx";
367 };
369 uart3: serial@481a6000 {
370 compatible = "ti,am3352-uart", "ti,omap3-uart";
371 ti,hwmods = "uart4";
372 clock-frequency = <48000000>;
373 reg = <0x481a6000 0x2000>;
374 interrupts = <44>;
375 status = "disabled";
376 };
378 uart4: serial@481a8000 {
379 compatible = "ti,am3352-uart", "ti,omap3-uart";
380 ti,hwmods = "uart5";
381 clock-frequency = <48000000>;
382 reg = <0x481a8000 0x2000>;
383 interrupts = <45>;
384 status = "disabled";
385 };
387 uart5: serial@481aa000 {
388 compatible = "ti,am3352-uart", "ti,omap3-uart";
389 ti,hwmods = "uart6";
390 clock-frequency = <48000000>;
391 reg = <0x481aa000 0x2000>;
392 interrupts = <46>;
393 status = "disabled";
394 };
396 i2c0: i2c@44e0b000 {
397 compatible = "ti,omap4-i2c";
398 #address-cells = <1>;
399 #size-cells = <0>;
400 ti,hwmods = "i2c1";
401 reg = <0x44e0b000 0x1000>;
402 interrupts = <70>;
403 status = "disabled";
404 };
406 i2c1: i2c@4802a000 {
407 compatible = "ti,omap4-i2c";
408 #address-cells = <1>;
409 #size-cells = <0>;
410 ti,hwmods = "i2c2";
411 reg = <0x4802a000 0x1000>;
412 interrupts = <71>;
413 status = "disabled";
414 };
416 i2c2: i2c@4819c000 {
417 compatible = "ti,omap4-i2c";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 ti,hwmods = "i2c3";
421 reg = <0x4819c000 0x1000>;
422 interrupts = <30>;
423 status = "disabled";
424 };
426 mmc1: mmc@48060000 {
427 compatible = "ti,omap4-hsmmc";
428 ti,hwmods = "mmc1";
429 ti,dual-volt;
430 ti,needs-special-reset;
431 ti,needs-special-hs-handling;
432 dmas = <&edma_xbar 24 0 0
433 &edma_xbar 25 0 0>;
434 dma-names = "tx", "rx";
435 interrupts = <64>;
436 reg = <0x48060000 0x1000>;
437 status = "disabled";
438 };
440 mmc2: mmc@481d8000 {
441 compatible = "ti,omap4-hsmmc";
442 ti,hwmods = "mmc2";
443 ti,needs-special-reset;
444 dmas = <&edma 2 0
445 &edma 3 0>;
446 dma-names = "tx", "rx";
447 interrupts = <28>;
448 reg = <0x481d8000 0x1000>;
449 status = "disabled";
450 };
452 mmc3: mmc@47810000 {
453 compatible = "ti,omap4-hsmmc";
454 ti,hwmods = "mmc3";
455 ti,needs-special-reset;
456 interrupts = <29>;
457 reg = <0x47810000 0x1000>;
458 status = "disabled";
459 };
461 hwspinlock: spinlock@480ca000 {
462 compatible = "ti,omap4-hwspinlock";
463 reg = <0x480ca000 0x1000>;
464 ti,hwmods = "spinlock";
465 #hwlock-cells = <1>;
466 };
468 wdt2: wdt@44e35000 {
469 compatible = "ti,omap3-wdt";
470 ti,hwmods = "wd_timer2";
471 reg = <0x44e35000 0x1000>;
472 interrupts = <91>;
473 };
475 dcan0: can@481cc000 {
476 compatible = "ti,am3352-d_can";
477 ti,hwmods = "d_can0";
478 reg = <0x481cc000 0x2000>;
479 clocks = <&dcan0_fck>;
480 clock-names = "fck";
481 syscon-raminit = <&scm_conf 0x644 0>;
482 interrupts = <52>;
483 status = "disabled";
484 };
486 dcan1: can@481d0000 {
487 compatible = "ti,am3352-d_can";
488 ti,hwmods = "d_can1";
489 reg = <0x481d0000 0x2000>;
490 clocks = <&dcan1_fck>;
491 clock-names = "fck";
492 syscon-raminit = <&scm_conf 0x644 1>;
493 interrupts = <55>;
494 status = "disabled";
495 };
497 mailbox: mailbox@480C8000 {
498 compatible = "ti,omap4-mailbox";
499 reg = <0x480C8000 0x200>;
500 interrupts = <77>;
501 ti,hwmods = "mailbox";
502 #mbox-cells = <1>;
503 ti,mbox-num-users = <4>;
504 ti,mbox-num-fifos = <8>;
505 mbox_wkupm3: wkup_m3 {
506 ti,mbox-send-noirq;
507 ti,mbox-tx = <0 0 0>;
508 ti,mbox-rx = <0 0 3>;
509 };
510 };
512 timer1: timer@44e31000 {
513 compatible = "ti,am335x-timer-1ms";
514 reg = <0x44e31000 0x400>;
515 interrupts = <67>;
516 ti,hwmods = "timer1";
517 ti,timer-alwon;
518 };
520 timer2: timer@48040000 {
521 compatible = "ti,am335x-timer";
522 reg = <0x48040000 0x400>;
523 interrupts = <68>;
524 ti,hwmods = "timer2";
525 };
527 timer3: timer@48042000 {
528 compatible = "ti,am335x-timer";
529 reg = <0x48042000 0x400>;
530 interrupts = <69>;
531 ti,hwmods = "timer3";
532 };
534 timer4: timer@48044000 {
535 compatible = "ti,am335x-timer";
536 reg = <0x48044000 0x400>;
537 interrupts = <92>;
538 ti,hwmods = "timer4";
539 ti,timer-pwm;
540 };
542 timer5: timer@48046000 {
543 compatible = "ti,am335x-timer";
544 reg = <0x48046000 0x400>;
545 interrupts = <93>;
546 ti,hwmods = "timer5";
547 ti,timer-pwm;
548 };
550 timer6: timer@48048000 {
551 compatible = "ti,am335x-timer";
552 reg = <0x48048000 0x400>;
553 interrupts = <94>;
554 ti,hwmods = "timer6";
555 ti,timer-pwm;
556 };
558 timer7: timer@4804a000 {
559 compatible = "ti,am335x-timer";
560 reg = <0x4804a000 0x400>;
561 interrupts = <95>;
562 ti,hwmods = "timer7";
563 ti,timer-pwm;
564 };
566 rtc: rtc@44e3e000 {
567 compatible = "ti,am3352-rtc", "ti,da830-rtc";
568 reg = <0x44e3e000 0x1000>;
569 interrupts = <75
570 76>;
571 ti,hwmods = "rtc";
572 clocks = <&clkdiv32k_ick>;
573 clock-names = "int-clk";
574 };
576 spi0: spi@48030000 {
577 compatible = "ti,omap4-mcspi";
578 #address-cells = <1>;
579 #size-cells = <0>;
580 reg = <0x48030000 0x400>;
581 interrupts = <65>;
582 ti,spi-num-cs = <2>;
583 ti,hwmods = "spi0";
584 dmas = <&edma 16 0
585 &edma 17 0
586 &edma 18 0
587 &edma 19 0>;
588 dma-names = "tx0", "rx0", "tx1", "rx1";
589 status = "disabled";
590 };
592 spi1: spi@481a0000 {
593 compatible = "ti,omap4-mcspi";
594 #address-cells = <1>;
595 #size-cells = <0>;
596 reg = <0x481a0000 0x400>;
597 interrupts = <125>;
598 ti,spi-num-cs = <2>;
599 ti,hwmods = "spi1";
600 dmas = <&edma 42 0
601 &edma 43 0
602 &edma 44 0
603 &edma 45 0>;
604 dma-names = "tx0", "rx0", "tx1", "rx1";
605 status = "disabled";
606 };
608 usb: usb@47400000 {
609 compatible = "ti,am33xx-usb";
610 reg = <0x47400000 0x1000>;
611 ranges;
612 #address-cells = <1>;
613 #size-cells = <1>;
614 ti,hwmods = "usb_otg_hs";
615 status = "disabled";
617 usb_ctrl_mod: control@44e10620 {
618 compatible = "ti,am335x-usb-ctrl-module";
619 reg = <0x44e10620 0x10
620 0x44e10648 0x4>;
621 reg-names = "phy_ctrl", "wakeup";
622 status = "disabled";
623 };
625 usb0_phy: usb-phy@47401300 {
626 compatible = "ti,am335x-usb-phy";
627 reg = <0x47401300 0x100>;
628 reg-names = "phy";
629 status = "disabled";
630 ti,ctrl_mod = <&usb_ctrl_mod>;
631 };
633 usb0: usb@47401000 {
634 compatible = "ti,musb-am33xx";
635 status = "disabled";
636 reg = <0x47401400 0x400
637 0x47401000 0x200>;
638 reg-names = "mc", "control";
640 interrupts = <18>;
641 interrupt-names = "mc";
642 dr_mode = "otg";
643 mentor,multipoint = <1>;
644 mentor,num-eps = <16>;
645 mentor,ram-bits = <12>;
646 mentor,power = <500>;
647 phys = <&usb0_phy>;
649 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
650 &cppi41dma 2 0 &cppi41dma 3 0
651 &cppi41dma 4 0 &cppi41dma 5 0
652 &cppi41dma 6 0 &cppi41dma 7 0
653 &cppi41dma 8 0 &cppi41dma 9 0
654 &cppi41dma 10 0 &cppi41dma 11 0
655 &cppi41dma 12 0 &cppi41dma 13 0
656 &cppi41dma 14 0 &cppi41dma 0 1
657 &cppi41dma 1 1 &cppi41dma 2 1
658 &cppi41dma 3 1 &cppi41dma 4 1
659 &cppi41dma 5 1 &cppi41dma 6 1
660 &cppi41dma 7 1 &cppi41dma 8 1
661 &cppi41dma 9 1 &cppi41dma 10 1
662 &cppi41dma 11 1 &cppi41dma 12 1
663 &cppi41dma 13 1 &cppi41dma 14 1>;
664 dma-names =
665 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
666 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
667 "rx14", "rx15",
668 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
669 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
670 "tx14", "tx15";
671 };
673 usb1_phy: usb-phy@47401b00 {
674 compatible = "ti,am335x-usb-phy";
675 reg = <0x47401b00 0x100>;
676 reg-names = "phy";
677 status = "disabled";
678 ti,ctrl_mod = <&usb_ctrl_mod>;
679 };
681 usb1: usb@47401800 {
682 compatible = "ti,musb-am33xx";
683 status = "disabled";
684 reg = <0x47401c00 0x400
685 0x47401800 0x200>;
686 reg-names = "mc", "control";
687 interrupts = <19>;
688 interrupt-names = "mc";
689 dr_mode = "otg";
690 mentor,multipoint = <1>;
691 mentor,num-eps = <16>;
692 mentor,ram-bits = <12>;
693 mentor,power = <500>;
694 phys = <&usb1_phy>;
696 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
697 &cppi41dma 17 0 &cppi41dma 18 0
698 &cppi41dma 19 0 &cppi41dma 20 0
699 &cppi41dma 21 0 &cppi41dma 22 0
700 &cppi41dma 23 0 &cppi41dma 24 0
701 &cppi41dma 25 0 &cppi41dma 26 0
702 &cppi41dma 27 0 &cppi41dma 28 0
703 &cppi41dma 29 0 &cppi41dma 15 1
704 &cppi41dma 16 1 &cppi41dma 17 1
705 &cppi41dma 18 1 &cppi41dma 19 1
706 &cppi41dma 20 1 &cppi41dma 21 1
707 &cppi41dma 22 1 &cppi41dma 23 1
708 &cppi41dma 24 1 &cppi41dma 25 1
709 &cppi41dma 26 1 &cppi41dma 27 1
710 &cppi41dma 28 1 &cppi41dma 29 1>;
711 dma-names =
712 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
713 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
714 "rx14", "rx15",
715 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
716 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
717 "tx14", "tx15";
718 };
720 cppi41dma: dma-controller@47402000 {
721 compatible = "ti,am3359-cppi41";
722 reg = <0x47400000 0x1000
723 0x47402000 0x1000
724 0x47403000 0x1000
725 0x47404000 0x4000>;
726 reg-names = "glue", "controller", "scheduler", "queuemgr";
727 interrupts = <17>;
728 interrupt-names = "glue";
729 #dma-cells = <2>;
730 #dma-channels = <30>;
731 #dma-requests = <256>;
732 status = "disabled";
733 };
734 };
736 epwmss0: epwmss@48300000 {
737 compatible = "ti,am33xx-pwmss";
738 reg = <0x48300000 0x10>;
739 ti,hwmods = "epwmss0";
740 #address-cells = <1>;
741 #size-cells = <1>;
742 status = "disabled";
743 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
744 0x48300180 0x48300180 0x80 /* EQEP */
745 0x48300200 0x48300200 0x80>; /* EHRPWM */
747 ecap0: ecap@48300100 {
748 compatible = "ti,am3352-ecap",
749 "ti,am33xx-ecap";
750 #pwm-cells = <3>;
751 reg = <0x48300100 0x80>;
752 clocks = <&l4ls_gclk>;
753 clock-names = "fck";
754 interrupts = <31>;
755 interrupt-names = "ecap0";
756 status = "disabled";
757 };
759 ehrpwm0: pwm@48300200 {
760 compatible = "ti,am3352-ehrpwm",
761 "ti,am33xx-ehrpwm";
762 #pwm-cells = <3>;
763 reg = <0x48300200 0x80>;
764 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
765 clock-names = "tbclk", "fck";
766 status = "disabled";
767 };
768 };
770 epwmss1: epwmss@48302000 {
771 compatible = "ti,am33xx-pwmss";
772 reg = <0x48302000 0x10>;
773 ti,hwmods = "epwmss1";
774 #address-cells = <1>;
775 #size-cells = <1>;
776 status = "disabled";
777 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
778 0x48302180 0x48302180 0x80 /* EQEP */
779 0x48302200 0x48302200 0x80>; /* EHRPWM */
781 ecap1: ecap@48302100 {
782 compatible = "ti,am3352-ecap",
783 "ti,am33xx-ecap";
784 #pwm-cells = <3>;
785 reg = <0x48302100 0x80>;
786 clocks = <&l4ls_gclk>;
787 clock-names = "fck";
788 interrupts = <47>;
789 interrupt-names = "ecap1";
790 status = "disabled";
791 };
793 ehrpwm1: pwm@48302200 {
794 compatible = "ti,am3352-ehrpwm",
795 "ti,am33xx-ehrpwm";
796 #pwm-cells = <3>;
797 reg = <0x48302200 0x80>;
798 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
799 clock-names = "tbclk", "fck";
800 status = "disabled";
801 };
802 };
804 epwmss2: epwmss@48304000 {
805 compatible = "ti,am33xx-pwmss";
806 reg = <0x48304000 0x10>;
807 ti,hwmods = "epwmss2";
808 #address-cells = <1>;
809 #size-cells = <1>;
810 status = "disabled";
811 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
812 0x48304180 0x48304180 0x80 /* EQEP */
813 0x48304200 0x48304200 0x80>; /* EHRPWM */
815 ecap2: ecap@48304100 {
816 compatible = "ti,am3352-ecap",
817 "ti,am33xx-ecap";
818 #pwm-cells = <3>;
819 reg = <0x48304100 0x80>;
820 clocks = <&l4ls_gclk>;
821 clock-names = "fck";
822 interrupts = <61>;
823 interrupt-names = "ecap2";
824 status = "disabled";
825 };
827 ehrpwm2: pwm@48304200 {
828 compatible = "ti,am3352-ehrpwm",
829 "ti,am33xx-ehrpwm";
830 #pwm-cells = <3>;
831 reg = <0x48304200 0x80>;
832 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
833 clock-names = "tbclk", "fck";
834 status = "disabled";
835 };
836 };
838 mac: ethernet@4a100000 {
839 compatible = "ti,am335x-cpsw","ti,cpsw";
840 ti,hwmods = "cpgmac0";
841 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
842 clock-names = "fck", "cpts";
843 cpdma_channels = <8>;
844 ale_entries = <1024>;
845 bd_ram_size = <0x2000>;
846 mac_control = <0x20>;
847 slaves = <2>;
848 active_slave = <0>;
849 cpts_clock_mult = <0x80000000>;
850 cpts_clock_shift = <29>;
851 reg = <0x4a100000 0x800
852 0x4a101200 0x100>;
853 #address-cells = <1>;
854 #size-cells = <1>;
855 /*
856 * c0_rx_thresh_pend
857 * c0_rx_pend
858 * c0_tx_pend
859 * c0_misc_pend
860 */
861 interrupts = <40 41 42 43>;
862 ranges;
863 syscon = <&scm_conf>;
864 status = "disabled";
866 davinci_mdio: mdio@4a101000 {
867 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
868 #address-cells = <1>;
869 #size-cells = <0>;
870 ti,hwmods = "davinci_mdio";
871 bus_freq = <1000000>;
872 reg = <0x4a101000 0x100>;
873 status = "disabled";
874 };
876 cpsw_emac0: slave@4a100200 {
877 /* Filled in by U-Boot */
878 mac-address = [ 00 00 00 00 00 00 ];
879 };
881 cpsw_emac1: slave@4a100300 {
882 /* Filled in by U-Boot */
883 mac-address = [ 00 00 00 00 00 00 ];
884 };
886 phy_sel: cpsw-phy-sel@44e10650 {
887 compatible = "ti,am3352-cpsw-phy-sel";
888 reg= <0x44e10650 0x4>;
889 reg-names = "gmii-sel";
890 };
891 };
893 ocmcram: ocmcram@40300000 {
894 compatible = "mmio-sram";
895 reg = <0x40300000 0x10000>; /* 64k */
896 };
898 elm: elm@48080000 {
899 compatible = "ti,am3352-elm";
900 reg = <0x48080000 0x2000>;
901 interrupts = <4>;
902 ti,hwmods = "elm";
903 status = "disabled";
904 };
906 lcdc: lcdc@4830e000 {
907 compatible = "ti,am33xx-tilcdc";
908 reg = <0x4830e000 0x1000>;
909 interrupts = <36>;
910 ti,hwmods = "lcdc";
911 status = "disabled";
912 };
914 tscadc: tscadc@44e0d000 {
915 compatible = "ti,am3359-tscadc";
916 reg = <0x44e0d000 0x1000>;
917 interrupts = <16>;
918 ti,hwmods = "adc_tsc";
919 status = "disabled";
920 dmas = <&edma 53 0>, <&edma 57 0>;
921 dma-names = "fifo0", "fifo1";
923 tsc {
924 compatible = "ti,am3359-tsc";
925 };
926 am335x_adc: adc {
927 #io-channel-cells = <1>;
928 compatible = "ti,am3359-adc";
929 };
930 };
932 gpmc: gpmc@50000000 {
933 compatible = "ti,am3352-gpmc";
934 ti,hwmods = "gpmc";
935 ti,no-idle-on-init;
936 reg = <0x50000000 0x2000>;
937 interrupts = <100>;
938 dmas = <&edma 52 0>;
939 dma-names = "rxtx";
940 gpmc,num-cs = <7>;
941 gpmc,num-waitpins = <2>;
942 #address-cells = <2>;
943 #size-cells = <1>;
944 interrupt-controller;
945 #interrupt-cells = <2>;
946 gpio-controller;
947 #gpio-cells = <2>;
948 status = "disabled";
949 };
951 sham: sham@53100000 {
952 compatible = "ti,omap4-sham";
953 ti,hwmods = "sham";
954 reg = <0x53100000 0x200>;
955 interrupts = <109>;
956 dmas = <&edma 36 0>;
957 dma-names = "rx";
958 };
960 aes: aes@53500000 {
961 compatible = "ti,omap4-aes";
962 ti,hwmods = "aes";
963 reg = <0x53500000 0xa0>;
964 interrupts = <103>;
965 dmas = <&edma 6 0>,
966 <&edma 5 0>;
967 dma-names = "tx", "rx";
968 };
970 mcasp0: mcasp@48038000 {
971 compatible = "ti,am33xx-mcasp-audio";
972 ti,hwmods = "mcasp0";
973 reg = <0x48038000 0x2000>,
974 <0x46000000 0x400000>;
975 reg-names = "mpu", "dat";
976 interrupts = <80>, <81>;
977 interrupt-names = "tx", "rx";
978 status = "disabled";
979 dmas = <&edma 8 2>,
980 <&edma 9 2>;
981 dma-names = "tx", "rx";
982 };
984 mcasp1: mcasp@4803C000 {
985 compatible = "ti,am33xx-mcasp-audio";
986 ti,hwmods = "mcasp1";
987 reg = <0x4803C000 0x2000>,
988 <0x46400000 0x400000>;
989 reg-names = "mpu", "dat";
990 interrupts = <82>, <83>;
991 interrupt-names = "tx", "rx";
992 status = "disabled";
993 dmas = <&edma 10 2>,
994 <&edma 11 2>;
995 dma-names = "tx", "rx";
996 };
998 rng: rng@48310000 {
999 compatible = "ti,omap4-rng";
1000 ti,hwmods = "rng";
1001 reg = <0x48310000 0x2000>;
1002 interrupts = <111>;
1003 };
1004 };
1005 };
1007 /include/ "am33xx-clocks.dtsi"