arch/arm/boot/dts/imx6q-utilite-pro.dts

   1 /*
   2  * Copyright 2013 CompuLab Ltd.
   3  * Copyright 2016 Christopher Spinrath
   4  *
   5  * Based on the devicetree distributed with the vendor kernel for the
   6  * Utilite Pro:
   7  *      Copyright 2013 CompuLab Ltd.
   8  *      Author: Valentin Raevsky <valentin@compulab.co.il>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This file is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This file is distributed in the hope that it will be useful,
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively,
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use,
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include <dt-bindings/input/input.h>
  50 #include "imx6q-cm-fx6.dts"
  51
  52 / {
  53         model = "CompuLab Utilite Pro";
  54         compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
  55
  56         aliases {
  57                 ethernet1 = &eth1;
  58                 rtc0 = &em3027;
  59                 rtc1 = &snvs_rtc;
  60         };
  61
  62         encoder {
  63                 compatible = "ti,tfp410";
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66
  67                 ports {
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70
  71                         port@0 {
  72                                 reg = <0>;
  73
  74                                 tfp410_in: endpoint {
  75                                         remote-endpoint = <&parallel_display_out>;
  76                                 };
  77                         };
  78
  79                         port@1 {
  80                                 reg = <1>;
  81
  82                                 tfp410_out: endpoint {
  83                                         remote-endpoint = <&hdmi_connector_in>;
  84                                 };
  85                         };
  86                 };
  87         };
  88
  89         gpio-keys {
  90                 compatible = "gpio-keys";
  91                 pinctrl-names = "default";
  92                 pinctrl-0 = <&pinctrl_gpio_keys>;
  93
  94                 power {
  95                         label = "Power Button";
  96                         gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_POWER>;
  98                         wakeup-source;
  99                 };
 100         };
 101
 102         hdmi-connector {
 103                 compatible = "hdmi-connector";
 104                 pinctrl-names = "default";
 105                 pinctrl-0 = <&pinctrl_hpd>;
 106                 type = "a";
 107                 ddc-i2c-bus = <&i2c_dvi_ddc>;
 108                 hpd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 109
 110                 port {
 111                         hdmi_connector_in: endpoint {
 112                                 remote-endpoint = <&tfp410_out>;
 113                         };
 114                 };
 115         };
 116
 117         i2cmux {
 118                 compatible = "i2c-mux-gpio";
 119                 pinctrl-names = "default";
 120                 pinctrl-0 = <&pinctrl_i2c1mux>;
 121                 #address-cells = <1>;
 122                 #size-cells = <0>;
 123
 124                 mux-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 125                 i2c-parent = <&i2c1>;
 126
 127                 i2c@0 {
 128                         reg = <0>;
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131
 132                         eeprom@50 {
 133                                 compatible = "atmel,24c02";
 134                                 reg = <0x50>;
 135                                 pagesize = <16>;
 136                         };
 137
 138                         em3027: rtc@56 {
 139                                 compatible = "emmicro,em3027";
 140                                 reg = <0x56>;
 141                         };
 142                 };
 143
 144                 i2c_dvi_ddc: i2c@1 {
 145                         reg = <1>;
 146                         #address-cells = <1>;
 147                         #size-cells = <0>;
 148                 };
 149         };
 150
 151         parallel-display {
 152                 compatible = "fsl,imx-parallel-display";
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 pinctrl-names = "default";
 156                 pinctrl-0 = <&pinctrl_ipu1>;
 157
 158                 interface-pix-fmt = "rgb24";
 159
 160                 port@0 {
 161                         reg = <0>;
 162
 163                         parallel_display_in: endpoint {
 164                                 remote-endpoint = <&ipu1_di0_disp0>;
 165                         };
 166                 };
 167
 168                 port@1 {
 169                         reg = <1>;
 170
 171                         parallel_display_out: endpoint {
 172                                 remote-endpoint = <&tfp410_in>;
 173                         };
 174                 };
 175         };
 176 };
 177
 178 /*
 179  * A single IPU is not able to drive both display interfaces available on the
 180  * Utilite Pro at high resolution due to its bandwidth limitation. Since the
 181  * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the
 182  * SoC-internal Designware HDMI encoder forcing the latter to be connected to
 183  * IPU2 instead of IPU1.
 184  */
 185 /delete-node/&ipu1_di0_hdmi;
 186 /delete-node/&hdmi_mux_0;
 187 /delete-node/&ipu1_di1_hdmi;
 188 /delete-node/&hdmi_mux_1;
 189
 190 &hdmi {
 191         ddc-i2c-bus = <&i2c2>;
 192         status = "okay";
 193 };
 194
 195 &i2c1 {
 196         pinctrl-names = "default";
 197         pinctrl-0 = <&pinctrl_i2c1>;
 198         status = "okay";
 199 };
 200
 201 &i2c2 {
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&pinctrl_i2c2>;
 204         status = "okay";
 205 };
 206
 207 &iomuxc {
 208         pinctrl_gpio_keys: gpio_keysgrp {
 209                 fsl,pins = <
 210                         MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
 211                 >;
 212         };
 213
 214         pinctrl_hpd: hpdgrp {
 215                 fsl,pins = <
 216                         MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
 217                 >;
 218         };
 219
 220         pinctrl_i2c1: i2c1grp {
 221                 fsl,pins = <
 222                         MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
 223                         MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
 224                 >;
 225         };
 226
 227         pinctrl_i2c1mux: i2c1muxgrp {
 228                 fsl,pins = <
 229                         MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
 230                 >;
 231         };
 232
 233         pinctrl_i2c2: i2c2grp {
 234                 fsl,pins = <
 235                         MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
 236                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
 237                 >;
 238         };
 239
 240         pinctrl_ipu1: ipu1grp {
 241                 fsl,pins = <
 242                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
 243                         MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x38
 244                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x38
 245                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x38
 246                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x38
 247                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x38
 248                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x38
 249                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x38
 250                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x38
 251                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x38
 252                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x38
 253                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x38
 254                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x38
 255                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x38
 256                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x38
 257                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x38
 258                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x38
 259                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x38
 260                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x38
 261                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x38
 262                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x38
 263                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x38
 264                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x38
 265                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x38
 266                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x38
 267                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x38
 268                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x38
 269                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x38
 270                 >;
 271         };
 272
 273         pinctrl_uart2: uart2grp {
 274                 fsl,pins = <
 275                         MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
 276                         MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
 277                         MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
 278                         MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
 279                 >;
 280         };
 281
 282         pinctrl_usdhc3: usdhc3grp {
 283                 fsl,pins = <
 284                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 285                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 286                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 287                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 288                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 289                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 290                 >;
 291         };
 292
 293         pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
 294                 fsl,pins = <
 295                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x170B9
 296                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x100B9
 297                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x170B9
 298                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x170B9
 299                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x170B9
 300                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x170B9
 301                 >;
 302         };
 303
 304         pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
 305                 fsl,pins = <
 306                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x170F9
 307                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x100F9
 308                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x170F9
 309                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x170F9
 310                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x170F9
 311                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x170F9
 312                 >;
 313         };
 314 };
 315
 316 &ipu1_di0_disp0 {
 317         remote-endpoint = <&parallel_display_in>;
 318 };
 319
 320 &pcie {
 321         pcie@0,0 {
 322                 reg = <0x000000 0 0 0 0>;
 323                 #address-cells = <3>;
 324                 #size-cells = <2>;
 325
 326                 /* non-removable i211 ethernet card */
 327                 eth1: intel,i211@pcie0,0 {
 328                         reg = <0x010000 0 0 0 0>;
 329                 };
 330         };
 331 };
 332
 333 &uart2 {
 334         pinctrl-names = "default";
 335         pinctrl-0 = <&pinctrl_uart2>;
 336         uart-has-rtscts;
 337         status = "okay";
 338 };
 339
 340 &usdhc3 {
 341         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 342         pinctrl-0 = <&pinctrl_usdhc3>;
 343         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 344         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 345         no-1-8-v;
 346         broken-cd;
 347         keep-power-in-suspend;
 348         status = "okay";
 349 };