2 * Device Tree Source for OMAP2 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
16 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
17 interrupt-parent = <&intc>;
35 compatible = "arm,arm1136jf-s";
41 compatible = "arm,arm1136-pmu";
46 compatible = "ti,omap-infra";
48 compatible = "ti,omap2-mpu";
54 compatible = "simple-bus";
58 ti,hwmods = "l3_main";
61 compatible = "ti,omap2-aes";
63 reg = <0x480a6000 0x50>;
64 dmas = <&sdma 9 &sdma 10>;
65 dma-names = "tx", "rx";
69 compatible = "ti,omap2420-1w";
71 reg = <0x480b2000 0x1000>;
75 intc: interrupt-controller@1 {
76 compatible = "ti,omap2-intc";
78 #interrupt-cells = <1>;
79 reg = <0x480FE000 0x1000>;
82 sdma: dma-controller@48056000 {
83 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
85 reg = <0x48056000 0x1000>;
96 compatible = "ti,omap2-i2c";
98 reg = <0x48070000 0x80>;
102 dmas = <&sdma 27 &sdma 28>;
103 dma-names = "tx", "rx";
107 compatible = "ti,omap2-i2c";
109 reg = <0x48072000 0x80>;
110 #address-cells = <1>;
113 dmas = <&sdma 29 &sdma 30>;
114 dma-names = "tx", "rx";
117 mcspi1: mcspi@48098000 {
118 compatible = "ti,omap2-mcspi";
119 ti,hwmods = "mcspi1";
120 reg = <0x48098000 0x100>;
122 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
123 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
124 dma-names = "tx0", "rx0", "tx1", "rx1",
125 "tx2", "rx2", "tx3", "rx3";
128 mcspi2: mcspi@4809a000 {
129 compatible = "ti,omap2-mcspi";
130 ti,hwmods = "mcspi2";
131 reg = <0x4809a000 0x100>;
133 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
134 dma-names = "tx0", "rx0", "tx1", "rx1";
138 compatible = "ti,omap2-rng";
140 reg = <0x480a0000 0x50>;
144 sham: sham@480a4000 {
145 compatible = "ti,omap2-sham";
147 reg = <0x480a4000 0x64>;
153 uart1: serial@4806a000 {
154 compatible = "ti,omap2-uart";
156 reg = <0x4806a000 0x2000>;
158 dmas = <&sdma 49 &sdma 50>;
159 dma-names = "tx", "rx";
160 clock-frequency = <48000000>;
163 uart2: serial@4806c000 {
164 compatible = "ti,omap2-uart";
166 reg = <0x4806c000 0x400>;
168 dmas = <&sdma 51 &sdma 52>;
169 dma-names = "tx", "rx";
170 clock-frequency = <48000000>;
173 uart3: serial@4806e000 {
174 compatible = "ti,omap2-uart";
176 reg = <0x4806e000 0x400>;
178 dmas = <&sdma 53 &sdma 54>;
179 dma-names = "tx", "rx";
180 clock-frequency = <48000000>;
183 timer2: timer@4802a000 {
184 compatible = "ti,omap2420-timer";
185 reg = <0x4802a000 0x400>;
187 ti,hwmods = "timer2";
190 timer3: timer@48078000 {
191 compatible = "ti,omap2420-timer";
192 reg = <0x48078000 0x400>;
194 ti,hwmods = "timer3";
197 timer4: timer@4807a000 {
198 compatible = "ti,omap2420-timer";
199 reg = <0x4807a000 0x400>;
201 ti,hwmods = "timer4";
204 timer5: timer@4807c000 {
205 compatible = "ti,omap2420-timer";
206 reg = <0x4807c000 0x400>;
208 ti,hwmods = "timer5";
212 timer6: timer@4807e000 {
213 compatible = "ti,omap2420-timer";
214 reg = <0x4807e000 0x400>;
216 ti,hwmods = "timer6";
220 timer7: timer@48080000 {
221 compatible = "ti,omap2420-timer";
222 reg = <0x48080000 0x400>;
224 ti,hwmods = "timer7";
228 timer8: timer@48082000 {
229 compatible = "ti,omap2420-timer";
230 reg = <0x48082000 0x400>;
232 ti,hwmods = "timer8";
236 timer9: timer@48084000 {
237 compatible = "ti,omap2420-timer";
238 reg = <0x48084000 0x400>;
240 ti,hwmods = "timer9";
244 timer10: timer@48086000 {
245 compatible = "ti,omap2420-timer";
246 reg = <0x48086000 0x400>;
248 ti,hwmods = "timer10";
252 timer11: timer@48088000 {
253 compatible = "ti,omap2420-timer";
254 reg = <0x48088000 0x400>;
256 ti,hwmods = "timer11";
260 timer12: timer@4808a000 {
261 compatible = "ti,omap2420-timer";
262 reg = <0x4808a000 0x400>;
264 ti,hwmods = "timer12";
269 compatible = "ti,omap2-dss";
270 reg = <0x48050000 0x400>;
272 ti,hwmods = "dss_core";
273 #address-cells = <1>;
278 compatible = "ti,omap2-dispc";
279 reg = <0x48050400 0x400>;
281 ti,hwmods = "dss_dispc";
284 rfbi: encoder@48050800 {
285 compatible = "ti,omap2-rfbi";
286 reg = <0x48050800 0x400>;
288 ti,hwmods = "dss_rfbi";
291 venc: encoder@48050c00 {
292 compatible = "ti,omap2-venc";
293 reg = <0x48050c00 0x400>;
295 ti,hwmods = "dss_venc";