arch/arm/boot/dts/omap3-cm-t3x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Common support for CompuLab CM-T3x CoMs
   4  */
   5
   6 / {
   7
   8         memory@80000000 {
   9                 device_type = "memory";
  10                 reg = <0x80000000 0x10000000>; /* 256 MB */
  11         };
  12
  13         leds {
  14                 compatible = "gpio-leds";
  15                 pinctrl-names = "default";
  16                 pinctrl-0 = <&green_led_pins>;
  17                 ledb {
  18                         label = "cm-t3x:green";
  19                         gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>;  /* gpio186 */
  20                         linux,default-trigger = "heartbeat";
  21                 };
  22         };
  23
  24         /* HS USB Port 1 Power */
  25         hsusb1_power: hsusb1_power_reg {
  26                 compatible = "regulator-fixed";
  27                 regulator-name = "hsusb1_vbus";
  28                 regulator-min-microvolt = <3300000>;
  29                 regulator-max-microvolt = <3300000>;
  30                 startup-delay-us = <70000>;
  31         };
  32
  33         /* HS USB Port 2 Power */
  34         hsusb2_power: hsusb2_power_reg {
  35                 compatible = "regulator-fixed";
  36                 regulator-name = "hsusb2_vbus";
  37                 regulator-min-microvolt = <3300000>;
  38                 regulator-max-microvolt = <3300000>;
  39                 startup-delay-us = <70000>;
  40         };
  41
  42         /* HS USB Host PHY on PORT 1 */
  43         hsusb1_phy: hsusb1_phy {
  44                 compatible = "usb-nop-xceiv";
  45                 vcc-supply = <&hsusb1_power>;
  46         };
  47
  48         /* HS USB Host PHY on PORT 2 */
  49         hsusb2_phy: hsusb2_phy {
  50                 compatible = "usb-nop-xceiv";
  51                 vcc-supply = <&hsusb2_power>;
  52         };
  53
  54         ads7846reg: ads7846-reg {
  55                 compatible = "regulator-fixed";
  56                 regulator-name = "ads7846-reg";
  57                 regulator-min-microvolt = <3300000>;
  58                 regulator-max-microvolt = <3300000>;
  59         };
  60
  61         tv0: connector {
  62                 compatible = "svideo-connector";
  63                 label = "tv";
  64
  65                 port {
  66                         tv_connector_in: endpoint {
  67                                 remote-endpoint = <&venc_out>;
  68                         };
  69                 };
  70         };
  71 };
  72
  73 &omap3_pmx_core {
  74
  75         uart3_pins: pinmux_uart3_pins {
  76                 pinctrl-single,pins = <
  77                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT  | MUX_MODE0)       /* uart3_rx_irrx.uart3_rx_irrx */
  78                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx.uart3_tx_irtx */
  79                 >;
  80         };
  81
  82         mmc1_pins: pinmux_mmc1_pins {
  83                 pinctrl-single,pins = <
  84                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  85                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  86                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  87                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  88                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  89                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  90                 >;
  91         };
  92
  93         green_led_pins: pinmux_green_led_pins {
  94                 pinctrl-single,pins = <
  95                         OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4)       /* sys_clkout2.gpio_186 */
  96                 >;
  97         };
  98
  99         dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
 100                 pinctrl-single,pins = <
 101                         OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)       /* dss_pclk.dss_pclk */
 102                         OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)       /* dss_hsync.dss_hsync */
 103                         OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)       /* dss_vsync.dss_vsync */
 104                         OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)       /* dss_acbias.dss_acbias */
 105
 106                         OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)       /* dss_data6.dss_data6 */
 107                         OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)       /* dss_data7.dss_data7 */
 108                         OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)       /* dss_data8.dss_data8 */
 109                         OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)       /* dss_data9.dss_data9 */
 110                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)       /* dss_data10.dss_data10 */
 111                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)       /* dss_data11.dss_data11 */
 112                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)       /* dss_data12.dss_data12 */
 113                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)       /* dss_data13.dss_data13 */
 114                         OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)       /* dss_data14.dss_data14 */
 115                         OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)       /* dss_data15.dss_data15 */
 116                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)       /* dss_data16.dss_data16 */
 117                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)       /* dss_data17.dss_data17 */
 118                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)       /* dss_data18.dss_data18 */
 119                         OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)       /* dss_data19.dss_data19 */
 120                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)       /* dss_data20.dss_data20 */
 121                         OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)       /* dss_data21.dss_data21 */
 122                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)       /* dss_data22.dss_data22 */
 123                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)       /* dss_data23.dss_data23 */
 124                 >;
 125         };
 126
 127         dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
 128                 pinctrl-single,pins = <
 129                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)       /* dss_data0.dss_data0 */
 130                         OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)       /* dss_data1.dss_data1 */
 131                         OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)       /* dss_data2.dss_data2 */
 132                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)       /* dss_data3.dss_data3 */
 133                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)       /* dss_data4.dss_data4 */
 134                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)       /* dss_data5.dss_data5 */
 135                 >;
 136         };
 137
 138         ads7846_pins: pinmux_ads7846_pins {
 139                 pinctrl-single,pins = <
 140                         OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
 141                 >;
 142         };
 143
 144         mcspi1_pins: pinmux_mcspi1_pins {
 145                 pinctrl-single,pins = <
 146                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk */
 147                         OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)        /* mcspi1_simo */
 148                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)        /* mcspi1_somi */
 149                         OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
 150                 >;
 151         };
 152
 153         i2c1_pins: pinmux_i2c1_pins {
 154                 pinctrl-single,pins = <
 155                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
 156                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
 157                 >;
 158         };
 159
 160         mcbsp2_pins: pinmux_mcbsp2_pins {
 161                 pinctrl-single,pins = <
 162                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
 163                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
 164                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
 165                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
 166                 >;
 167         };
 168 };
 169
 170 &uart3 {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&uart3_pins>;
 173 };
 174
 175 &mmc1 {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&mmc1_pins>;
 178         bus-width = <4>;
 179 };
 180
 181 &mmc3 {
 182         status = "disabled";
 183 };
 184
 185 &i2c1 {
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&i2c1_pins>;
 188
 189         clock-frequency = <400000>;
 190
 191         at24@50 {
 192                 compatible = "atmel,24c02";
 193                 pagesize = <16>;
 194                 reg = <0x50>;
 195         };
 196 };
 197
 198 &i2c3 {
 199         clock-frequency = <400000>;
 200 };
 201
 202 &usbhshost {
 203         port1-mode = "ehci-phy";
 204         port2-mode = "ehci-phy";
 205 };
 206
 207 &usbhsehci {
 208         phys = <&hsusb1_phy &hsusb2_phy>;
 209 };
 210
 211 &mcspi1 {
 212         pinctrl-names = "default";
 213         pinctrl-0 = <&mcspi1_pins>;
 214
 215         /* touch controller */
 216         ads7846@0 {
 217                 pinctrl-names = "default";
 218                 pinctrl-0 = <&ads7846_pins>;
 219
 220                 compatible = "ti,ads7846";
 221                 vcc-supply = <&ads7846reg>;
 222
 223                 reg = <0>;                      /* CS0 */
 224                 spi-max-frequency = <1500000>;
 225
 226                 interrupt-parent = <&gpio2>;
 227                 interrupts = <25 0>;            /* gpio_57 */
 228                 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
 229
 230                 ti,x-min = /bits/ 16 <0x0>;
 231                 ti,x-max = /bits/ 16 <0x0fff>;
 232                 ti,y-min = /bits/ 16 <0x0>;
 233                 ti,y-max = /bits/ 16 <0x0fff>;
 234
 235                 ti,x-plate-ohms = /bits/ 16 <180>;
 236                 ti,pressure-max = /bits/ 16 <255>;
 237
 238                 ti,debounce-max = /bits/ 16 <30>;
 239                 ti,debounce-tol = /bits/ 16 <10>;
 240                 ti,debounce-rep = /bits/ 16 <1>;
 241
 242                 wakeup-source;
 243         };
 244 };
 245
 246 &venc {
 247         status = "ok";
 248
 249         port {
 250                 venc_out: endpoint {
 251                         remote-endpoint = <&tv_connector_in>;
 252                         ti,channels = <2>;
 253                 };
 254         };
 255 };
 256
 257 &mcbsp2 {
 258         status = "ok";
 259
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&mcbsp2_pins>;
 262 };
 263
 264 &gpmc {
 265         ranges = <0 0 0x30000000 0x01000000>;   /* CS0: 16MB for NAND */
 266
 267         nand@0,0 {
 268                 compatible = "ti,omap2-nand";
 269                 reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
 270                 interrupt-parent = <&gpmc>;
 271                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 272                              <1 IRQ_TYPE_NONE>; /* termcount */
 273                 nand-bus-width = <8>;
 274                 gpmc,device-width = <1>;
 275                 ti,nand-ecc-opt = "sw";
 276
 277                 gpmc,cs-on-ns = <0>;
 278                 gpmc,cs-rd-off-ns = <120>;
 279                 gpmc,cs-wr-off-ns = <120>;
 280
 281                 gpmc,adv-on-ns = <0>;
 282                 gpmc,adv-rd-off-ns = <120>;
 283                 gpmc,adv-wr-off-ns = <120>;
 284
 285                 gpmc,we-on-ns = <6>;
 286                 gpmc,we-off-ns = <90>;
 287
 288                 gpmc,oe-on-ns = <6>;
 289                 gpmc,oe-off-ns = <90>;
 290
 291                 gpmc,page-burst-access-ns = <6>;
 292                 gpmc,access-ns = <72>;
 293                 gpmc,cycle2cycle-delay-ns = <60>;
 294
 295                 gpmc,rd-cycle-ns = <120>;
 296                 gpmc,wr-cycle-ns = <120>;
 297                 gpmc,wr-access-ns = <186>;
 298                 gpmc,wr-data-mux-bus-ns = <90>;
 299
 300                 #address-cells = <1>;
 301                 #size-cells = <1>;
 302
 303                 partition@0 {
 304                         label = "xloader";
 305                         reg = <0 0x80000>;
 306                 };
 307                 partition@0x80000 {
 308                         label = "uboot";
 309                         reg = <0x80000 0x1e0000>;
 310                 };
 311                 partition@0x260000 {
 312                         label = "uboot environment";
 313                         reg = <0x260000 0x40000>;
 314                 };
 315                 partition@0x2a0000 {
 316                         label = "linux";
 317                         reg = <0x2a0000 0x400000>;
 318                 };
 319                 partition@0x6a0000 {
 320                         label = "rootfs";
 321                         reg = <0x6a0000 0x1f880000>;
 322                 };
 323         };
 324 };