2 * Device Tree Source for the Genmai board
4 * Copyright (C) 2013-14 Renesas Solutions Corp.
5 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 #include "r7s72100.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
19 compatible = "renesas,genmai", "renesas,r7s72100";
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
27 stdout-path = "serial0:115200n8";
31 device_type = "memory";
32 reg = <0x08000000 0x08000000>;
42 compatible = "gpio-leds";
45 gpios = <&port4 10 GPIO_ACTIVE_LOW>;
49 gpios = <&port4 11 GPIO_ACTIVE_LOW>;
57 /* P3_0 as TxD2; P3_2 as RxD2 */
58 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
62 /* RIIC2: P1_4 as SCL, P1_5 as SDA */
63 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
67 /* Ethernet on Ports 1,2,3,5 */
68 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
69 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
70 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
71 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
72 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
73 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
74 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
75 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
76 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
77 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
78 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
79 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
80 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
81 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
82 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
83 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
84 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
85 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
90 clock-frequency = <13330000>;
94 clock-frequency = <48000000>;
98 clock-frequency = <32768>;
106 pinctrl-names = "default";
107 pinctrl-0 = <ðer_pins>;
111 renesas,no-ether-link;
112 phy-handle = <&phy0>;
113 phy0: ethernet-phy@0 {
120 clock-frequency = <400000>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&i2c2_pins>;
126 compatible = "renesas,24c128", "atmel,24c128";
137 pinctrl-names = "default";
138 pinctrl-0 = <&scif2_pins>;
147 compatible = "wlf,wm8978";
149 spi-max-frequency = <5000000>;