mm: fix exec activate_mm vs TLB shootdown and lazy tlb switching race
[linux/fpc-iii.git] / arch / arm / lib / xor-neon.c
blobc691b901092f55a8f251c186a6938ba19d79f6ec
1 /*
2 * linux/arch/arm/lib/xor-neon.c
4 * Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #include <linux/raid/xor.h>
12 #include <linux/module.h>
14 MODULE_LICENSE("GPL");
16 #ifndef __ARM_NEON__
17 #error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon'
18 #endif
21 * Pull in the reference implementations while instructing GCC (through
22 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
23 * NEON instructions.
25 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
26 #pragma GCC optimize "tree-vectorize"
27 #else
29 * While older versions of GCC do not generate incorrect code, they fail to
30 * recognize the parallel nature of these functions, and emit plain ARM code,
31 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
33 #warning This code requires at least version 4.6 of GCC
34 #endif
36 #pragma GCC diagnostic ignored "-Wunused-variable"
37 #include <asm-generic/xor.h>
39 struct xor_block_template const xor_block_neon_inner = {
40 .name = "__inner_neon__",
41 .do_2 = xor_8regs_2,
42 .do_3 = xor_8regs_3,
43 .do_4 = xor_8regs_4,
44 .do_5 = xor_8regs_5,
46 EXPORT_SYMBOL(xor_block_neon_inner);