mm: fix exec activate_mm vs TLB shootdown and lazy tlb switching race
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-dm355-evm.c
blob8e64685b1941968e2d2dc7fd0e9a20e8c43bc04e
1 /*
2 * TI DaVinci EVM board support
4 * Author: Kevin Hilman, Deep Root Systems, LLC
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/err.h>
14 #include <linux/platform_device.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/mtd/rawnand.h>
18 #include <linux/i2c.h>
19 #include <linux/gpio.h>
20 #include <linux/clk.h>
21 #include <linux/dm9000.h>
22 #include <linux/videodev2.h>
23 #include <media/i2c/tvp514x.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/eeprom.h>
26 #include <linux/platform_data/gpio-davinci.h>
27 #include <linux/platform_data/i2c-davinci.h>
28 #include <linux/platform_data/mtd-davinci.h>
29 #include <linux/platform_data/mmc-davinci.h>
30 #include <linux/platform_data/usb-davinci.h>
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
35 #include <mach/serial.h>
36 #include <mach/common.h>
38 #include "davinci.h"
40 /* NOTE: this is geared for the standard config, with a socketed
41 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
42 * swap chips, maybe with a different block size, partitioning may
43 * need to be changed.
45 #define NAND_BLOCK_SIZE SZ_128K
47 static struct mtd_partition davinci_nand_partitions[] = {
49 /* UBL (a few copies) plus U-Boot */
50 .name = "bootloader",
51 .offset = 0,
52 .size = 15 * NAND_BLOCK_SIZE,
53 .mask_flags = MTD_WRITEABLE, /* force read-only */
54 }, {
55 /* U-Boot environment */
56 .name = "params",
57 .offset = MTDPART_OFS_APPEND,
58 .size = 1 * NAND_BLOCK_SIZE,
59 .mask_flags = 0,
60 }, {
61 .name = "kernel",
62 .offset = MTDPART_OFS_APPEND,
63 .size = SZ_4M,
64 .mask_flags = 0,
65 }, {
66 .name = "filesystem1",
67 .offset = MTDPART_OFS_APPEND,
68 .size = SZ_512M,
69 .mask_flags = 0,
70 }, {
71 .name = "filesystem2",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 .mask_flags = 0,
76 /* two blocks with bad block table (and mirror) at the end */
79 static struct davinci_nand_pdata davinci_nand_data = {
80 .mask_chipsel = BIT(14),
81 .parts = davinci_nand_partitions,
82 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
83 .ecc_mode = NAND_ECC_HW,
84 .bbt_options = NAND_BBT_USE_FLASH,
85 .ecc_bits = 4,
88 static struct resource davinci_nand_resources[] = {
90 .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
91 .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
92 .flags = IORESOURCE_MEM,
93 }, {
94 .start = DM355_ASYNC_EMIF_CONTROL_BASE,
95 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
96 .flags = IORESOURCE_MEM,
100 static struct platform_device davinci_nand_device = {
101 .name = "davinci_nand",
102 .id = 0,
104 .num_resources = ARRAY_SIZE(davinci_nand_resources),
105 .resource = davinci_nand_resources,
107 .dev = {
108 .platform_data = &davinci_nand_data,
112 static struct davinci_i2c_platform_data i2c_pdata = {
113 .bus_freq = 400 /* kHz */,
114 .bus_delay = 0 /* usec */,
115 .sda_pin = 15,
116 .scl_pin = 14,
119 static int dm355evm_mmc_gpios = -EINVAL;
121 static void dm355evm_mmcsd_gpios(unsigned gpio)
123 gpio_request(gpio + 0, "mmc0_ro");
124 gpio_request(gpio + 1, "mmc0_cd");
125 gpio_request(gpio + 2, "mmc1_ro");
126 gpio_request(gpio + 3, "mmc1_cd");
128 /* we "know" these are input-only so we don't
129 * need to call gpio_direction_input()
132 dm355evm_mmc_gpios = gpio;
135 static struct i2c_board_info dm355evm_i2c_info[] = {
136 { I2C_BOARD_INFO("dm355evm_msp", 0x25),
137 .platform_data = dm355evm_mmcsd_gpios,
139 /* { plus irq }, */
140 { I2C_BOARD_INFO("tlv320aic33", 0x1b), },
143 static void __init evm_init_i2c(void)
145 davinci_init_i2c(&i2c_pdata);
147 gpio_request(5, "dm355evm_msp");
148 gpio_direction_input(5);
149 dm355evm_i2c_info[0].irq = gpio_to_irq(5);
151 i2c_register_board_info(1, dm355evm_i2c_info,
152 ARRAY_SIZE(dm355evm_i2c_info));
155 static struct resource dm355evm_dm9000_rsrc[] = {
157 /* addr */
158 .start = 0x04014000,
159 .end = 0x04014001,
160 .flags = IORESOURCE_MEM,
161 }, {
162 /* data */
163 .start = 0x04014002,
164 .end = 0x04014003,
165 .flags = IORESOURCE_MEM,
166 }, {
167 .flags = IORESOURCE_IRQ
168 | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
172 static struct dm9000_plat_data dm335evm_dm9000_platdata;
174 static struct platform_device dm355evm_dm9000 = {
175 .name = "dm9000",
176 .id = -1,
177 .resource = dm355evm_dm9000_rsrc,
178 .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc),
179 .dev = {
180 .platform_data = &dm335evm_dm9000_platdata,
184 static struct tvp514x_platform_data tvp5146_pdata = {
185 .clk_polarity = 0,
186 .hs_polarity = 1,
187 .vs_polarity = 1
190 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
191 /* Inputs available at the TVP5146 */
192 static struct v4l2_input tvp5146_inputs[] = {
194 .index = 0,
195 .name = "Composite",
196 .type = V4L2_INPUT_TYPE_CAMERA,
197 .std = TVP514X_STD_ALL,
200 .index = 1,
201 .name = "S-Video",
202 .type = V4L2_INPUT_TYPE_CAMERA,
203 .std = TVP514X_STD_ALL,
208 * this is the route info for connecting each input to decoder
209 * ouput that goes to vpfe. There is a one to one correspondence
210 * with tvp5146_inputs
212 static struct vpfe_route tvp5146_routes[] = {
214 .input = INPUT_CVBS_VI2B,
215 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
218 .input = INPUT_SVIDEO_VI2C_VI1C,
219 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
223 static struct vpfe_subdev_info vpfe_sub_devs[] = {
225 .name = "tvp5146",
226 .grp_id = 0,
227 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
228 .inputs = tvp5146_inputs,
229 .routes = tvp5146_routes,
230 .can_route = 1,
231 .ccdc_if_params = {
232 .if_type = VPFE_BT656,
233 .hdpol = VPFE_PINPOL_POSITIVE,
234 .vdpol = VPFE_PINPOL_POSITIVE,
236 .board_info = {
237 I2C_BOARD_INFO("tvp5146", 0x5d),
238 .platform_data = &tvp5146_pdata,
243 static struct vpfe_config vpfe_cfg = {
244 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
245 .i2c_adapter_id = 1,
246 .sub_devs = vpfe_sub_devs,
247 .card_name = "DM355 EVM",
248 .ccdc = "DM355 CCDC",
251 /* venc standards timings */
252 static struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = {
254 .name = "ntsc",
255 .timings_type = VPBE_ENC_STD,
256 .std_id = V4L2_STD_NTSC,
257 .interlaced = 1,
258 .xres = 720,
259 .yres = 480,
260 .aspect = {11, 10},
261 .fps = {30000, 1001},
262 .left_margin = 0x79,
263 .upper_margin = 0x10,
266 .name = "pal",
267 .timings_type = VPBE_ENC_STD,
268 .std_id = V4L2_STD_PAL,
269 .interlaced = 1,
270 .xres = 720,
271 .yres = 576,
272 .aspect = {54, 59},
273 .fps = {25, 1},
274 .left_margin = 0x7E,
275 .upper_margin = 0x16
279 #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
282 * The outputs available from VPBE + ecnoders. Keep the
283 * the order same as that of encoders. First those from venc followed by that
284 * from encoders. Index in the output refers to index on a particular encoder.
285 * Driver uses this index to pass it to encoder when it supports more than
286 * one output. Application uses index of the array to set an output.
288 static struct vpbe_output dm355evm_vpbe_outputs[] = {
290 .output = {
291 .index = 0,
292 .name = "Composite",
293 .type = V4L2_OUTPUT_TYPE_ANALOG,
294 .std = VENC_STD_ALL,
295 .capabilities = V4L2_OUT_CAP_STD,
297 .subdev_name = DM355_VPBE_VENC_SUBDEV_NAME,
298 .default_mode = "ntsc",
299 .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing),
300 .modes = dm355evm_enc_preset_timing,
301 .if_params = MEDIA_BUS_FMT_FIXED,
305 static struct vpbe_config dm355evm_display_cfg = {
306 .module_name = "dm355-vpbe-display",
307 .i2c_adapter_id = 1,
308 .osd = {
309 .module_name = DM355_VPBE_OSD_SUBDEV_NAME,
311 .venc = {
312 .module_name = DM355_VPBE_VENC_SUBDEV_NAME,
314 .num_outputs = ARRAY_SIZE(dm355evm_vpbe_outputs),
315 .outputs = dm355evm_vpbe_outputs,
318 static struct platform_device *davinci_evm_devices[] __initdata = {
319 &dm355evm_dm9000,
320 &davinci_nand_device,
323 static void __init dm355_evm_map_io(void)
325 dm355_init();
328 static int dm355evm_mmc_get_cd(int module)
330 if (!gpio_is_valid(dm355evm_mmc_gpios))
331 return -ENXIO;
332 /* low == card present */
333 return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
336 static int dm355evm_mmc_get_ro(int module)
338 if (!gpio_is_valid(dm355evm_mmc_gpios))
339 return -ENXIO;
340 /* high == card's write protect switch active */
341 return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
344 static struct davinci_mmc_config dm355evm_mmc_config = {
345 .get_cd = dm355evm_mmc_get_cd,
346 .get_ro = dm355evm_mmc_get_ro,
347 .wires = 4,
348 .max_freq = 50000000,
349 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
352 /* Don't connect anything to J10 unless you're only using USB host
353 * mode *and* have to do so with some kind of gender-bender. If
354 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
355 * the ID pin won't need any help.
357 #define USB_ID_VALUE 1 /* ID pulled low */
359 static struct spi_eeprom at25640a = {
360 .byte_len = SZ_64K / 8,
361 .name = "at25640a",
362 .page_size = 32,
363 .flags = EE_ADDR2,
366 static struct spi_board_info dm355_evm_spi_info[] __initconst = {
368 .modalias = "at25",
369 .platform_data = &at25640a,
370 .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */
371 .bus_num = 0,
372 .chip_select = 0,
373 .mode = SPI_MODE_0,
377 static __init void dm355_evm_init(void)
379 struct clk *aemif;
380 int ret;
382 ret = dm355_gpio_register();
383 if (ret)
384 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
386 gpio_request(1, "dm9000");
387 gpio_direction_input(1);
388 dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
390 aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
391 if (!WARN(IS_ERR(aemif), "unable to get AEMIF clock\n"))
392 clk_prepare_enable(aemif);
394 platform_add_devices(davinci_evm_devices,
395 ARRAY_SIZE(davinci_evm_devices));
396 evm_init_i2c();
397 davinci_serial_init(dm355_serial_device);
399 /* NOTE: NAND flash timings set by the UBL are slower than
400 * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
401 * but could be 0x0400008c for about 25% faster page reads.
404 gpio_request(2, "usb_id_toggle");
405 gpio_direction_output(2, USB_ID_VALUE);
406 /* irlml6401 switches over 1A in under 8 msec */
407 davinci_setup_usb(1000, 8);
409 davinci_setup_mmc(0, &dm355evm_mmc_config);
410 davinci_setup_mmc(1, &dm355evm_mmc_config);
412 dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg);
414 dm355_init_spi0(BIT(0), dm355_evm_spi_info,
415 ARRAY_SIZE(dm355_evm_spi_info));
417 /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */
418 dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN);
421 MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
422 .atag_offset = 0x100,
423 .map_io = dm355_evm_map_io,
424 .init_irq = davinci_irq_init,
425 .init_time = davinci_timer_init,
426 .init_machine = dm355_evm_init,
427 .init_late = davinci_init_late,
428 .dma_zone_size = SZ_128M,
429 .restart = davinci_restart,
430 MACHINE_END