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mm: fix exec activate_mm vs TLB shootdown and lazy tlb switching race
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-dm646x-evm.c
blob4c458f71410135d33aa3aacd2a03ea0ca5ec5305
1 /*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/platform_data/pcf857x.h>
27
28 #include <media/i2c/tvp514x.h>
29 #include <media/i2c/adv7343.h>
30
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/rawnand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
36 #include <linux/platform_data/gpio-davinci.h>
37 #include <linux/platform_data/i2c-davinci.h>
38 #include <linux/platform_data/mtd-davinci.h>
39 #include <linux/platform_data/mtd-davinci-aemif.h>
40
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
43
44 #include <mach/common.h>
45 #include <mach/irqs.h>
46 #include <mach/serial.h>
47 #include <mach/clock.h>
48
49 #include "davinci.h"
50 #include "clock.h"
51
52 #define NAND_BLOCK_SIZE SZ_128K
53
54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
55 * and U-Boot environment this avoids dependency on any particular combination
56 * of UBL, U-Boot or flashing tools etc.
57 */
58 static struct mtd_partition davinci_nand_partitions[] = {
59 {
60 /* UBL, U-Boot with environment */
61 .name = "bootloader",
62 .offset = MTDPART_OFS_APPEND,
63 .size = 16 * NAND_BLOCK_SIZE,
64 .mask_flags = MTD_WRITEABLE, /* force read-only */
65 }, {
66 .name = "kernel",
67 .offset = MTDPART_OFS_APPEND,
68 .size = SZ_4M,
69 .mask_flags = 0,
70 }, {
71 .name = "filesystem",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 .mask_flags = 0,
75 }
76 };
77
78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
79 .wsetup = 29,
80 .wstrobe = 24,
81 .whold = 14,
82 .rsetup = 19,
83 .rstrobe = 33,
84 .rhold = 0,
85 .ta = 29,
86 };
87
88 static struct davinci_nand_pdata davinci_nand_data = {
89 .mask_cle = 0x80000,
90 .mask_ale = 0x40000,
91 .parts = davinci_nand_partitions,
92 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
93 .ecc_mode = NAND_ECC_HW,
94 .ecc_bits = 1,
95 .options = 0,
96 };
97
98 static struct resource davinci_nand_resources[] = {
99 {
100 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
101 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
102 .flags = IORESOURCE_MEM,
103 }, {
104 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
105 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 };
109
110 static struct platform_device davinci_nand_device = {
111 .name = "davinci_nand",
112 .id = 0,
113
114 .num_resources = ARRAY_SIZE(davinci_nand_resources),
115 .resource = davinci_nand_resources,
116
117 .dev = {
118 .platform_data = &davinci_nand_data,
119 },
120 };
121
122 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
123 IS_ENABLED(CONFIG_PATA_BK3710))
124
125 #ifdef CONFIG_I2C
126 /* CPLD Register 0 bits to control ATA */
127 #define DM646X_EVM_ATA_RST BIT(0)
128 #define DM646X_EVM_ATA_PWD BIT(1)
129
130 /* CPLD Register 0 Client: used for I/O Control */
131 static int cpld_reg0_probe(struct i2c_client *client,
132 const struct i2c_device_id *id)
133 {
134 if (HAS_ATA) {
135 u8 data;
136 struct i2c_msg msg[2] = {
137 {
138 .addr = client->addr,
139 .flags = I2C_M_RD,
140 .len = 1,
141 .buf = &data,
142 },
143 {
144 .addr = client->addr,
145 .flags = 0,
146 .len = 1,
147 .buf = &data,
148 },
149 };
150
151 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
152 i2c_transfer(client->adapter, msg, 1);
153 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
154 i2c_transfer(client->adapter, msg + 1, 1);
155 }
156
157 return 0;
158 }
159
160 static const struct i2c_device_id cpld_reg_ids[] = {
161 { "cpld_reg0", 0, },
162 { },
163 };
164
165 static struct i2c_driver dm6467evm_cpld_driver = {
166 .driver.name = "cpld_reg0",
167 .id_table = cpld_reg_ids,
168 .probe = cpld_reg0_probe,
169 };
170
171 /* LEDS */
172
173 static struct gpio_led evm_leds[] = {
174 { .name = "DS1", .active_low = 1, },
175 { .name = "DS2", .active_low = 1, },
176 { .name = "DS3", .active_low = 1, },
177 { .name = "DS4", .active_low = 1, },
178 };
179
180 static const struct gpio_led_platform_data evm_led_data = {
181 .num_leds = ARRAY_SIZE(evm_leds),
182 .leds = evm_leds,
183 };
184
185 static struct platform_device *evm_led_dev;
186
187 static int evm_led_setup(struct i2c_client *client, int gpio,
188 unsigned int ngpio, void *c)
189 {
190 struct gpio_led *leds = evm_leds;
191 int status;
192
193 while (ngpio--) {
194 leds->gpio = gpio++;
195 leds++;
196 }
197
198 evm_led_dev = platform_device_alloc("leds-gpio", 0);
199 platform_device_add_data(evm_led_dev, &evm_led_data,
200 sizeof(evm_led_data));
201
202 evm_led_dev->dev.parent = &client->dev;
203 status = platform_device_add(evm_led_dev);
204 if (status < 0) {
205 platform_device_put(evm_led_dev);
206 evm_led_dev = NULL;
207 }
208 return status;
209 }
210
211 static int evm_led_teardown(struct i2c_client *client, int gpio,
212 unsigned ngpio, void *c)
213 {
214 if (evm_led_dev) {
215 platform_device_unregister(evm_led_dev);
216 evm_led_dev = NULL;
217 }
218 return 0;
219 }
220
221 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
222
223 static int evm_sw_setup(struct i2c_client *client, int gpio,
224 unsigned ngpio, void *c)
225 {
226 int status;
227 int i;
228 char label[10];
229
230 for (i = 0; i < 4; ++i) {
231 snprintf(label, 10, "user_sw%d", i);
232 status = gpio_request(gpio, label);
233 if (status)
234 goto out_free;
235 evm_sw_gpio[i] = gpio++;
236
237 status = gpio_direction_input(evm_sw_gpio[i]);
238 if (status) {
239 gpio_free(evm_sw_gpio[i]);
240 evm_sw_gpio[i] = -EINVAL;
241 goto out_free;
242 }
243
244 status = gpio_export(evm_sw_gpio[i], 0);
245 if (status) {
246 gpio_free(evm_sw_gpio[i]);
247 evm_sw_gpio[i] = -EINVAL;
248 goto out_free;
249 }
250 }
251 return status;
252 out_free:
253 for (i = 0; i < 4; ++i) {
254 if (evm_sw_gpio[i] != -EINVAL) {
255 gpio_free(evm_sw_gpio[i]);
256 evm_sw_gpio[i] = -EINVAL;
257 }
258 }
259 return status;
260 }
261
262 static int evm_sw_teardown(struct i2c_client *client, int gpio,
263 unsigned ngpio, void *c)
264 {
265 int i;
266
267 for (i = 0; i < 4; ++i) {
268 if (evm_sw_gpio[i] != -EINVAL) {
269 gpio_unexport(evm_sw_gpio[i]);
270 gpio_free(evm_sw_gpio[i]);
271 evm_sw_gpio[i] = -EINVAL;
272 }
273 }
274 return 0;
275 }
276
277 static int evm_pcf_setup(struct i2c_client *client, int gpio,
278 unsigned int ngpio, void *c)
279 {
280 int status;
281
282 if (ngpio < 8)
283 return -EINVAL;
284
285 status = evm_sw_setup(client, gpio, 4, c);
286 if (status)
287 return status;
288
289 return evm_led_setup(client, gpio+4, 4, c);
290 }
291
292 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
293 unsigned int ngpio, void *c)
294 {
295 BUG_ON(ngpio < 8);
296
297 evm_sw_teardown(client, gpio, 4, c);
298 evm_led_teardown(client, gpio+4, 4, c);
299
300 return 0;
301 }
302
303 static struct pcf857x_platform_data pcf_data = {
304 .gpio_base = DAVINCI_N_GPIO+1,
305 .setup = evm_pcf_setup,
306 .teardown = evm_pcf_teardown,
307 };
308
309 /* Most of this EEPROM is unused, but U-Boot uses some data:
310 * - 0x7f00, 6 bytes Ethernet Address
311 * - ... newer boards may have more
312 */
313
314 static struct at24_platform_data eeprom_info = {
315 .byte_len = (256*1024) / 8,
316 .page_size = 64,
317 .flags = AT24_FLAG_ADDR16,
318 .setup = davinci_get_mac_addr,
319 .context = (void *)0x7f00,
320 };
321 #endif
322
323 static u8 dm646x_iis_serializer_direction[] = {
324 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
325 };
326
327 static u8 dm646x_dit_serializer_direction[] = {
328 TX_MODE,
329 };
330
331 static struct snd_platform_data dm646x_evm_snd_data[] = {
332 {
333 .tx_dma_offset = 0x400,
334 .rx_dma_offset = 0x400,
335 .op_mode = DAVINCI_MCASP_IIS_MODE,
336 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
337 .tdm_slots = 2,
338 .serial_dir = dm646x_iis_serializer_direction,
339 .asp_chan_q = EVENTQ_0,
340 },
341 {
342 .tx_dma_offset = 0x400,
343 .rx_dma_offset = 0,
344 .op_mode = DAVINCI_MCASP_DIT_MODE,
345 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
346 .tdm_slots = 32,
347 .serial_dir = dm646x_dit_serializer_direction,
348 .asp_chan_q = EVENTQ_0,
349 },
350 };
351
352 #ifdef CONFIG_I2C
353 static struct i2c_client *cpld_client;
354
355 static int cpld_video_probe(struct i2c_client *client,
356 const struct i2c_device_id *id)
357 {
358 cpld_client = client;
359 return 0;
360 }
361
362 static int cpld_video_remove(struct i2c_client *client)
363 {
364 cpld_client = NULL;
365 return 0;
366 }
367
368 static const struct i2c_device_id cpld_video_id[] = {
369 { "cpld_video", 0 },
370 { }
371 };
372
373 static struct i2c_driver cpld_video_driver = {
374 .driver = {
375 .name = "cpld_video",
376 },
377 .probe = cpld_video_probe,
378 .remove = cpld_video_remove,
379 .id_table = cpld_video_id,
380 };
381
382 static void evm_init_cpld(void)
383 {
384 i2c_add_driver(&cpld_video_driver);
385 }
386
387 static struct i2c_board_info __initdata i2c_info[] = {
388 {
389 I2C_BOARD_INFO("24c256", 0x50),
390 .platform_data = &eeprom_info,
391 },
392 {
393 I2C_BOARD_INFO("pcf8574a", 0x38),
394 .platform_data = &pcf_data,
395 },
396 {
397 I2C_BOARD_INFO("cpld_reg0", 0x3a),
398 },
399 {
400 I2C_BOARD_INFO("tlv320aic33", 0x18),
401 },
402 {
403 I2C_BOARD_INFO("cpld_video", 0x3b),
404 },
405 };
406
407 static struct davinci_i2c_platform_data i2c_pdata = {
408 .bus_freq = 100 /* kHz */,
409 .bus_delay = 0 /* usec */,
410 };
411
412 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
413 #define VCH2CLK_SYSCLK8 (BIT(9))
414 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
415 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
416 #define VCH3CLK_SYSCLK8 (BIT(13))
417 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
418
419 #define VIDCH2CLK (BIT(10))
420 #define VIDCH3CLK (BIT(11))
421 #define VIDCH1CLK (BIT(4))
422 #define TVP7002_INPUT (BIT(4))
423 #define TVP5147_INPUT (~BIT(4))
424 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
425 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
426 #define TVP5147_CH0 "tvp514x-0"
427 #define TVP5147_CH1 "tvp514x-1"
428
429 /* spin lock for updating above registers */
430 static spinlock_t vpif_reg_lock;
431
432 static int set_vpif_clock(int mux_mode, int hd)
433 {
434 unsigned long flags;
435 unsigned int value;
436 int val = 0;
437 int err = 0;
438
439 if (!cpld_client)
440 return -ENXIO;
441
442 /* disable the clock */
443 spin_lock_irqsave(&vpif_reg_lock, flags);
444 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
445 value |= (VIDCH3CLK | VIDCH2CLK);
446 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
447 spin_unlock_irqrestore(&vpif_reg_lock, flags);
448
449 val = i2c_smbus_read_byte(cpld_client);
450 if (val < 0)
451 return val;
452
453 if (mux_mode == 1)
454 val &= ~0x40;
455 else
456 val |= 0x40;
457
458 err = i2c_smbus_write_byte(cpld_client, val);
459 if (err)
460 return err;
461
462 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
463 value &= ~(VCH2CLK_MASK);
464 value &= ~(VCH3CLK_MASK);
465
466 if (hd >= 1)
467 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
468 else
469 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
470
471 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
472
473 spin_lock_irqsave(&vpif_reg_lock, flags);
474 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
475 /* enable the clock */
476 value &= ~(VIDCH3CLK | VIDCH2CLK);
477 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
478 spin_unlock_irqrestore(&vpif_reg_lock, flags);
479
480 return 0;
481 }
482
483 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
484 {
485 .name = "adv7343",
486 .board_info = {
487 I2C_BOARD_INFO("adv7343", 0x2a),
488 },
489 },
490 {
491 .name = "ths7303",
492 .board_info = {
493 I2C_BOARD_INFO("ths7303", 0x2c),
494 },
495 },
496 };
497
498 static const struct vpif_output dm6467_ch0_outputs[] = {
499 {
500 .output = {
501 .index = 0,
502 .name = "Composite",
503 .type = V4L2_OUTPUT_TYPE_ANALOG,
504 .capabilities = V4L2_OUT_CAP_STD,
505 .std = V4L2_STD_ALL,
506 },
507 .subdev_name = "adv7343",
508 .output_route = ADV7343_COMPOSITE_ID,
509 },
510 {
511 .output = {
512 .index = 1,
513 .name = "Component",
514 .type = V4L2_OUTPUT_TYPE_ANALOG,
515 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
516 },
517 .subdev_name = "adv7343",
518 .output_route = ADV7343_COMPONENT_ID,
519 },
520 {
521 .output = {
522 .index = 2,
523 .name = "S-Video",
524 .type = V4L2_OUTPUT_TYPE_ANALOG,
525 .capabilities = V4L2_OUT_CAP_STD,
526 .std = V4L2_STD_ALL,
527 },
528 .subdev_name = "adv7343",
529 .output_route = ADV7343_SVIDEO_ID,
530 },
531 };
532
533 static struct vpif_display_config dm646x_vpif_display_config = {
534 .set_clock = set_vpif_clock,
535 .subdevinfo = dm646x_vpif_subdev,
536 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
537 .i2c_adapter_id = 1,
538 .chan_config[0] = {
539 .outputs = dm6467_ch0_outputs,
540 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
541 },
542 .card_name = "DM646x EVM Video Display",
543 };
544
545 /**
546 * setup_vpif_input_path()
547 * @channel: channel id (0 - CH0, 1 - CH1)
548 * @sub_dev_name: ptr sub device name
549 *
550 * This will set vpif input to capture data from tvp514x or
551 * tvp7002.
552 */
553 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
554 {
555 int err = 0;
556 int val;
557
558 /* for channel 1, we don't do anything */
559 if (channel != 0)
560 return 0;
561
562 if (!cpld_client)
563 return -ENXIO;
564
565 val = i2c_smbus_read_byte(cpld_client);
566 if (val < 0)
567 return val;
568
569 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
570 !strcmp(sub_dev_name, TVP5147_CH1))
571 val &= TVP5147_INPUT;
572 else
573 val |= TVP7002_INPUT;
574
575 err = i2c_smbus_write_byte(cpld_client, val);
576 if (err)
577 return err;
578 return 0;
579 }
580
581 /**
582 * setup_vpif_input_channel_mode()
583 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
584 *
585 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
586 */
587 static int setup_vpif_input_channel_mode(int mux_mode)
588 {
589 unsigned long flags;
590 int err = 0;
591 int val;
592 u32 value;
593
594 if (!cpld_client)
595 return -ENXIO;
596
597 val = i2c_smbus_read_byte(cpld_client);
598 if (val < 0)
599 return val;
600
601 spin_lock_irqsave(&vpif_reg_lock, flags);
602 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
603 if (mux_mode) {
604 val &= VPIF_INPUT_TWO_CHANNEL;
605 value |= VIDCH1CLK;
606 } else {
607 val |= VPIF_INPUT_ONE_CHANNEL;
608 value &= ~VIDCH1CLK;
609 }
610 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
611 spin_unlock_irqrestore(&vpif_reg_lock, flags);
612
613 err = i2c_smbus_write_byte(cpld_client, val);
614 if (err)
615 return err;
616
617 return 0;
618 }
619
620 static struct tvp514x_platform_data tvp5146_pdata = {
621 .clk_polarity = 0,
622 .hs_polarity = 1,
623 .vs_polarity = 1
624 };
625
626 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
627
628 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
629 {
630 .name = TVP5147_CH0,
631 .board_info = {
632 I2C_BOARD_INFO("tvp5146", 0x5d),
633 .platform_data = &tvp5146_pdata,
634 },
635 },
636 {
637 .name = TVP5147_CH1,
638 .board_info = {
639 I2C_BOARD_INFO("tvp5146", 0x5c),
640 .platform_data = &tvp5146_pdata,
641 },
642 },
643 };
644
645 static struct vpif_input dm6467_ch0_inputs[] = {
646 {
647 .input = {
648 .index = 0,
649 .name = "Composite",
650 .type = V4L2_INPUT_TYPE_CAMERA,
651 .capabilities = V4L2_IN_CAP_STD,
652 .std = TVP514X_STD_ALL,
653 },
654 .subdev_name = TVP5147_CH0,
655 .input_route = INPUT_CVBS_VI2B,
656 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
657 },
658 };
659
660 static struct vpif_input dm6467_ch1_inputs[] = {
661 {
662 .input = {
663 .index = 0,
664 .name = "S-Video",
665 .type = V4L2_INPUT_TYPE_CAMERA,
666 .capabilities = V4L2_IN_CAP_STD,
667 .std = TVP514X_STD_ALL,
668 },
669 .subdev_name = TVP5147_CH1,
670 .input_route = INPUT_SVIDEO_VI2C_VI1C,
671 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
672 },
673 };
674
675 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
676 .setup_input_path = setup_vpif_input_path,
677 .setup_input_channel_mode = setup_vpif_input_channel_mode,
678 .subdev_info = vpif_capture_sdev_info,
679 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
680 .i2c_adapter_id = 1,
681 .chan_config[0] = {
682 .inputs = dm6467_ch0_inputs,
683 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
684 .vpif_if = {
685 .if_type = VPIF_IF_BT656,
686 .hd_pol = 1,
687 .vd_pol = 1,
688 .fid_pol = 0,
689 },
690 },
691 .chan_config[1] = {
692 .inputs = dm6467_ch1_inputs,
693 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
694 .vpif_if = {
695 .if_type = VPIF_IF_BT656,
696 .hd_pol = 1,
697 .vd_pol = 1,
698 .fid_pol = 0,
699 },
700 },
701 .card_name = "DM646x EVM Video Capture",
702 };
703
704 static void __init evm_init_video(void)
705 {
706 spin_lock_init(&vpif_reg_lock);
707
708 dm646x_setup_vpif(&dm646x_vpif_display_config,
709 &dm646x_vpif_capture_cfg);
710 }
711
712 static void __init evm_init_i2c(void)
713 {
714 davinci_init_i2c(&i2c_pdata);
715 i2c_add_driver(&dm6467evm_cpld_driver);
716 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
717 evm_init_cpld();
718 evm_init_video();
719 }
720 #endif
721
722 #define DM6467T_EVM_REF_FREQ 33000000
723
724 static void __init davinci_map_io(void)
725 {
726 dm646x_init();
727
728 if (machine_is_davinci_dm6467tevm())
729 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
730 }
731
732 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
733 /*
734 * The following EDMA channels/slots are not being used by drivers (for
735 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
736 * reserved for codecs on the DSP side.
737 */
738 static const s16 dm646x_dma_rsv_chans[][2] = {
739 /* (offset, number) */
740 { 0, 4},
741 {13, 3},
742 {24, 4},
743 {30, 2},
744 {54, 3},
745 {-1, -1}
746 };
747
748 static const s16 dm646x_dma_rsv_slots[][2] = {
749 /* (offset, number) */
750 { 0, 4},
751 {13, 3},
752 {24, 4},
753 {30, 2},
754 {54, 3},
755 {128, 384},
756 {-1, -1}
757 };
758
759 static struct edma_rsv_info dm646x_edma_rsv[] = {
760 {
761 .rsv_chans = dm646x_dma_rsv_chans,
762 .rsv_slots = dm646x_dma_rsv_slots,
763 },
764 };
765
766 static __init void evm_init(void)
767 {
768 int ret;
769 struct davinci_soc_info *soc_info = &davinci_soc_info;
770
771 ret = dm646x_gpio_register();
772 if (ret)
773 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
774
775 #ifdef CONFIG_I2C
776 evm_init_i2c();
777 #endif
778
779 davinci_serial_init(dm646x_serial_device);
780 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
781 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
782
783 if (machine_is_davinci_dm6467tevm())
784 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
785
786 platform_device_register(&davinci_nand_device);
787
788 if (davinci_aemif_setup(&davinci_nand_device))
789 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
790
791 dm646x_init_edma(dm646x_edma_rsv);
792
793 if (HAS_ATA)
794 davinci_init_ide();
795
796 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
797 }
798
799 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
800 .atag_offset = 0x100,
801 .map_io = davinci_map_io,
802 .init_irq = davinci_irq_init,
803 .init_time = davinci_timer_init,
804 .init_machine = evm_init,
805 .init_late = davinci_init_late,
806 .dma_zone_size = SZ_128M,
807 .restart = davinci_restart,
808 MACHINE_END
809
810 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
811 .atag_offset = 0x100,
812 .map_io = davinci_map_io,
813 .init_irq = davinci_irq_init,
814 .init_time = davinci_timer_init,
815 .init_machine = evm_init,
816 .init_late = davinci_init_late,
817 .dma_zone_size = SZ_128M,
818 .restart = davinci_restart,
819 MACHINE_END
820
Linux with added FPC-III support