mm: fix exec activate_mm vs TLB shootdown and lazy tlb switching race
[linux/fpc-iii.git] / arch / arm / mach-omap2 / prm_common.c
blob2f215facba104d457fc45815cf9a53b1926e148b
1 /*
2 * OMAP2+ common Power & Reset Management (PRM) IP block functions
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Tero Kristo <t-kristo@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * For historical purposes, the API used to configure the PRM
13 * interrupt handler refers to it as the "PRCM interrupt." The
14 * underlying registers are located in the PRM on OMAP3/4.
16 * XXX This code should eventually be moved to a PRM driver.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/irq.h>
24 #include <linux/interrupt.h>
25 #include <linux/slab.h>
26 #include <linux/of.h>
27 #include <linux/of_address.h>
28 #include <linux/clk-provider.h>
29 #include <linux/clk/ti.h>
31 #include "soc.h"
32 #include "prm2xxx_3xxx.h"
33 #include "prm2xxx.h"
34 #include "prm3xxx.h"
35 #include "prm33xx.h"
36 #include "prm44xx.h"
37 #include "prm54xx.h"
38 #include "prm7xx.h"
39 #include "prcm43xx.h"
40 #include "common.h"
41 #include "clock.h"
42 #include "cm.h"
43 #include "control.h"
46 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
47 * XXX this is technically not needed, since
48 * omap_prcm_register_chain_handler() could allocate this based on the
49 * actual amount of memory needed for the SoC
51 #define OMAP_PRCM_MAX_NR_PENDING_REG 2
54 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
55 * by the PRCM interrupt handler code. There will be one 'chip' per
56 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
57 * one "chip" and OMAP4 will have two.)
59 static struct irq_chip_generic **prcm_irq_chips;
62 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
63 * is currently running on. Defined and passed by initialization code
64 * that calls omap_prcm_register_chain_handler().
66 static struct omap_prcm_irq_setup *prcm_irq_setup;
68 /* prm_base: base virtual address of the PRM IP block */
69 struct omap_domain_base prm_base;
71 u16 prm_features;
74 * prm_ll_data: function pointers to SoC-specific implementations of
75 * common PRM functions
77 static struct prm_ll_data null_prm_ll_data;
78 static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
80 /* Private functions */
83 * Move priority events from events to priority_events array
85 static void omap_prcm_events_filter_priority(unsigned long *events,
86 unsigned long *priority_events)
88 int i;
90 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
91 priority_events[i] =
92 events[i] & prcm_irq_setup->priority_mask[i];
93 events[i] ^= priority_events[i];
98 * PRCM Interrupt Handler
100 * This is a common handler for the OMAP PRCM interrupts. Pending
101 * interrupts are detected by a call to prcm_pending_events and
102 * dispatched accordingly. Clearing of the wakeup events should be
103 * done by the SoC specific individual handlers.
105 static void omap_prcm_irq_handler(struct irq_desc *desc)
107 unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
108 unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
109 struct irq_chip *chip = irq_desc_get_chip(desc);
110 unsigned int virtirq;
111 int nr_irq = prcm_irq_setup->nr_regs * 32;
114 * If we are suspended, mask all interrupts from PRCM level,
115 * this does not ack them, and they will be pending until we
116 * re-enable the interrupts, at which point the
117 * omap_prcm_irq_handler will be executed again. The
118 * _save_and_clear_irqen() function must ensure that the PRM
119 * write to disable all IRQs has reached the PRM before
120 * returning, or spurious PRCM interrupts may occur during
121 * suspend.
123 if (prcm_irq_setup->suspended) {
124 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
125 prcm_irq_setup->suspend_save_flag = true;
129 * Loop until all pending irqs are handled, since
130 * generic_handle_irq() can cause new irqs to come
132 while (!prcm_irq_setup->suspended) {
133 prcm_irq_setup->read_pending_irqs(pending);
135 /* No bit set, then all IRQs are handled */
136 if (find_first_bit(pending, nr_irq) >= nr_irq)
137 break;
139 omap_prcm_events_filter_priority(pending, priority_pending);
142 * Loop on all currently pending irqs so that new irqs
143 * cannot starve previously pending irqs
146 /* Serve priority events first */
147 for_each_set_bit(virtirq, priority_pending, nr_irq)
148 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
150 /* Serve normal events next */
151 for_each_set_bit(virtirq, pending, nr_irq)
152 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
154 if (chip->irq_ack)
155 chip->irq_ack(&desc->irq_data);
156 if (chip->irq_eoi)
157 chip->irq_eoi(&desc->irq_data);
158 chip->irq_unmask(&desc->irq_data);
160 prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
163 /* Public functions */
166 * omap_prcm_event_to_irq - given a PRCM event name, returns the
167 * corresponding IRQ on which the handler should be registered
168 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
170 * Returns the Linux internal IRQ ID corresponding to @name upon success,
171 * or -ENOENT upon failure.
173 int omap_prcm_event_to_irq(const char *name)
175 int i;
177 if (!prcm_irq_setup || !name)
178 return -ENOENT;
180 for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
181 if (!strcmp(prcm_irq_setup->irqs[i].name, name))
182 return prcm_irq_setup->base_irq +
183 prcm_irq_setup->irqs[i].offset;
185 return -ENOENT;
189 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
190 * done by omap_prcm_register_chain_handler()
192 * No return value.
194 void omap_prcm_irq_cleanup(void)
196 unsigned int irq;
197 int i;
199 if (!prcm_irq_setup) {
200 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
201 return;
204 if (prcm_irq_chips) {
205 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
206 if (prcm_irq_chips[i])
207 irq_remove_generic_chip(prcm_irq_chips[i],
208 0xffffffff, 0, 0);
209 prcm_irq_chips[i] = NULL;
211 kfree(prcm_irq_chips);
212 prcm_irq_chips = NULL;
215 kfree(prcm_irq_setup->saved_mask);
216 prcm_irq_setup->saved_mask = NULL;
218 kfree(prcm_irq_setup->priority_mask);
219 prcm_irq_setup->priority_mask = NULL;
221 if (prcm_irq_setup->xlate_irq)
222 irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq);
223 else
224 irq = prcm_irq_setup->irq;
225 irq_set_chained_handler(irq, NULL);
227 if (prcm_irq_setup->base_irq > 0)
228 irq_free_descs(prcm_irq_setup->base_irq,
229 prcm_irq_setup->nr_regs * 32);
230 prcm_irq_setup->base_irq = 0;
233 void omap_prcm_irq_prepare(void)
235 prcm_irq_setup->suspended = true;
238 void omap_prcm_irq_complete(void)
240 prcm_irq_setup->suspended = false;
242 /* If we have not saved the masks, do not attempt to restore */
243 if (!prcm_irq_setup->suspend_save_flag)
244 return;
246 prcm_irq_setup->suspend_save_flag = false;
249 * Re-enable all masked PRCM irq sources, this causes the PRCM
250 * interrupt to fire immediately if the events were masked
251 * previously in the chain handler
253 prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
257 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
258 * handler based on provided parameters
259 * @irq_setup: hardware data about the underlying PRM/PRCM
261 * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
262 * one generic IRQ chip per PRM interrupt status/enable register pair.
263 * Returns 0 upon success, -EINVAL if called twice or if invalid
264 * arguments are passed, or -ENOMEM on any other error.
266 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
268 int nr_regs;
269 u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
270 int offset, i, irq;
271 struct irq_chip_generic *gc;
272 struct irq_chip_type *ct;
274 if (!irq_setup)
275 return -EINVAL;
277 nr_regs = irq_setup->nr_regs;
279 if (prcm_irq_setup) {
280 pr_err("PRCM: already initialized; won't reinitialize\n");
281 return -EINVAL;
284 if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
285 pr_err("PRCM: nr_regs too large\n");
286 return -EINVAL;
289 prcm_irq_setup = irq_setup;
291 prcm_irq_chips = kzalloc(sizeof(void *) * nr_regs, GFP_KERNEL);
292 prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL);
293 prcm_irq_setup->priority_mask = kzalloc(sizeof(u32) * nr_regs,
294 GFP_KERNEL);
296 if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
297 !prcm_irq_setup->priority_mask)
298 goto err;
300 memset(mask, 0, sizeof(mask));
302 for (i = 0; i < irq_setup->nr_irqs; i++) {
303 offset = irq_setup->irqs[i].offset;
304 mask[offset >> 5] |= 1 << (offset & 0x1f);
305 if (irq_setup->irqs[i].priority)
306 irq_setup->priority_mask[offset >> 5] |=
307 1 << (offset & 0x1f);
310 if (irq_setup->xlate_irq)
311 irq = irq_setup->xlate_irq(irq_setup->irq);
312 else
313 irq = irq_setup->irq;
314 irq_set_chained_handler(irq, omap_prcm_irq_handler);
316 irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
319 if (irq_setup->base_irq < 0) {
320 pr_err("PRCM: failed to allocate irq descs: %d\n",
321 irq_setup->base_irq);
322 goto err;
325 for (i = 0; i < irq_setup->nr_regs; i++) {
326 gc = irq_alloc_generic_chip("PRCM", 1,
327 irq_setup->base_irq + i * 32, prm_base.va,
328 handle_level_irq);
330 if (!gc) {
331 pr_err("PRCM: failed to allocate generic chip\n");
332 goto err;
334 ct = gc->chip_types;
335 ct->chip.irq_ack = irq_gc_ack_set_bit;
336 ct->chip.irq_mask = irq_gc_mask_clr_bit;
337 ct->chip.irq_unmask = irq_gc_mask_set_bit;
339 ct->regs.ack = irq_setup->ack + i * 4;
340 ct->regs.mask = irq_setup->mask + i * 4;
342 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
343 prcm_irq_chips[i] = gc;
346 irq = omap_prcm_event_to_irq("io");
347 omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
349 return 0;
351 err:
352 omap_prcm_irq_cleanup();
353 return -ENOMEM;
357 * omap2_set_globals_prm - set the PRM base address (for early use)
358 * @prm: PRM base virtual address
360 * XXX Will be replaced when the PRM/CM drivers are completed.
362 void __init omap2_set_globals_prm(void __iomem *prm)
364 prm_base.va = prm;
368 * prm_read_reset_sources - return the sources of the SoC's last reset
370 * Return a u32 bitmask representing the reset sources that caused the
371 * SoC to reset. The low-level per-SoC functions called by this
372 * function remap the SoC-specific reset source bits into an
373 * OMAP-common set of reset source bits, defined in
374 * arch/arm/mach-omap2/prm.h. Returns the standardized reset source
375 * u32 bitmask from the hardware upon success, or returns (1 <<
376 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
377 * function was registered.
379 u32 prm_read_reset_sources(void)
381 u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
383 if (prm_ll_data->read_reset_sources)
384 ret = prm_ll_data->read_reset_sources();
385 else
386 WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
388 return ret;
392 * prm_was_any_context_lost_old - was device context lost? (old API)
393 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
394 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
395 * @idx: CONTEXT register offset
397 * Return 1 if any bits were set in the *_CONTEXT_* register
398 * identified by (@part, @inst, @idx), which means that some context
399 * was lost for that module; otherwise, return 0. XXX Deprecated;
400 * callers need to use a less-SoC-dependent way to identify hardware
401 * IP blocks.
403 bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
405 bool ret = true;
407 if (prm_ll_data->was_any_context_lost_old)
408 ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
409 else
410 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
411 __func__);
413 return ret;
417 * prm_clear_context_lost_flags_old - clear context loss flags (old API)
418 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
419 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
420 * @idx: CONTEXT register offset
422 * Clear hardware context loss bits for the module identified by
423 * (@part, @inst, @idx). No return value. XXX Deprecated; callers
424 * need to use a less-SoC-dependent way to identify hardware IP
425 * blocks.
427 void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
429 if (prm_ll_data->clear_context_loss_flags_old)
430 prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
431 else
432 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
433 __func__);
437 * omap_prm_assert_hardreset - assert hardreset for an IP block
438 * @shift: register bit shift corresponding to the reset line
439 * @part: PRM partition
440 * @prm_mod: PRM submodule base or instance offset
441 * @offset: register offset
443 * Asserts a hardware reset line for an IP block.
445 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
447 if (!prm_ll_data->assert_hardreset) {
448 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
449 __func__);
450 return -EINVAL;
453 return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
457 * omap_prm_deassert_hardreset - deassert hardreset for an IP block
458 * @shift: register bit shift corresponding to the reset line
459 * @st_shift: reset status bit shift corresponding to the reset line
460 * @part: PRM partition
461 * @prm_mod: PRM submodule base or instance offset
462 * @offset: register offset
463 * @st_offset: status register offset
465 * Deasserts a hardware reset line for an IP block.
467 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
468 u16 offset, u16 st_offset)
470 if (!prm_ll_data->deassert_hardreset) {
471 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
472 __func__);
473 return -EINVAL;
476 return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
477 offset, st_offset);
481 * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
482 * @shift: register bit shift corresponding to the reset line
483 * @part: PRM partition
484 * @prm_mod: PRM submodule base or instance offset
485 * @offset: register offset
487 * Checks if a hardware reset line for an IP block is enabled or not.
489 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
491 if (!prm_ll_data->is_hardreset_asserted) {
492 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
493 __func__);
494 return -EINVAL;
497 return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
501 * omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
503 * Clear any previously-latched I/O wakeup events and ensure that the
504 * I/O wakeup gates are aligned with the current mux settings.
505 * Calls SoC specific I/O chain reconfigure function if available,
506 * otherwise does nothing.
508 void omap_prm_reconfigure_io_chain(void)
510 if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
511 return;
513 prcm_irq_setup->reconfigure_io_chain();
517 * omap_prm_reset_system - trigger global SW reset
519 * Triggers SoC specific global warm reset to reboot the device.
521 void omap_prm_reset_system(void)
523 if (!prm_ll_data->reset_system) {
524 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
525 __func__);
526 return;
529 prm_ll_data->reset_system();
531 while (1) {
532 cpu_relax();
533 wfe();
538 * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
539 * @module: PRM module to clear wakeups from
540 * @regs: register to clear
541 * @wkst_mask: wkst bits to clear
543 * Clears any wakeup events for the module and register set defined.
544 * Uses SoC specific implementation to do the actual wakeup status
545 * clearing.
547 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
549 if (!prm_ll_data->clear_mod_irqs) {
550 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
551 __func__);
552 return -EINVAL;
555 return prm_ll_data->clear_mod_irqs(module, regs, wkst_mask);
559 * omap_prm_vp_check_txdone - check voltage processor TX done status
561 * Checks if voltage processor transmission has been completed.
562 * Returns non-zero if a transmission has completed, 0 otherwise.
564 u32 omap_prm_vp_check_txdone(u8 vp_id)
566 if (!prm_ll_data->vp_check_txdone) {
567 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
568 __func__);
569 return 0;
572 return prm_ll_data->vp_check_txdone(vp_id);
576 * omap_prm_vp_clear_txdone - clears voltage processor TX done status
578 * Clears the status bit for completed voltage processor transmission
579 * returned by prm_vp_check_txdone.
581 void omap_prm_vp_clear_txdone(u8 vp_id)
583 if (!prm_ll_data->vp_clear_txdone) {
584 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
585 __func__);
586 return;
589 prm_ll_data->vp_clear_txdone(vp_id);
593 * prm_register - register per-SoC low-level data with the PRM
594 * @pld: low-level per-SoC OMAP PRM data & function pointers to register
596 * Register per-SoC low-level OMAP PRM data and function pointers with
597 * the OMAP PRM common interface. The caller must keep the data
598 * pointed to by @pld valid until it calls prm_unregister() and
599 * it returns successfully. Returns 0 upon success, -EINVAL if @pld
600 * is NULL, or -EEXIST if prm_register() has already been called
601 * without an intervening prm_unregister().
603 int prm_register(struct prm_ll_data *pld)
605 if (!pld)
606 return -EINVAL;
608 if (prm_ll_data != &null_prm_ll_data)
609 return -EEXIST;
611 prm_ll_data = pld;
613 return 0;
617 * prm_unregister - unregister per-SoC low-level data & function pointers
618 * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
620 * Unregister per-SoC low-level OMAP PRM data and function pointers
621 * that were previously registered with prm_register(). The
622 * caller may not destroy any of the data pointed to by @pld until
623 * this function returns successfully. Returns 0 upon success, or
624 * -EINVAL if @pld is NULL or if @pld does not match the struct
625 * prm_ll_data * previously registered by prm_register().
627 int prm_unregister(struct prm_ll_data *pld)
629 if (!pld || prm_ll_data != pld)
630 return -EINVAL;
632 prm_ll_data = &null_prm_ll_data;
634 return 0;
637 #ifdef CONFIG_ARCH_OMAP2
638 static struct omap_prcm_init_data omap2_prm_data __initdata = {
639 .index = TI_CLKM_PRM,
640 .init = omap2xxx_prm_init,
642 #endif
644 #ifdef CONFIG_ARCH_OMAP3
645 static struct omap_prcm_init_data omap3_prm_data __initdata = {
646 .index = TI_CLKM_PRM,
647 .init = omap3xxx_prm_init,
650 * IVA2 offset is a negative value, must offset the prm_base
651 * address by this to get it to positive
653 .offset = -OMAP3430_IVA2_MOD,
655 #endif
657 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
658 static struct omap_prcm_init_data am3_prm_data __initdata = {
659 .index = TI_CLKM_PRM,
660 .init = am33xx_prm_init,
662 #endif
664 #ifdef CONFIG_SOC_TI81XX
665 static struct omap_prcm_init_data dm814_pllss_data __initdata = {
666 .index = TI_CLKM_PLLSS,
667 .init = am33xx_prm_init,
669 #endif
671 #ifdef CONFIG_ARCH_OMAP4
672 static struct omap_prcm_init_data omap4_prm_data __initdata = {
673 .index = TI_CLKM_PRM,
674 .init = omap44xx_prm_init,
675 .device_inst_offset = OMAP4430_PRM_DEVICE_INST,
676 .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT,
678 #endif
680 #ifdef CONFIG_SOC_OMAP5
681 static struct omap_prcm_init_data omap5_prm_data __initdata = {
682 .index = TI_CLKM_PRM,
683 .init = omap44xx_prm_init,
684 .device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
685 .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
687 #endif
689 #ifdef CONFIG_SOC_DRA7XX
690 static struct omap_prcm_init_data dra7_prm_data __initdata = {
691 .index = TI_CLKM_PRM,
692 .init = omap44xx_prm_init,
693 .device_inst_offset = DRA7XX_PRM_DEVICE_INST,
694 .flags = PRM_HAS_IO_WAKEUP,
696 #endif
698 #ifdef CONFIG_SOC_AM43XX
699 static struct omap_prcm_init_data am4_prm_data __initdata = {
700 .index = TI_CLKM_PRM,
701 .init = omap44xx_prm_init,
702 .device_inst_offset = AM43XX_PRM_DEVICE_INST,
703 .flags = PRM_HAS_IO_WAKEUP,
705 #endif
707 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
708 static struct omap_prcm_init_data scrm_data __initdata = {
709 .index = TI_CLKM_SCRM,
711 #endif
713 static const struct of_device_id omap_prcm_dt_match_table[] __initconst = {
714 #ifdef CONFIG_SOC_AM33XX
715 { .compatible = "ti,am3-prcm", .data = &am3_prm_data },
716 #endif
717 #ifdef CONFIG_SOC_AM43XX
718 { .compatible = "ti,am4-prcm", .data = &am4_prm_data },
719 #endif
720 #ifdef CONFIG_SOC_TI81XX
721 { .compatible = "ti,dm814-prcm", .data = &am3_prm_data },
722 { .compatible = "ti,dm814-pllss", .data = &dm814_pllss_data },
723 { .compatible = "ti,dm816-prcm", .data = &am3_prm_data },
724 #endif
725 #ifdef CONFIG_ARCH_OMAP2
726 { .compatible = "ti,omap2-prcm", .data = &omap2_prm_data },
727 #endif
728 #ifdef CONFIG_ARCH_OMAP3
729 { .compatible = "ti,omap3-prm", .data = &omap3_prm_data },
730 #endif
731 #ifdef CONFIG_ARCH_OMAP4
732 { .compatible = "ti,omap4-prm", .data = &omap4_prm_data },
733 { .compatible = "ti,omap4-scrm", .data = &scrm_data },
734 #endif
735 #ifdef CONFIG_SOC_OMAP5
736 { .compatible = "ti,omap5-prm", .data = &omap5_prm_data },
737 { .compatible = "ti,omap5-scrm", .data = &scrm_data },
738 #endif
739 #ifdef CONFIG_SOC_DRA7XX
740 { .compatible = "ti,dra7-prm", .data = &dra7_prm_data },
741 #endif
746 * omap2_prm_base_init - initialize iomappings for the PRM driver
748 * Detects and initializes the iomappings for the PRM driver, based
749 * on the DT data. Returns 0 in success, negative error value
750 * otherwise.
752 int __init omap2_prm_base_init(void)
754 struct device_node *np;
755 const struct of_device_id *match;
756 struct omap_prcm_init_data *data;
757 struct resource res;
758 int ret;
760 for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
761 data = (struct omap_prcm_init_data *)match->data;
763 ret = of_address_to_resource(np, 0, &res);
764 if (ret)
765 return ret;
767 data->mem = ioremap(res.start, resource_size(&res));
769 if (data->index == TI_CLKM_PRM) {
770 prm_base.va = data->mem + data->offset;
771 prm_base.pa = res.start + data->offset;
774 data->np = np;
776 if (data->init)
777 data->init(data);
780 return 0;
783 int __init omap2_prcm_base_init(void)
785 int ret;
787 ret = omap2_prm_base_init();
788 if (ret)
789 return ret;
791 return omap2_cm_base_init();
795 * omap_prcm_init - low level init for the PRCM drivers
797 * Initializes the low level clock infrastructure for PRCM drivers.
798 * Returns 0 in success, negative error value in failure.
800 int __init omap_prcm_init(void)
802 struct device_node *np;
803 const struct of_device_id *match;
804 const struct omap_prcm_init_data *data;
805 int ret;
807 for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
808 data = match->data;
810 ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
811 if (ret)
812 return ret;
815 omap_cm_init();
817 return 0;
820 static int __init prm_late_init(void)
822 if (prm_ll_data->late_init)
823 return prm_ll_data->late_init();
824 return 0;
826 subsys_initcall(prm_late_init);