1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_s3c.h>
26 #include <linux/types.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
33 #include <mach/regs-gpio.h>
34 #include <mach/gpio-samsung.h>
38 #include <plat/devs.h>
40 #include <linux/platform_data/mtd-nand-s3c2410.h>
41 #include <linux/platform_data/mmc-sdhci-s3c.h>
42 #include <plat/sdhci.h>
43 #include <linux/platform_data/touchscreen-s3c2410.h>
44 #include <mach/irqs.h>
46 #include <video/platform_lcd.h>
47 #include <video/samsung_fimd.h>
48 #include <plat/samsung-time.h>
51 #include "regs-modem.h"
52 #include "regs-srom.h"
54 #define UCON S3C2410_UCON_DEFAULT
55 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
56 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
58 static struct s3c2410_uartcfg mini6410_uartcfgs
[] __initdata
= {
89 /* DM9000AEP 10/100 ethernet controller */
91 static struct resource mini6410_dm9k_resource
[] = {
92 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1
, 2),
93 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1
+ 4, 2),
94 [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL
, IORESOURCE_IRQ \
95 | IORESOURCE_IRQ_HIGHLEVEL
),
98 static struct dm9000_plat_data mini6410_dm9k_pdata
= {
99 .flags
= (DM9000_PLATF_16BITONLY
| DM9000_PLATF_NO_EEPROM
),
102 static struct platform_device mini6410_device_eth
= {
105 .num_resources
= ARRAY_SIZE(mini6410_dm9k_resource
),
106 .resource
= mini6410_dm9k_resource
,
108 .platform_data
= &mini6410_dm9k_pdata
,
112 static struct mtd_partition mini6410_nand_part
[] = {
125 .size
= MTDPART_SIZ_FULL
,
126 .offset
= SZ_1M
+ SZ_2M
,
130 static struct s3c2410_nand_set mini6410_nand_sets
[] = {
134 .nr_partitions
= ARRAY_SIZE(mini6410_nand_part
),
135 .partitions
= mini6410_nand_part
,
139 static struct s3c2410_platform_nand mini6410_nand_info
= {
143 .nr_sets
= ARRAY_SIZE(mini6410_nand_sets
),
144 .sets
= mini6410_nand_sets
,
145 .ecc_mode
= NAND_ECC_SOFT
,
148 static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win
= {
155 static struct fb_videomode mini6410_lcd_type0_timing
= {
167 static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win
= {
174 static struct fb_videomode mini6410_lcd_type1_timing
= {
186 static struct s3c_fb_platdata mini6410_lcd_pdata
[] __initdata
= {
188 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
189 .vtiming
= &mini6410_lcd_type0_timing
,
190 .win
[0] = &mini6410_lcd_type0_fb_win
,
191 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
192 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
194 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
195 .vtiming
= &mini6410_lcd_type1_timing
,
196 .win
[0] = &mini6410_lcd_type1_fb_win
,
197 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
198 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
203 static void mini6410_lcd_power_set(struct plat_lcd_data
*pd
,
207 gpio_direction_output(S3C64XX_GPE(0), 1);
209 gpio_direction_output(S3C64XX_GPE(0), 0);
212 static struct plat_lcd_data mini6410_lcd_power_data
= {
213 .set_power
= mini6410_lcd_power_set
,
216 static struct platform_device mini6410_lcd_powerdev
= {
217 .name
= "platform-lcd",
218 .dev
.parent
= &s3c_device_fb
.dev
,
219 .dev
.platform_data
= &mini6410_lcd_power_data
,
222 static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata
= {
224 .cd_type
= S3C_SDHCI_CD_GPIO
,
225 .ext_cd_gpio
= S3C64XX_GPN(10),
226 .ext_cd_gpio_invert
= true,
229 static struct platform_device
*mini6410_devices
[] __initdata
= {
230 &mini6410_device_eth
,
236 &mini6410_lcd_powerdev
,
240 static void __init
mini6410_map_io(void)
244 s3c64xx_init_io(NULL
, 0);
245 s3c64xx_set_xtal_freq(12000000);
246 s3c24xx_init_uarts(mini6410_uartcfgs
, ARRAY_SIZE(mini6410_uartcfgs
));
247 samsung_set_timer_source(SAMSUNG_PWM3
, SAMSUNG_PWM4
);
249 /* set the LCD type */
250 tmp
= __raw_readl(S3C64XX_SPCON
);
251 tmp
&= ~S3C64XX_SPCON_LCD_SEL_MASK
;
252 tmp
|= S3C64XX_SPCON_LCD_SEL_RGB
;
253 __raw_writel(tmp
, S3C64XX_SPCON
);
255 /* remove the LCD bypass */
256 tmp
= __raw_readl(S3C64XX_MODEM_MIFPCON
);
257 tmp
&= ~MIFPCON_LCD_BYPASS
;
258 __raw_writel(tmp
, S3C64XX_MODEM_MIFPCON
);
262 * mini6410_features string
264 * 0-9 LCD configuration
267 static char mini6410_features_str
[12] __initdata
= "0";
269 static int __init
mini6410_features_setup(char *str
)
272 strlcpy(mini6410_features_str
, str
,
273 sizeof(mini6410_features_str
));
277 __setup("mini6410=", mini6410_features_setup
);
279 #define FEATURE_SCREEN (1 << 0)
281 struct mini6410_features_t
{
286 static void mini6410_parse_features(
287 struct mini6410_features_t
*features
,
288 const char *features_str
)
290 const char *fp
= features_str
;
293 features
->lcd_index
= 0;
299 case '0'...'9': /* tft screen */
300 if (features
->done
& FEATURE_SCREEN
) {
301 printk(KERN_INFO
"MINI6410: '%c' ignored, "
302 "screen type already set\n", f
);
305 if (li
>= ARRAY_SIZE(mini6410_lcd_pdata
))
306 printk(KERN_INFO
"MINI6410: '%c' out "
307 "of range LCD mode\n", f
);
309 features
->lcd_index
= li
;
312 features
->done
|= FEATURE_SCREEN
;
318 static void __init
mini6410_machine_init(void)
321 struct mini6410_features_t features
= { 0 };
323 printk(KERN_INFO
"MINI6410: Option string mini6410=%s\n",
324 mini6410_features_str
);
326 /* Parse the feature string */
327 mini6410_parse_features(&features
, mini6410_features_str
);
329 printk(KERN_INFO
"MINI6410: selected LCD display is %dx%d\n",
330 mini6410_lcd_pdata
[features
.lcd_index
].win
[0]->xres
,
331 mini6410_lcd_pdata
[features
.lcd_index
].win
[0]->yres
);
333 s3c_nand_set_platdata(&mini6410_nand_info
);
334 s3c_fb_set_platdata(&mini6410_lcd_pdata
[features
.lcd_index
]);
335 s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata
);
336 s3c64xx_ts_set_platdata(NULL
);
338 /* configure nCS1 width to 16 bits */
340 cs1
= __raw_readl(S3C64XX_SROM_BW
) &
341 ~(S3C64XX_SROM_BW__CS_MASK
<< S3C64XX_SROM_BW__NCS1__SHIFT
);
342 cs1
|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT
) |
343 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT
) |
344 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT
)) <<
345 S3C64XX_SROM_BW__NCS1__SHIFT
;
346 __raw_writel(cs1
, S3C64XX_SROM_BW
);
348 /* set timing for nCS1 suitable for ethernet chip */
350 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT
) |
351 (6 << S3C64XX_SROM_BCX__TACP__SHIFT
) |
352 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT
) |
353 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT
) |
354 (13 << S3C64XX_SROM_BCX__TACC__SHIFT
) |
355 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT
) |
356 (0 << S3C64XX_SROM_BCX__TACS__SHIFT
), S3C64XX_SROM_BC1
);
358 gpio_request(S3C64XX_GPF(15), "LCD power");
359 gpio_request(S3C64XX_GPE(0), "LCD power");
361 platform_add_devices(mini6410_devices
, ARRAY_SIZE(mini6410_devices
));
364 MACHINE_START(MINI6410
, "MINI6410")
365 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
366 .atag_offset
= 0x100,
367 .nr_irqs
= S3C64XX_NR_IRQS
,
368 .init_irq
= s3c6410_init_irq
,
369 .map_io
= mini6410_map_io
,
370 .init_machine
= mini6410_machine_init
,
371 .init_time
= samsung_timer_init
,
372 .restart
= s3c64xx_restart
,