1 ; SPDX-License-Identifier: GPL-2.0
2 ; WARNING : The refill handler has been modified, see below !!!
5 * Copyright (C) 2003 Axis Communications AB
7 * Authors: Mikael Starvik (starvik@axis.com)
9 * Code for the fault low-level handling routines.
14 #include <asm/pgtable.h>
16 ; Save all register. Must save in same order as struct pt_regs.
38 ; Bus fault handler. Extracts relevant information and calls mm subsystem
39 ; to handle the fault.
40 .macro MMU_BUS_FAULT_HANDLER handler, mmu, we, ex
42 .type \handler,"function"
45 move \mmu, $srs ; Select MMU support register bank
46 move.d $sp, $r11 ; regs
47 moveq 1, $r12 ; protection fault
48 moveq \we, $r13 ; write exception?
49 orq \ex << 1, $r13 ; execute?
50 move $s3, $r10 ; rw_mm_cause
51 and.d ~8191, $r10 ; Get faulting page start address
57 .size \handler, . - \handler
60 ; Refill handler. Three cases may occur:
61 ; 1. PMD and PTE exists in mm subsystem but not in TLB
62 ; 2. PMD exists but not PTE
63 ; 3. PMD doesn't exist
64 ; The code below handles case 1 and calls the mm subsystem for case 2 and 3.
65 ; Do not touch this code without very good reasons and extensive testing.
66 ; Note that the code is optimized to minimize stalls (makes the code harder
70 ; Modified by Mikael Asker 060725: added a workaround for strange TLB
71 ; behavior. If the same PTE is present in more than one set, the TLB
72 ; doesn't recognize it and we get stuck in a loop of refill exceptions.
73 ; The workaround detects such loops and exits them by flushing
74 ; the TLB contents. The problem and workaround were verified
75 ; in VCS by Mikael Starvik.
77 ; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each
78 ; PMD holds 16 MB of virtual memory.
79 ; Bits 0-12 : Offset within a page
80 ; Bits 13-23 : PTE offset within a PMD
81 ; Bits 24-31 : PMD offset within the PGD
83 .macro MMU_REFILL_HANDLER handler, mmu
85 1: .dword 0 ; refill_count
86 ; == 0 <=> last_refill_cause is invalid
87 2: .dword 0 ; last_refill_cause
90 .type \handler, "function"
93 ; (The pipeline stalls for one cycle; $sp used as address in the next cycle.)
96 move \mmu, $srs ; Select MMU support register bank
99 move.d 1b, $acr ; Point to refill_count
102 test.d [$acr] ; refill_count == 0 ?
103 beq 5f ; yes, last_refill_cause is invalid
106 ; last_refill_cause is valid, investigate cause
107 addq 4, $r1 ; Point to last_refill_cause
108 move $s3, $r0 ; Get rw_mm_cause
109 move.d [$r1], $r2 ; Get last_refill_cause
110 cmp.d $r0, $r2 ; rw_mm_cause == last_refill_cause ?
111 beq 6f ; yes, increment count
114 ; rw_mm_cause != last_refill_cause
115 move.d $r2, [$acr] ; refill_count = 1
116 move.d $r0, [$r1] ; last_refill_cause = rw_mm_cause
118 3: ; Probably not in a loop, continue normal processing
119 move.d current_pgd, $acr ; PGD
121 lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31)
122 move.d [$acr], $acr ; PGD for the current process
123 addi $r0.d, $acr, $acr
124 move $s3, $r0 ; rw_mm_cause
125 move.d [$acr], $acr ; Get PMD
129 and.w PAGE_MASK, $acr ; Remove PMD flags
130 and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23)
131 addi $r0.d, $acr, $acr
132 move.d [$acr], $acr ; Get PTE
134 movem [$sp], $r2 ; Restore r0-r2 in delay slot
145 5: ; last_refill_cause is invalid
147 addq 4, $r1 ; Point to last_refill_cause
148 move.d $r2, [$acr] ; refill_count = 1
149 move $s3, $r0 ; Get rw_mm_cause
150 ba 3b ; Continue normal processing
151 move.d $r0,[$r1] ; last_refill_cause = rw_mm_cause
153 6: ; rw_mm_cause == last_refill_cause
154 move.d [$acr], $r2 ; Get refill_count
155 cmpq 4, $r2 ; refill_count > 4 ?
157 addq 1, $r2 ; refill_count++
158 ba 3b ; Continue normal processing
161 7: ; refill_count > 4, error
162 move.d $acr, $r0 ; Save pointer to refill_count
163 clear.d [$r0] ; refill_count = 0
165 ;; rewind the short stack
166 movem [$sp], $r2 ; Restore r0-r2
171 ;; Keep it simple (slow), save all the regs.
175 ba ret_from_intr ; Return
178 8: ; PMD missing, let the mm subsystem fix it up.
179 movem [$sp], $r2 ; Restore r0-r2
180 9: ; PTE missing, let the mm subsystem fix it up.
187 move.d $sp, $r11 ; regs
188 clear.d $r12 ; Not a protection fault
189 move.w PAGE_MASK, $acr
190 move $s3, $r10 ; rw_mm_cause
191 btstq 9, $r10 ; Check if write access
193 and.w PAGE_MASK, $r10 ; Get VPN (virtual address)
199 .size \handler, . - \handler
202 ; This is the MMU bus fault handlers.
204 MMU_REFILL_HANDLER i_mmu_refill, 1
205 MMU_BUS_FAULT_HANDLER i_mmu_invalid, 1, 0, 0
206 MMU_BUS_FAULT_HANDLER i_mmu_access, 1, 0, 0
207 MMU_BUS_FAULT_HANDLER i_mmu_execute, 1, 0, 1
208 MMU_REFILL_HANDLER d_mmu_refill, 2
209 MMU_BUS_FAULT_HANDLER d_mmu_invalid, 2, 0, 0
210 MMU_BUS_FAULT_HANDLER d_mmu_access, 2, 0, 0
211 MMU_BUS_FAULT_HANDLER d_mmu_write, 2, 1, 0