mm: fix exec activate_mm vs TLB shootdown and lazy tlb switching race
[linux/fpc-iii.git] / arch / ia64 / kernel / process.c
blobdda0082056b38109f90e5c1ce93effbdbf02307a
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Architecture-specific setup.
5 * Copyright (C) 1998-2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9 * 2005-10-07 Keith Owens <kaos@sgi.com>
10 * Add notify_die() hooks.
12 #include <linux/cpu.h>
13 #include <linux/pm.h>
14 #include <linux/elf.h>
15 #include <linux/errno.h>
16 #include <linux/kallsyms.h>
17 #include <linux/kernel.h>
18 #include <linux/mm.h>
19 #include <linux/slab.h>
20 #include <linux/module.h>
21 #include <linux/notifier.h>
22 #include <linux/personality.h>
23 #include <linux/sched.h>
24 #include <linux/sched/debug.h>
25 #include <linux/sched/hotplug.h>
26 #include <linux/sched/task.h>
27 #include <linux/sched/task_stack.h>
28 #include <linux/stddef.h>
29 #include <linux/thread_info.h>
30 #include <linux/unistd.h>
31 #include <linux/efi.h>
32 #include <linux/interrupt.h>
33 #include <linux/delay.h>
34 #include <linux/kdebug.h>
35 #include <linux/utsname.h>
36 #include <linux/tracehook.h>
37 #include <linux/rcupdate.h>
39 #include <asm/cpu.h>
40 #include <asm/delay.h>
41 #include <asm/elf.h>
42 #include <asm/irq.h>
43 #include <asm/kexec.h>
44 #include <asm/pgalloc.h>
45 #include <asm/processor.h>
46 #include <asm/sal.h>
47 #include <asm/switch_to.h>
48 #include <asm/tlbflush.h>
49 #include <linux/uaccess.h>
50 #include <asm/unwind.h>
51 #include <asm/user.h>
53 #include "entry.h"
55 #ifdef CONFIG_PERFMON
56 # include <asm/perfmon.h>
57 #endif
59 #include "sigframe.h"
61 void (*ia64_mark_idle)(int);
63 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
64 EXPORT_SYMBOL(boot_option_idle_override);
65 void (*pm_power_off) (void);
66 EXPORT_SYMBOL(pm_power_off);
68 void
69 ia64_do_show_stack (struct unw_frame_info *info, void *arg)
71 unsigned long ip, sp, bsp;
72 char buf[128]; /* don't make it so big that it overflows the stack! */
74 printk("\nCall Trace:\n");
75 do {
76 unw_get_ip(info, &ip);
77 if (ip == 0)
78 break;
80 unw_get_sp(info, &sp);
81 unw_get_bsp(info, &bsp);
82 snprintf(buf, sizeof(buf),
83 " [<%016lx>] %%s\n"
84 " sp=%016lx bsp=%016lx\n",
85 ip, sp, bsp);
86 print_symbol(buf, ip);
87 } while (unw_unwind(info) >= 0);
90 void
91 show_stack (struct task_struct *task, unsigned long *sp)
93 if (!task)
94 unw_init_running(ia64_do_show_stack, NULL);
95 else {
96 struct unw_frame_info info;
98 unw_init_from_blocked_task(&info, task);
99 ia64_do_show_stack(&info, NULL);
103 void
104 show_regs (struct pt_regs *regs)
106 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
108 print_modules();
109 printk("\n");
110 show_regs_print_info(KERN_DEFAULT);
111 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
112 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
113 init_utsname()->release);
114 print_symbol("ip is at %s\n", ip);
115 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
116 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
117 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
118 regs->ar_rnat, regs->ar_bspstore, regs->pr);
119 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
120 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
121 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
122 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
123 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
124 regs->f6.u.bits[1], regs->f6.u.bits[0],
125 regs->f7.u.bits[1], regs->f7.u.bits[0]);
126 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
127 regs->f8.u.bits[1], regs->f8.u.bits[0],
128 regs->f9.u.bits[1], regs->f9.u.bits[0]);
129 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
130 regs->f10.u.bits[1], regs->f10.u.bits[0],
131 regs->f11.u.bits[1], regs->f11.u.bits[0]);
133 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
134 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
135 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
136 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
137 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
138 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
139 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
140 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
141 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
143 if (user_mode(regs)) {
144 /* print the stacked registers */
145 unsigned long val, *bsp, ndirty;
146 int i, sof, is_nat = 0;
148 sof = regs->cr_ifs & 0x7f; /* size of frame */
149 ndirty = (regs->loadrs >> 19);
150 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
151 for (i = 0; i < sof; ++i) {
152 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
153 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
154 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
156 } else
157 show_stack(NULL, NULL);
160 /* local support for deprecated console_print */
161 void
162 console_print(const char *s)
164 printk(KERN_EMERG "%s", s);
167 void
168 do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)
170 if (fsys_mode(current, &scr->pt)) {
172 * defer signal-handling etc. until we return to
173 * privilege-level 0.
175 if (!ia64_psr(&scr->pt)->lp)
176 ia64_psr(&scr->pt)->lp = 1;
177 return;
180 #ifdef CONFIG_PERFMON
181 if (current->thread.pfm_needs_checking)
183 * Note: pfm_handle_work() allow us to call it with interrupts
184 * disabled, and may enable interrupts within the function.
186 pfm_handle_work();
187 #endif
189 /* deal with pending signal delivery */
190 if (test_thread_flag(TIF_SIGPENDING)) {
191 local_irq_enable(); /* force interrupt enable */
192 ia64_do_signal(scr, in_syscall);
195 if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) {
196 local_irq_enable(); /* force interrupt enable */
197 tracehook_notify_resume(&scr->pt);
200 /* copy user rbs to kernel rbs */
201 if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) {
202 local_irq_enable(); /* force interrupt enable */
203 ia64_sync_krbs();
206 local_irq_disable(); /* force interrupt disable */
209 static int __init nohalt_setup(char * str)
211 cpu_idle_poll_ctrl(true);
212 return 1;
214 __setup("nohalt", nohalt_setup);
216 #ifdef CONFIG_HOTPLUG_CPU
217 /* We don't actually take CPU down, just spin without interrupts. */
218 static inline void play_dead(void)
220 unsigned int this_cpu = smp_processor_id();
222 /* Ack it */
223 __this_cpu_write(cpu_state, CPU_DEAD);
225 max_xtp();
226 local_irq_disable();
227 idle_task_exit();
228 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
230 * The above is a point of no-return, the processor is
231 * expected to be in SAL loop now.
233 BUG();
235 #else
236 static inline void play_dead(void)
238 BUG();
240 #endif /* CONFIG_HOTPLUG_CPU */
242 void arch_cpu_idle_dead(void)
244 play_dead();
247 void arch_cpu_idle(void)
249 void (*mark_idle)(int) = ia64_mark_idle;
251 #ifdef CONFIG_SMP
252 min_xtp();
253 #endif
254 rmb();
255 if (mark_idle)
256 (*mark_idle)(1);
258 safe_halt();
260 if (mark_idle)
261 (*mark_idle)(0);
262 #ifdef CONFIG_SMP
263 normal_xtp();
264 #endif
267 void
268 ia64_save_extra (struct task_struct *task)
270 #ifdef CONFIG_PERFMON
271 unsigned long info;
272 #endif
274 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
275 ia64_save_debug_regs(&task->thread.dbr[0]);
277 #ifdef CONFIG_PERFMON
278 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
279 pfm_save_regs(task);
281 info = __this_cpu_read(pfm_syst_info);
282 if (info & PFM_CPUINFO_SYST_WIDE)
283 pfm_syst_wide_update_task(task, info, 0);
284 #endif
287 void
288 ia64_load_extra (struct task_struct *task)
290 #ifdef CONFIG_PERFMON
291 unsigned long info;
292 #endif
294 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
295 ia64_load_debug_regs(&task->thread.dbr[0]);
297 #ifdef CONFIG_PERFMON
298 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
299 pfm_load_regs(task);
301 info = __this_cpu_read(pfm_syst_info);
302 if (info & PFM_CPUINFO_SYST_WIDE)
303 pfm_syst_wide_update_task(task, info, 1);
304 #endif
308 * Copy the state of an ia-64 thread.
310 * We get here through the following call chain:
312 * from user-level: from kernel:
314 * <clone syscall> <some kernel call frames>
315 * sys_clone :
316 * do_fork do_fork
317 * copy_thread copy_thread
319 * This means that the stack layout is as follows:
321 * +---------------------+ (highest addr)
322 * | struct pt_regs |
323 * +---------------------+
324 * | struct switch_stack |
325 * +---------------------+
326 * | |
327 * | memory stack |
328 * | | <-- sp (lowest addr)
329 * +---------------------+
331 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
332 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
333 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
334 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
335 * the stack is page aligned and the page size is at least 4KB, this is always the case,
336 * so there is nothing to worry about.
339 copy_thread(unsigned long clone_flags,
340 unsigned long user_stack_base, unsigned long user_stack_size,
341 struct task_struct *p)
343 extern char ia64_ret_from_clone;
344 struct switch_stack *child_stack, *stack;
345 unsigned long rbs, child_rbs, rbs_size;
346 struct pt_regs *child_ptregs;
347 struct pt_regs *regs = current_pt_regs();
348 int retval = 0;
350 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
351 child_stack = (struct switch_stack *) child_ptregs - 1;
353 rbs = (unsigned long) current + IA64_RBS_OFFSET;
354 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
356 /* copy parts of thread_struct: */
357 p->thread.ksp = (unsigned long) child_stack - 16;
360 * NOTE: The calling convention considers all floating point
361 * registers in the high partition (fph) to be scratch. Since
362 * the only way to get to this point is through a system call,
363 * we know that the values in fph are all dead. Hence, there
364 * is no need to inherit the fph state from the parent to the
365 * child and all we have to do is to make sure that
366 * IA64_THREAD_FPH_VALID is cleared in the child.
368 * XXX We could push this optimization a bit further by
369 * clearing IA64_THREAD_FPH_VALID on ANY system call.
370 * However, it's not clear this is worth doing. Also, it
371 * would be a slight deviation from the normal Linux system
372 * call behavior where scratch registers are preserved across
373 * system calls (unless used by the system call itself).
375 # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
376 | IA64_THREAD_PM_VALID)
377 # define THREAD_FLAGS_TO_SET 0
378 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
379 | THREAD_FLAGS_TO_SET);
381 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
383 if (unlikely(p->flags & PF_KTHREAD)) {
384 if (unlikely(!user_stack_base)) {
385 /* fork_idle() called us */
386 return 0;
388 memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack));
389 child_stack->r4 = user_stack_base; /* payload */
390 child_stack->r5 = user_stack_size; /* argument */
392 * Preserve PSR bits, except for bits 32-34 and 37-45,
393 * which we can't read.
395 child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
396 /* mark as valid, empty frame */
397 child_ptregs->cr_ifs = 1UL << 63;
398 child_stack->ar_fpsr = child_ptregs->ar_fpsr
399 = ia64_getreg(_IA64_REG_AR_FPSR);
400 child_stack->pr = (1 << PRED_KERNEL_STACK);
401 child_stack->ar_bspstore = child_rbs;
402 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
404 /* stop some PSR bits from being inherited.
405 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
406 * therefore we must specify them explicitly here and not include them in
407 * IA64_PSR_BITS_TO_CLEAR.
409 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
410 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
412 return 0;
414 stack = ((struct switch_stack *) regs) - 1;
415 /* copy parent's switch_stack & pt_regs to child: */
416 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
418 /* copy the parent's register backing store to the child: */
419 rbs_size = stack->ar_bspstore - rbs;
420 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
421 if (clone_flags & CLONE_SETTLS)
422 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
423 if (user_stack_base) {
424 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
425 child_ptregs->ar_bspstore = user_stack_base;
426 child_ptregs->ar_rnat = 0;
427 child_ptregs->loadrs = 0;
429 child_stack->ar_bspstore = child_rbs + rbs_size;
430 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
432 /* stop some PSR bits from being inherited.
433 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
434 * therefore we must specify them explicitly here and not include them in
435 * IA64_PSR_BITS_TO_CLEAR.
437 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
438 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
440 #ifdef CONFIG_PERFMON
441 if (current->thread.pfm_context)
442 pfm_inherit(p, child_ptregs);
443 #endif
444 return retval;
447 static void
448 do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
450 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
451 unsigned long uninitialized_var(ip); /* GCC be quiet */
452 elf_greg_t *dst = arg;
453 struct pt_regs *pt;
454 char nat;
455 int i;
457 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
459 if (unw_unwind_to_user(info) < 0)
460 return;
462 unw_get_sp(info, &sp);
463 pt = (struct pt_regs *) (sp + 16);
465 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
467 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
468 return;
470 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
471 &ar_rnat);
474 * coredump format:
475 * r0-r31
476 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
477 * predicate registers (p0-p63)
478 * b0-b7
479 * ip cfm user-mask
480 * ar.rsc ar.bsp ar.bspstore ar.rnat
481 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
484 /* r0 is zero */
485 for (i = 1, mask = (1UL << i); i < 32; ++i) {
486 unw_get_gr(info, i, &dst[i], &nat);
487 if (nat)
488 nat_bits |= mask;
489 mask <<= 1;
491 dst[32] = nat_bits;
492 unw_get_pr(info, &dst[33]);
494 for (i = 0; i < 8; ++i)
495 unw_get_br(info, i, &dst[34 + i]);
497 unw_get_rp(info, &ip);
498 dst[42] = ip + ia64_psr(pt)->ri;
499 dst[43] = cfm;
500 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
502 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
504 * For bsp and bspstore, unw_get_ar() would return the kernel
505 * addresses, but we need the user-level addresses instead:
507 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
508 dst[47] = pt->ar_bspstore;
509 dst[48] = ar_rnat;
510 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
511 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
512 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
513 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
514 unw_get_ar(info, UNW_AR_LC, &dst[53]);
515 unw_get_ar(info, UNW_AR_EC, &dst[54]);
516 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
517 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
520 void
521 do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
523 elf_fpreg_t *dst = arg;
524 int i;
526 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
528 if (unw_unwind_to_user(info) < 0)
529 return;
531 /* f0 is 0.0, f1 is 1.0 */
533 for (i = 2; i < 32; ++i)
534 unw_get_fr(info, i, dst + i);
536 ia64_flush_fph(task);
537 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
538 memcpy(dst + 32, task->thread.fph, 96*16);
541 void
542 do_copy_regs (struct unw_frame_info *info, void *arg)
544 do_copy_task_regs(current, info, arg);
547 void
548 do_dump_fpu (struct unw_frame_info *info, void *arg)
550 do_dump_task_fpu(current, info, arg);
553 void
554 ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
556 unw_init_running(do_copy_regs, dst);
560 dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
562 unw_init_running(do_dump_fpu, dst);
563 return 1; /* f0-f31 are always valid so we always return 1 */
567 * Flush thread state. This is called when a thread does an execve().
569 void
570 flush_thread (void)
572 /* drop floating-point and debug-register state if it exists: */
573 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
574 ia64_drop_fpu(current);
578 * Clean up state associated with a thread. This is called when
579 * the thread calls exit().
581 void
582 exit_thread (struct task_struct *tsk)
585 ia64_drop_fpu(tsk);
586 #ifdef CONFIG_PERFMON
587 /* if needed, stop monitoring and flush state to perfmon context */
588 if (tsk->thread.pfm_context)
589 pfm_exit_thread(tsk);
591 /* free debug register resources */
592 if (tsk->thread.flags & IA64_THREAD_DBG_VALID)
593 pfm_release_debug_registers(tsk);
594 #endif
597 unsigned long
598 get_wchan (struct task_struct *p)
600 struct unw_frame_info info;
601 unsigned long ip;
602 int count = 0;
604 if (!p || p == current || p->state == TASK_RUNNING)
605 return 0;
608 * Note: p may not be a blocked task (it could be current or
609 * another process running on some other CPU. Rather than
610 * trying to determine if p is really blocked, we just assume
611 * it's blocked and rely on the unwind routines to fail
612 * gracefully if the process wasn't really blocked after all.
613 * --davidm 99/12/15
615 unw_init_from_blocked_task(&info, p);
616 do {
617 if (p->state == TASK_RUNNING)
618 return 0;
619 if (unw_unwind(&info) < 0)
620 return 0;
621 unw_get_ip(&info, &ip);
622 if (!in_sched_functions(ip))
623 return ip;
624 } while (count++ < 16);
625 return 0;
628 void
629 cpu_halt (void)
631 pal_power_mgmt_info_u_t power_info[8];
632 unsigned long min_power;
633 int i, min_power_state;
635 if (ia64_pal_halt_info(power_info) != 0)
636 return;
638 min_power_state = 0;
639 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
640 for (i = 1; i < 8; ++i)
641 if (power_info[i].pal_power_mgmt_info_s.im
642 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
643 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
644 min_power_state = i;
647 while (1)
648 ia64_pal_halt(min_power_state);
651 void machine_shutdown(void)
653 #ifdef CONFIG_HOTPLUG_CPU
654 int cpu;
656 for_each_online_cpu(cpu) {
657 if (cpu != smp_processor_id())
658 cpu_down(cpu);
660 #endif
661 #ifdef CONFIG_KEXEC
662 kexec_disable_iosapic();
663 #endif
666 void
667 machine_restart (char *restart_cmd)
669 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
670 efi_reboot(REBOOT_WARM, NULL);
673 void
674 machine_halt (void)
676 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
677 cpu_halt();
680 void
681 machine_power_off (void)
683 if (pm_power_off)
684 pm_power_off();
685 machine_halt();