2 * Hibernation support for x86-64
4 * Distribute under GPLv2
6 * Copyright (c) 2007 Rafael J. Wysocki <rjw@sisk.pl>
7 * Copyright (c) 2002 Pavel Machek <pavel@ucw.cz>
8 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
11 #include <linux/gfp.h>
12 #include <linux/smp.h>
13 #include <linux/suspend.h>
14 #include <linux/scatterlist.h>
15 #include <linux/kdebug.h>
16 #include <linux/cpu.h>
18 #include <crypto/hash.h>
20 #include <asm/e820/api.h>
22 #include <asm/proto.h>
24 #include <asm/pgtable.h>
26 #include <asm/sections.h>
27 #include <asm/suspend.h>
28 #include <asm/tlbflush.h>
30 /* Defined in hibernate_asm_64.S */
31 extern asmlinkage __visible
int restore_image(void);
34 * Address to jump to in the last phase of restore in order to get to the image
35 * kernel's text (this value is passed in the image header).
37 unsigned long restore_jump_address __visible
;
38 unsigned long jump_address_phys
;
41 * Value of the cr3 register from before the hibernation (this value is passed
42 * in the image header).
44 unsigned long restore_cr3 __visible
;
46 unsigned long temp_level4_pgt __visible
;
48 unsigned long relocated_restore_code __visible
;
50 static int set_up_temporary_text_mapping(pgd_t
*pgd
)
57 * The new mapping only has to cover the page containing the image
58 * kernel's entry point (jump_address_phys), because the switch over to
59 * it is carried out by relocated code running from a page allocated
60 * specifically for this purpose and covered by the identity mapping, so
61 * the temporary kernel text mapping is only needed for the final jump.
62 * Moreover, in that mapping the virtual address of the image kernel's
63 * entry point must be the same as its virtual address in the image
64 * kernel (restore_jump_address), so the image kernel's
65 * restore_registers() code doesn't find itself in a different area of
66 * the virtual address space after switching over to the original page
67 * tables used by the image kernel.
70 if (IS_ENABLED(CONFIG_X86_5LEVEL
)) {
71 p4d
= (p4d_t
*)get_safe_page(GFP_ATOMIC
);
76 pud
= (pud_t
*)get_safe_page(GFP_ATOMIC
);
80 pmd
= (pmd_t
*)get_safe_page(GFP_ATOMIC
);
84 set_pmd(pmd
+ pmd_index(restore_jump_address
),
85 __pmd((jump_address_phys
& PMD_MASK
) | __PAGE_KERNEL_LARGE_EXEC
));
86 set_pud(pud
+ pud_index(restore_jump_address
),
87 __pud(__pa(pmd
) | _KERNPG_TABLE
));
88 if (IS_ENABLED(CONFIG_X86_5LEVEL
)) {
89 set_p4d(p4d
+ p4d_index(restore_jump_address
), __p4d(__pa(pud
) | _KERNPG_TABLE
));
90 set_pgd(pgd
+ pgd_index(restore_jump_address
), __pgd(__pa(p4d
) | _KERNPG_TABLE
));
92 /* No p4d for 4-level paging: point the pgd to the pud page table */
93 set_pgd(pgd
+ pgd_index(restore_jump_address
), __pgd(__pa(pud
) | _KERNPG_TABLE
));
99 static void *alloc_pgt_page(void *context
)
101 return (void *)get_safe_page(GFP_ATOMIC
);
104 static int set_up_temporary_mappings(void)
106 struct x86_mapping_info info
= {
107 .alloc_pgt_page
= alloc_pgt_page
,
108 .page_flag
= __PAGE_KERNEL_LARGE_EXEC
,
109 .offset
= __PAGE_OFFSET
,
111 unsigned long mstart
, mend
;
116 pgd
= (pgd_t
*)get_safe_page(GFP_ATOMIC
);
120 /* Prepare a temporary mapping for the kernel text */
121 result
= set_up_temporary_text_mapping(pgd
);
125 /* Set up the direct mapping from scratch */
126 for (i
= 0; i
< nr_pfn_mapped
; i
++) {
127 mstart
= pfn_mapped
[i
].start
<< PAGE_SHIFT
;
128 mend
= pfn_mapped
[i
].end
<< PAGE_SHIFT
;
130 result
= kernel_ident_mapping_init(&info
, pgd
, mstart
, mend
);
135 temp_level4_pgt
= __pa(pgd
);
139 static int relocate_restore_code(void)
147 relocated_restore_code
= get_safe_page(GFP_ATOMIC
);
148 if (!relocated_restore_code
)
151 memcpy((void *)relocated_restore_code
, core_restore_code
, PAGE_SIZE
);
153 /* Make the page containing the relocated code executable */
154 pgd
= (pgd_t
*)__va(read_cr3_pa()) +
155 pgd_index(relocated_restore_code
);
156 p4d
= p4d_offset(pgd
, relocated_restore_code
);
157 if (p4d_large(*p4d
)) {
158 set_p4d(p4d
, __p4d(p4d_val(*p4d
) & ~_PAGE_NX
));
161 pud
= pud_offset(p4d
, relocated_restore_code
);
162 if (pud_large(*pud
)) {
163 set_pud(pud
, __pud(pud_val(*pud
) & ~_PAGE_NX
));
166 pmd
= pmd_offset(pud
, relocated_restore_code
);
167 if (pmd_large(*pmd
)) {
168 set_pmd(pmd
, __pmd(pmd_val(*pmd
) & ~_PAGE_NX
));
171 pte
= pte_offset_kernel(pmd
, relocated_restore_code
);
172 set_pte(pte
, __pte(pte_val(*pte
) & ~_PAGE_NX
));
178 asmlinkage
int swsusp_arch_resume(void)
182 /* We have got enough memory and from now on we cannot recover */
183 error
= set_up_temporary_mappings();
187 error
= relocate_restore_code();
196 * pfn_is_nosave - check if given pfn is in the 'nosave' section
199 int pfn_is_nosave(unsigned long pfn
)
201 unsigned long nosave_begin_pfn
= __pa_symbol(&__nosave_begin
) >> PAGE_SHIFT
;
202 unsigned long nosave_end_pfn
= PAGE_ALIGN(__pa_symbol(&__nosave_end
)) >> PAGE_SHIFT
;
203 return (pfn
>= nosave_begin_pfn
) && (pfn
< nosave_end_pfn
);
206 #define MD5_DIGEST_SIZE 16
208 struct restore_data_record
{
209 unsigned long jump_address
;
210 unsigned long jump_address_phys
;
213 u8 e820_digest
[MD5_DIGEST_SIZE
];
216 #define RESTORE_MAGIC 0x23456789ABCDEF01UL
218 #if IS_BUILTIN(CONFIG_CRYPTO_MD5)
220 * get_e820_md5 - calculate md5 according to given e820 table
222 * @table: the e820 table to be calculated
223 * @buf: the md5 result to be stored to
225 static int get_e820_md5(struct e820_table
*table
, void *buf
)
227 struct scatterlist sg
;
228 struct crypto_ahash
*tfm
;
232 tfm
= crypto_alloc_ahash("md5", 0, CRYPTO_ALG_ASYNC
);
237 AHASH_REQUEST_ON_STACK(req
, tfm
);
238 size
= offsetof(struct e820_table
, entries
) + sizeof(struct e820_entry
) * table
->nr_entries
;
239 ahash_request_set_tfm(req
, tfm
);
240 sg_init_one(&sg
, (u8
*)table
, size
);
241 ahash_request_set_callback(req
, 0, NULL
, NULL
);
242 ahash_request_set_crypt(req
, &sg
, buf
, size
);
244 if (crypto_ahash_digest(req
))
246 ahash_request_zero(req
);
248 crypto_free_ahash(tfm
);
253 static int hibernation_e820_save(void *buf
)
255 return get_e820_md5(e820_table_firmware
, buf
);
258 static bool hibernation_e820_mismatch(void *buf
)
261 u8 result
[MD5_DIGEST_SIZE
];
263 memset(result
, 0, MD5_DIGEST_SIZE
);
264 /* If there is no digest in suspend kernel, let it go. */
265 if (!memcmp(result
, buf
, MD5_DIGEST_SIZE
))
268 ret
= get_e820_md5(e820_table_firmware
, result
);
272 return memcmp(result
, buf
, MD5_DIGEST_SIZE
) ? true : false;
275 static int hibernation_e820_save(void *buf
)
280 static bool hibernation_e820_mismatch(void *buf
)
282 /* If md5 is not builtin for restore kernel, let it go. */
288 * arch_hibernation_header_save - populate the architecture specific part
289 * of a hibernation image header
290 * @addr: address to save the data at
292 int arch_hibernation_header_save(void *addr
, unsigned int max_size
)
294 struct restore_data_record
*rdr
= addr
;
296 if (max_size
< sizeof(struct restore_data_record
))
298 rdr
->jump_address
= (unsigned long)restore_registers
;
299 rdr
->jump_address_phys
= __pa_symbol(restore_registers
);
302 * The restore code fixes up CR3 and CR4 in the following sequence:
304 * [in hibernation asm]
305 * 1. CR3 <= temporary page tables
306 * 2. CR4 <= mmu_cr4_features (from the kernel that restores us)
308 * 4. CR4 <= mmu_cr4_features (from us, i.e. the image kernel)
309 * [in restore_processor_state()]
310 * 5. CR4 <= saved CR4
311 * 6. CR3 <= saved CR3
313 * Our mmu_cr4_features has CR4.PCIDE=0, and toggling
314 * CR4.PCIDE while CR3's PCID bits are nonzero is illegal, so
315 * rdr->cr3 needs to point to valid page tables but must not
316 * have any of the PCID bits set.
318 rdr
->cr3
= restore_cr3
& ~CR3_PCID_MASK
;
320 rdr
->magic
= RESTORE_MAGIC
;
322 return hibernation_e820_save(rdr
->e820_digest
);
326 * arch_hibernation_header_restore - read the architecture specific data
327 * from the hibernation image header
328 * @addr: address to read the data from
330 int arch_hibernation_header_restore(void *addr
)
332 struct restore_data_record
*rdr
= addr
;
334 restore_jump_address
= rdr
->jump_address
;
335 jump_address_phys
= rdr
->jump_address_phys
;
336 restore_cr3
= rdr
->cr3
;
338 if (rdr
->magic
!= RESTORE_MAGIC
) {
339 pr_crit("Unrecognized hibernate image header format!\n");
343 if (hibernation_e820_mismatch(rdr
->e820_digest
)) {
344 pr_crit("Hibernate inconsistent memory map detected!\n");
351 int arch_resume_nosmt(void)
355 * We reached this while coming out of hibernation. This means
356 * that SMT siblings are sleeping in hlt, as mwait is not safe
357 * against control transition during resume (see comment in
358 * hibernate_resume_nonboot_cpu_disable()).
360 * If the resumed kernel has SMT disabled, we have to take all the
361 * SMT siblings out of hlt, and offline them again so that they
362 * end up in mwait proper.
364 * Called with hotplug disabled.
366 cpu_hotplug_enable();
367 if (cpu_smt_control
== CPU_SMT_DISABLED
||
368 cpu_smt_control
== CPU_SMT_FORCE_DISABLED
) {
369 enum cpuhp_smt_control old
= cpu_smt_control
;
371 ret
= cpuhp_smt_enable();
374 ret
= cpuhp_smt_disable(old
);
379 cpu_hotplug_disable();