1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Asm versions of Xen pv-ops, suitable for direct use.
5 * We only bother with direct forms (ie, vcpu in pda) of the
6 * operations here; the indirect forms are better handled in C.
9 #include <asm/thread_info.h>
10 #include <asm/processor-flags.h>
11 #include <asm/segment.h>
14 #include <xen/interface/xen.h>
16 #include <linux/linkage.h>
18 /* Pseudo-flag used for virtual NMI, which we don't implement yet */
19 #define XEN_EFLAGS_NMI 0x80000000
22 * This is run where a normal iret would be run, with the same stack setup:
27 * This attempts to make sure that any pending events are dealt with
28 * on return to usermode, but there is a small window in which an
29 * event can happen just before entering usermode. If the nested
30 * interrupt ends up setting one of the TIF_WORK_MASK pending work
31 * flags, they will not be tested again before returning to
32 * usermode. This means that a process can end up with pending work,
33 * which will be unprocessed until the process enters and leaves the
34 * kernel again, which could be an unbounded amount of time. This
35 * means that a pending signal or reschedule event could be
36 * indefinitely delayed.
38 * The fix is to notice a nested interrupt in the critical window, and
39 * if one occurs, then fold the nested interrupt into the current
40 * interrupt stack frame, and re-process it iteratively rather than
41 * recursively. This means that it will exit via the normal path, and
42 * all pending work will be dealt with appropriately.
44 * Because the nested interrupt handler needs to deal with the current
45 * stack state in whatever form its in, we keep things simple by only
46 * using a single register which is pushed/popped on the stack.
52 .pushsection .fixup, "ax"
60 /* test eflags for special cases */
61 testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
65 ESP_OFFSET=4 # bytes pushed onto stack
67 /* Store vcpu_info pointer for easy access */
70 movl $(__KERNEL_PERCPU), %eax
72 movl %fs:xen_vcpu, %eax
75 movl %ss:xen_vcpu, %eax
78 /* check IF state we're restoring */
79 testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
82 * Maybe enable events. Once this happens we could get a
83 * recursive event, so the critical region starts immediately
84 * afterwards. However, if that happens we don't end up
85 * resuming the code, so we don't have to be worried about
86 * being preempted to another CPU.
88 setz %ss:XEN_vcpu_info_mask(%eax)
91 /* check for unmasked and pending */
92 cmpw $0x0001, %ss:XEN_vcpu_info_pending(%eax)
95 * If there's something pending, mask events again so we can
96 * jump back into xen_hypervisor_callback. Otherwise do not
97 * touch XEN_vcpu_info_mask.
100 movb $1, %ss:XEN_vcpu_info_mask(%eax)
105 * From this point on the registers are restored and the stack
106 * updated, so we don't need to worry about it if we're
112 * Jump to hypervisor_callback after fixing up the stack.
113 * Events are masked, so jumping out of the critical region is
116 je xen_hypervisor_callback
120 _ASM_EXTABLE(1b, iret_exc)
123 /* put this out of line since its very rarely used */
124 jmp hypercall_page + __HYPERVISOR_iret * 32
126 .globl xen_iret_start_crit, xen_iret_end_crit
129 * This is called by xen_hypervisor_callback in entry.S when it sees
130 * that the EIP at the time of interrupt was between
131 * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in
132 * %eax so we can do a more refined determination of what to do.
134 * The stack format at this point is:
136 * ss : (ss/esp may be present if we came from usermode)
138 * eflags } outer exception info
141 * ---------------- <- edi (copy dest)
142 * eax : outer eax if it hasn't been restored
144 * eflags } nested exception info
145 * cs } (no ss/esp because we're nested
146 * eip } from the same ring)
147 * orig_eax }<- esi (copy src)
151 * ds } SAVE_ALL state
157 * In order to deliver the nested exception properly, we need to shift
158 * everything from the return addr up to the error code so it sits
159 * just under the outer exception info. This means that when we
160 * handle the exception, we do it in the context of the outer
161 * exception rather than starting a new one.
163 * The only caveat is that if the outer eax hasn't been restored yet
164 * (ie, it's still on stack), we need to insert its value into the
165 * SAVE_ALL state before going on, since it's usermode state which we
166 * eventually need to restore.
168 ENTRY(xen_iret_crit_fixup)
170 * Paranoia: Make sure we're really coming from kernel space.
171 * One could imagine a case where userspace jumps into the
172 * critical range address, but just before the CPU delivers a
173 * GP, it decides to deliver an interrupt instead. Unlikely?
174 * Definitely. Easy to avoid? Yes. The Intel documents
175 * explicitly say that the reported EIP for a bad jump is the
176 * jump instruction itself, not the destination, but some
177 * virtual environments get this wrong.
179 movl PT_CS(%esp), %ecx
180 andl $SEGMENT_RPL_MASK, %ecx
184 lea PT_ORIG_EAX(%esp), %esi
185 lea PT_EFLAGS(%esp), %edi
188 * If eip is before iret_restore_end then stack
189 * hasn't been restored yet.
191 cmp $iret_restore_end, %eax
194 movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */
195 movl %eax, PT_EAX(%esp)
197 lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
199 /* set up the copy */
201 mov $PT_EIP / 4, %ecx /* saved regs up to orig_eax */
205 lea 4(%edi), %esp /* point esp to new frame */