Linux 4.2.2
[linux/fpc-iii.git] / arch / mips / jz4740 / time.c
blob7ab47fee1be8fdf24ae76dd3a0787221890eaa10
1 /*
2 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 platform time support
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/time.h>
22 #include <linux/clockchips.h>
23 #include <linux/sched_clock.h>
25 #include <asm/mach-jz4740/clock.h>
26 #include <asm/mach-jz4740/irq.h>
27 #include <asm/mach-jz4740/timer.h>
28 #include <asm/time.h>
30 #include "clock.h"
32 #define TIMER_CLOCKEVENT 0
33 #define TIMER_CLOCKSOURCE 1
35 static uint16_t jz4740_jiffies_per_tick;
37 static cycle_t jz4740_clocksource_read(struct clocksource *cs)
39 return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
42 static struct clocksource jz4740_clocksource = {
43 .name = "jz4740-timer",
44 .rating = 200,
45 .read = jz4740_clocksource_read,
46 .mask = CLOCKSOURCE_MASK(16),
47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
50 static u64 notrace jz4740_read_sched_clock(void)
52 return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
55 static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
57 struct clock_event_device *cd = devid;
59 jz4740_timer_ack_full(TIMER_CLOCKEVENT);
61 if (cd->mode != CLOCK_EVT_MODE_PERIODIC)
62 jz4740_timer_disable(TIMER_CLOCKEVENT);
64 cd->event_handler(cd);
66 return IRQ_HANDLED;
69 static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
70 struct clock_event_device *cd)
72 switch (mode) {
73 case CLOCK_EVT_MODE_PERIODIC:
74 jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
75 jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
76 case CLOCK_EVT_MODE_RESUME:
77 jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
78 jz4740_timer_enable(TIMER_CLOCKEVENT);
79 break;
80 case CLOCK_EVT_MODE_ONESHOT:
81 case CLOCK_EVT_MODE_SHUTDOWN:
82 jz4740_timer_disable(TIMER_CLOCKEVENT);
83 break;
84 default:
85 break;
89 static int jz4740_clockevent_set_next(unsigned long evt,
90 struct clock_event_device *cd)
92 jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
93 jz4740_timer_set_period(TIMER_CLOCKEVENT, evt);
94 jz4740_timer_enable(TIMER_CLOCKEVENT);
96 return 0;
99 static struct clock_event_device jz4740_clockevent = {
100 .name = "jz4740-timer",
101 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
102 .set_next_event = jz4740_clockevent_set_next,
103 .set_mode = jz4740_clockevent_set_mode,
104 .rating = 200,
105 #ifdef CONFIG_MACH_JZ4740
106 .irq = JZ4740_IRQ_TCU0,
107 #endif
108 #ifdef CONFIG_MACH_JZ4780
109 .irq = JZ4780_IRQ_TCU2,
110 #endif
113 static struct irqaction timer_irqaction = {
114 .handler = jz4740_clockevent_irq,
115 .flags = IRQF_PERCPU | IRQF_TIMER,
116 .name = "jz4740-timerirq",
117 .dev_id = &jz4740_clockevent,
120 void __init plat_time_init(void)
122 int ret;
123 uint32_t clk_rate;
124 uint16_t ctrl;
125 struct clk *ext_clk;
127 of_clk_init(NULL);
128 jz4740_timer_init();
130 ext_clk = clk_get(NULL, "ext");
131 if (IS_ERR(ext_clk))
132 panic("unable to get ext clock");
133 clk_rate = clk_get_rate(ext_clk) >> 4;
134 clk_put(ext_clk);
136 jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
138 clockevent_set_clock(&jz4740_clockevent, clk_rate);
139 jz4740_clockevent.min_delta_ns = clockevent_delta2ns(100, &jz4740_clockevent);
140 jz4740_clockevent.max_delta_ns = clockevent_delta2ns(0xffff, &jz4740_clockevent);
141 jz4740_clockevent.cpumask = cpumask_of(0);
143 clockevents_register_device(&jz4740_clockevent);
145 ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
147 if (ret)
148 printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
150 sched_clock_register(jz4740_read_sched_clock, 16, clk_rate);
152 setup_irq(jz4740_clockevent.irq, &timer_irqaction);
154 ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;
156 jz4740_timer_set_ctrl(TIMER_CLOCKEVENT, ctrl);
157 jz4740_timer_set_ctrl(TIMER_CLOCKSOURCE, ctrl);
159 jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
160 jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
162 jz4740_timer_set_period(TIMER_CLOCKSOURCE, 0xffff);
164 jz4740_timer_enable(TIMER_CLOCKEVENT);
165 jz4740_timer_enable(TIMER_CLOCKSOURCE);