2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/cacheflush.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
22 * We need to define the tracepoints somewhere, and tlb.c
23 * is only compied when SMP=y.
25 #define CREATE_TRACE_POINTS
26 #include <trace/events/tlb.h>
28 #include "mm_internal.h"
31 * Tables translating between page_cache_type_t and pte encoding.
33 * Minimal supported modes are defined statically, they are modified
34 * during bootup if more supported cache modes are available.
36 * Index into __cachemode2pte_tbl[] is the cachemode.
38 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
39 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
41 uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
] = {
42 [_PAGE_CACHE_MODE_WB
] = 0 | 0 ,
43 [_PAGE_CACHE_MODE_WC
] = 0 | _PAGE_PCD
,
44 [_PAGE_CACHE_MODE_UC_MINUS
] = 0 | _PAGE_PCD
,
45 [_PAGE_CACHE_MODE_UC
] = _PAGE_PWT
| _PAGE_PCD
,
46 [_PAGE_CACHE_MODE_WT
] = 0 | _PAGE_PCD
,
47 [_PAGE_CACHE_MODE_WP
] = 0 | _PAGE_PCD
,
49 EXPORT_SYMBOL(__cachemode2pte_tbl
);
51 uint8_t __pte2cachemode_tbl
[8] = {
52 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB
,
53 [__pte2cm_idx(_PAGE_PWT
| 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
54 [__pte2cm_idx( 0 | _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
55 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC
,
56 [__pte2cm_idx( 0 | 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_WB
,
57 [__pte2cm_idx(_PAGE_PWT
| 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
58 [__pte2cm_idx(0 | _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
59 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC
,
61 EXPORT_SYMBOL(__pte2cachemode_tbl
);
63 static unsigned long __initdata pgt_buf_start
;
64 static unsigned long __initdata pgt_buf_end
;
65 static unsigned long __initdata pgt_buf_top
;
67 static unsigned long min_pfn_mapped
;
69 static bool __initdata can_use_brk_pgt
= true;
72 * Pages returned are already directly mapped.
74 * Changing that is likely to break Xen, see commit:
76 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
78 * for detailed information.
80 __ref
void *alloc_low_pages(unsigned int num
)
88 order
= get_order((unsigned long)num
<< PAGE_SHIFT
);
89 return (void *)__get_free_pages(GFP_ATOMIC
| __GFP_NOTRACK
|
93 if ((pgt_buf_end
+ num
) > pgt_buf_top
|| !can_use_brk_pgt
) {
95 if (min_pfn_mapped
>= max_pfn_mapped
)
96 panic("alloc_low_pages: ran out of memory");
97 ret
= memblock_find_in_range(min_pfn_mapped
<< PAGE_SHIFT
,
98 max_pfn_mapped
<< PAGE_SHIFT
,
99 PAGE_SIZE
* num
, PAGE_SIZE
);
101 panic("alloc_low_pages: can not alloc memory");
102 memblock_reserve(ret
, PAGE_SIZE
* num
);
103 pfn
= ret
>> PAGE_SHIFT
;
107 printk(KERN_DEBUG
"BRK [%#010lx, %#010lx] PGTABLE\n",
108 pfn
<< PAGE_SHIFT
, (pgt_buf_end
<< PAGE_SHIFT
) - 1);
111 for (i
= 0; i
< num
; i
++) {
114 adr
= __va((pfn
+ i
) << PAGE_SHIFT
);
118 return __va(pfn
<< PAGE_SHIFT
);
121 /* need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS */
122 #define INIT_PGT_BUF_SIZE (6 * PAGE_SIZE)
123 RESERVE_BRK(early_pgt_alloc
, INIT_PGT_BUF_SIZE
);
124 void __init
early_alloc_pgt_buf(void)
126 unsigned long tables
= INIT_PGT_BUF_SIZE
;
129 base
= __pa(extend_brk(tables
, PAGE_SIZE
));
131 pgt_buf_start
= base
>> PAGE_SHIFT
;
132 pgt_buf_end
= pgt_buf_start
;
133 pgt_buf_top
= pgt_buf_start
+ (tables
>> PAGE_SHIFT
);
138 early_param_on_off("gbpages", "nogbpages", direct_gbpages
, CONFIG_X86_DIRECT_GBPAGES
);
143 unsigned page_size_mask
;
146 static int page_size_mask
;
148 static void __init
probe_page_size_mask(void)
150 #if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
152 * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
153 * This will simplify cpa(), which otherwise needs to support splitting
154 * large pages into small in interrupt context, etc.
157 page_size_mask
|= 1 << PG_LEVEL_2M
;
160 /* Enable PSE if available */
162 cr4_set_bits_and_update_boot(X86_CR4_PSE
);
164 /* Enable PGE if available */
166 cr4_set_bits_and_update_boot(X86_CR4_PGE
);
167 __supported_pte_mask
|= _PAGE_GLOBAL
;
169 __supported_pte_mask
&= ~_PAGE_GLOBAL
;
171 /* Enable 1 GB linear kernel mappings if available: */
172 if (direct_gbpages
&& cpu_has_gbpages
) {
173 printk(KERN_INFO
"Using GB pages for direct mapping\n");
174 page_size_mask
|= 1 << PG_LEVEL_1G
;
181 #define NR_RANGE_MR 3
182 #else /* CONFIG_X86_64 */
183 #define NR_RANGE_MR 5
186 static int __meminit
save_mr(struct map_range
*mr
, int nr_range
,
187 unsigned long start_pfn
, unsigned long end_pfn
,
188 unsigned long page_size_mask
)
190 if (start_pfn
< end_pfn
) {
191 if (nr_range
>= NR_RANGE_MR
)
192 panic("run out of range for init_memory_mapping\n");
193 mr
[nr_range
].start
= start_pfn
<<PAGE_SHIFT
;
194 mr
[nr_range
].end
= end_pfn
<<PAGE_SHIFT
;
195 mr
[nr_range
].page_size_mask
= page_size_mask
;
203 * adjust the page_size_mask for small range to go with
204 * big page size instead small one if nearby are ram too.
206 static void __init_refok
adjust_range_page_size_mask(struct map_range
*mr
,
211 for (i
= 0; i
< nr_range
; i
++) {
212 if ((page_size_mask
& (1<<PG_LEVEL_2M
)) &&
213 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_2M
))) {
214 unsigned long start
= round_down(mr
[i
].start
, PMD_SIZE
);
215 unsigned long end
= round_up(mr
[i
].end
, PMD_SIZE
);
218 if ((end
>> PAGE_SHIFT
) > max_low_pfn
)
222 if (memblock_is_region_memory(start
, end
- start
))
223 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_2M
;
225 if ((page_size_mask
& (1<<PG_LEVEL_1G
)) &&
226 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_1G
))) {
227 unsigned long start
= round_down(mr
[i
].start
, PUD_SIZE
);
228 unsigned long end
= round_up(mr
[i
].end
, PUD_SIZE
);
230 if (memblock_is_region_memory(start
, end
- start
))
231 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_1G
;
236 static const char *page_size_string(struct map_range
*mr
)
238 static const char str_1g
[] = "1G";
239 static const char str_2m
[] = "2M";
240 static const char str_4m
[] = "4M";
241 static const char str_4k
[] = "4k";
243 if (mr
->page_size_mask
& (1<<PG_LEVEL_1G
))
246 * 32-bit without PAE has a 4M large page size.
247 * PG_LEVEL_2M is misnamed, but we can at least
248 * print out the right size in the string.
250 if (IS_ENABLED(CONFIG_X86_32
) &&
251 !IS_ENABLED(CONFIG_X86_PAE
) &&
252 mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
255 if (mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
261 static int __meminit
split_mem_range(struct map_range
*mr
, int nr_range
,
265 unsigned long start_pfn
, end_pfn
, limit_pfn
;
269 limit_pfn
= PFN_DOWN(end
);
271 /* head if not big page alignment ? */
272 pfn
= start_pfn
= PFN_DOWN(start
);
275 * Don't use a large page for the first 2/4MB of memory
276 * because there are often fixed size MTRRs in there
277 * and overlapping MTRRs into large pages can cause
281 end_pfn
= PFN_DOWN(PMD_SIZE
);
283 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
284 #else /* CONFIG_X86_64 */
285 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
287 if (end_pfn
> limit_pfn
)
289 if (start_pfn
< end_pfn
) {
290 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
294 /* big page (2M) range */
295 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
297 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
298 #else /* CONFIG_X86_64 */
299 end_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
300 if (end_pfn
> round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
)))
301 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
304 if (start_pfn
< end_pfn
) {
305 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
306 page_size_mask
& (1<<PG_LEVEL_2M
));
311 /* big page (1G) range */
312 start_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
313 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PUD_SIZE
));
314 if (start_pfn
< end_pfn
) {
315 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
317 ((1<<PG_LEVEL_2M
)|(1<<PG_LEVEL_1G
)));
321 /* tail is not big page (1G) alignment */
322 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
323 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
324 if (start_pfn
< end_pfn
) {
325 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
326 page_size_mask
& (1<<PG_LEVEL_2M
));
331 /* tail is not big page (2M) alignment */
334 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
337 adjust_range_page_size_mask(mr
, nr_range
);
339 /* try to merge same page size and continuous */
340 for (i
= 0; nr_range
> 1 && i
< nr_range
- 1; i
++) {
341 unsigned long old_start
;
342 if (mr
[i
].end
!= mr
[i
+1].start
||
343 mr
[i
].page_size_mask
!= mr
[i
+1].page_size_mask
)
346 old_start
= mr
[i
].start
;
347 memmove(&mr
[i
], &mr
[i
+1],
348 (nr_range
- 1 - i
) * sizeof(struct map_range
));
349 mr
[i
--].start
= old_start
;
353 for (i
= 0; i
< nr_range
; i
++)
354 printk(KERN_DEBUG
" [mem %#010lx-%#010lx] page %s\n",
355 mr
[i
].start
, mr
[i
].end
- 1,
356 page_size_string(&mr
[i
]));
361 struct range pfn_mapped
[E820_X_MAX
];
364 static void add_pfn_range_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
366 nr_pfn_mapped
= add_range_with_merge(pfn_mapped
, E820_X_MAX
,
367 nr_pfn_mapped
, start_pfn
, end_pfn
);
368 nr_pfn_mapped
= clean_sort_range(pfn_mapped
, E820_X_MAX
);
370 max_pfn_mapped
= max(max_pfn_mapped
, end_pfn
);
372 if (start_pfn
< (1UL<<(32-PAGE_SHIFT
)))
373 max_low_pfn_mapped
= max(max_low_pfn_mapped
,
374 min(end_pfn
, 1UL<<(32-PAGE_SHIFT
)));
377 bool pfn_range_is_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
381 for (i
= 0; i
< nr_pfn_mapped
; i
++)
382 if ((start_pfn
>= pfn_mapped
[i
].start
) &&
383 (end_pfn
<= pfn_mapped
[i
].end
))
390 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
391 * This runs before bootmem is initialized and gets pages directly from
392 * the physical memory. To access them they are temporarily mapped.
394 unsigned long __init_refok
init_memory_mapping(unsigned long start
,
397 struct map_range mr
[NR_RANGE_MR
];
398 unsigned long ret
= 0;
401 pr_info("init_memory_mapping: [mem %#010lx-%#010lx]\n",
404 memset(mr
, 0, sizeof(mr
));
405 nr_range
= split_mem_range(mr
, 0, start
, end
);
407 for (i
= 0; i
< nr_range
; i
++)
408 ret
= kernel_physical_mapping_init(mr
[i
].start
, mr
[i
].end
,
409 mr
[i
].page_size_mask
);
411 add_pfn_range_mapped(start
>> PAGE_SHIFT
, ret
>> PAGE_SHIFT
);
413 return ret
>> PAGE_SHIFT
;
417 * We need to iterate through the E820 memory map and create direct mappings
418 * for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply
419 * create direct mappings for all pfns from [0 to max_low_pfn) and
420 * [4GB to max_pfn) because of possible memory holes in high addresses
421 * that cannot be marked as UC by fixed/variable range MTRRs.
422 * Depending on the alignment of E820 ranges, this may possibly result
423 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
425 * init_mem_mapping() calls init_range_memory_mapping() with big range.
426 * That range would have hole in the middle or ends, and only ram parts
427 * will be mapped in init_range_memory_mapping().
429 static unsigned long __init
init_range_memory_mapping(
430 unsigned long r_start
,
433 unsigned long start_pfn
, end_pfn
;
434 unsigned long mapped_ram_size
= 0;
437 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
438 u64 start
= clamp_val(PFN_PHYS(start_pfn
), r_start
, r_end
);
439 u64 end
= clamp_val(PFN_PHYS(end_pfn
), r_start
, r_end
);
444 * if it is overlapping with brk pgt, we need to
445 * alloc pgt buf from memblock instead.
447 can_use_brk_pgt
= max(start
, (u64
)pgt_buf_end
<<PAGE_SHIFT
) >=
448 min(end
, (u64
)pgt_buf_top
<<PAGE_SHIFT
);
449 init_memory_mapping(start
, end
);
450 mapped_ram_size
+= end
- start
;
451 can_use_brk_pgt
= true;
454 return mapped_ram_size
;
457 static unsigned long __init
get_new_step_size(unsigned long step_size
)
460 * Initial mapped size is PMD_SIZE (2M).
461 * We can not set step_size to be PUD_SIZE (1G) yet.
462 * In worse case, when we cross the 1G boundary, and
463 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
464 * to map 1G range with PTE. Hence we use one less than the
465 * difference of page table level shifts.
467 * Don't need to worry about overflow in the top-down case, on 32bit,
468 * when step_size is 0, round_down() returns 0 for start, and that
469 * turns it into 0x100000000ULL.
470 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
471 * needs to be taken into consideration by the code below.
473 return step_size
<< (PMD_SHIFT
- PAGE_SHIFT
- 1);
477 * memory_map_top_down - Map [map_start, map_end) top down
478 * @map_start: start address of the target memory range
479 * @map_end: end address of the target memory range
481 * This function will setup direct mapping for memory range
482 * [map_start, map_end) in top-down. That said, the page tables
483 * will be allocated at the end of the memory, and we map the
484 * memory in top-down.
486 static void __init
memory_map_top_down(unsigned long map_start
,
487 unsigned long map_end
)
489 unsigned long real_end
, start
, last_start
;
490 unsigned long step_size
;
492 unsigned long mapped_ram_size
= 0;
494 /* xen has big range in reserved near end of ram, skip it at first.*/
495 addr
= memblock_find_in_range(map_start
, map_end
, PMD_SIZE
, PMD_SIZE
);
496 real_end
= addr
+ PMD_SIZE
;
498 /* step_size need to be small so pgt_buf from BRK could cover it */
499 step_size
= PMD_SIZE
;
500 max_pfn_mapped
= 0; /* will get exact value next */
501 min_pfn_mapped
= real_end
>> PAGE_SHIFT
;
502 last_start
= start
= real_end
;
505 * We start from the top (end of memory) and go to the bottom.
506 * The memblock_find_in_range() gets us a block of RAM from the
507 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
510 while (last_start
> map_start
) {
511 if (last_start
> step_size
) {
512 start
= round_down(last_start
- 1, step_size
);
513 if (start
< map_start
)
517 mapped_ram_size
+= init_range_memory_mapping(start
,
520 min_pfn_mapped
= last_start
>> PAGE_SHIFT
;
521 if (mapped_ram_size
>= step_size
)
522 step_size
= get_new_step_size(step_size
);
525 if (real_end
< map_end
)
526 init_range_memory_mapping(real_end
, map_end
);
530 * memory_map_bottom_up - Map [map_start, map_end) bottom up
531 * @map_start: start address of the target memory range
532 * @map_end: end address of the target memory range
534 * This function will setup direct mapping for memory range
535 * [map_start, map_end) in bottom-up. Since we have limited the
536 * bottom-up allocation above the kernel, the page tables will
537 * be allocated just above the kernel and we map the memory
538 * in [map_start, map_end) in bottom-up.
540 static void __init
memory_map_bottom_up(unsigned long map_start
,
541 unsigned long map_end
)
543 unsigned long next
, start
;
544 unsigned long mapped_ram_size
= 0;
545 /* step_size need to be small so pgt_buf from BRK could cover it */
546 unsigned long step_size
= PMD_SIZE
;
549 min_pfn_mapped
= start
>> PAGE_SHIFT
;
552 * We start from the bottom (@map_start) and go to the top (@map_end).
553 * The memblock_find_in_range() gets us a block of RAM from the
554 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
557 while (start
< map_end
) {
558 if (step_size
&& map_end
- start
> step_size
) {
559 next
= round_up(start
+ 1, step_size
);
566 mapped_ram_size
+= init_range_memory_mapping(start
, next
);
569 if (mapped_ram_size
>= step_size
)
570 step_size
= get_new_step_size(step_size
);
574 void __init
init_mem_mapping(void)
578 probe_page_size_mask();
581 end
= max_pfn
<< PAGE_SHIFT
;
583 end
= max_low_pfn
<< PAGE_SHIFT
;
586 /* the ISA range is always mapped regardless of memory holes */
587 init_memory_mapping(0, ISA_END_ADDRESS
);
590 * If the allocation is in bottom-up direction, we setup direct mapping
591 * in bottom-up, otherwise we setup direct mapping in top-down.
593 if (memblock_bottom_up()) {
594 unsigned long kernel_end
= __pa_symbol(_end
);
597 * we need two separate calls here. This is because we want to
598 * allocate page tables above the kernel. So we first map
599 * [kernel_end, end) to make memory above the kernel be mapped
600 * as soon as possible. And then use page tables allocated above
601 * the kernel to map [ISA_END_ADDRESS, kernel_end).
603 memory_map_bottom_up(kernel_end
, end
);
604 memory_map_bottom_up(ISA_END_ADDRESS
, kernel_end
);
606 memory_map_top_down(ISA_END_ADDRESS
, end
);
610 if (max_pfn
> max_low_pfn
) {
611 /* can we preseve max_low_pfn ?*/
612 max_low_pfn
= max_pfn
;
615 early_ioremap_page_table_range_init();
618 load_cr3(swapper_pg_dir
);
621 early_memtest(0, max_pfn_mapped
<< PAGE_SHIFT
);
625 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
626 * is valid. The argument is a physical page number.
629 * On x86, access has to be given to the first megabyte of ram because that area
630 * contains BIOS code and data regions used by X and dosemu and similar apps.
631 * Access has to be given to non-kernel-ram areas as well, these contain the PCI
632 * mmio resources as well as potential bios/acpi data regions.
634 int devmem_is_allowed(unsigned long pagenr
)
638 if (iomem_is_exclusive(pagenr
<< PAGE_SHIFT
))
640 if (!page_is_ram(pagenr
))
645 void free_init_pages(char *what
, unsigned long begin
, unsigned long end
)
647 unsigned long begin_aligned
, end_aligned
;
649 /* Make sure boundaries are page aligned */
650 begin_aligned
= PAGE_ALIGN(begin
);
651 end_aligned
= end
& PAGE_MASK
;
653 if (WARN_ON(begin_aligned
!= begin
|| end_aligned
!= end
)) {
654 begin
= begin_aligned
;
662 * If debugging page accesses then do not free this memory but
663 * mark them not present - any buggy init-section access will
664 * create a kernel page fault:
666 #ifdef CONFIG_DEBUG_PAGEALLOC
667 printk(KERN_INFO
"debug: unmapping init [mem %#010lx-%#010lx]\n",
669 set_memory_np(begin
, (end
- begin
) >> PAGE_SHIFT
);
672 * We just marked the kernel text read only above, now that
673 * we are going to free part of that, we need to make that
674 * writeable and non-executable first.
676 set_memory_nx(begin
, (end
- begin
) >> PAGE_SHIFT
);
677 set_memory_rw(begin
, (end
- begin
) >> PAGE_SHIFT
);
679 free_reserved_area((void *)begin
, (void *)end
, POISON_FREE_INITMEM
, what
);
683 void free_initmem(void)
685 free_init_pages("unused kernel",
686 (unsigned long)(&__init_begin
),
687 (unsigned long)(&__init_end
));
690 #ifdef CONFIG_BLK_DEV_INITRD
691 void __init
free_initrd_mem(unsigned long start
, unsigned long end
)
693 #ifdef CONFIG_MICROCODE_EARLY
695 * Remember, initrd memory may contain microcode or other useful things.
696 * Before we lose initrd mem, we need to find a place to hold them
697 * now that normal virtual memory is enabled.
699 save_microcode_in_initrd();
703 * end could be not aligned, and We can not align that,
704 * decompresser could be confused by aligned initrd_end
705 * We already reserve the end partial page before in
706 * - i386_start_kernel()
707 * - x86_64_start_kernel()
708 * - relocate_initrd()
709 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
711 free_init_pages("initrd", start
, PAGE_ALIGN(end
));
715 void __init
zone_sizes_init(void)
717 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
719 memset(max_zone_pfns
, 0, sizeof(max_zone_pfns
));
721 #ifdef CONFIG_ZONE_DMA
722 max_zone_pfns
[ZONE_DMA
] = min(MAX_DMA_PFN
, max_low_pfn
);
724 #ifdef CONFIG_ZONE_DMA32
725 max_zone_pfns
[ZONE_DMA32
] = min(MAX_DMA32_PFN
, max_low_pfn
);
727 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
728 #ifdef CONFIG_HIGHMEM
729 max_zone_pfns
[ZONE_HIGHMEM
] = max_pfn
;
732 free_area_init_nodes(max_zone_pfns
);
735 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state
, cpu_tlbstate
) = {
737 .active_mm
= &init_mm
,
740 .cr4
= ~0UL, /* fail hard if we screw up cr4 shadow initialization */
742 EXPORT_SYMBOL_GPL(cpu_tlbstate
);
744 void update_cache_mode_entry(unsigned entry
, enum page_cache_mode cache
)
746 /* entry 0 MUST be WB (hardwired to speed up translations) */
747 BUG_ON(!entry
&& cache
!= _PAGE_CACHE_MODE_WB
);
749 __cachemode2pte_tbl
[cache
] = __cm_idx2pte(entry
);
750 __pte2cachemode_tbl
[entry
] = cache
;