Linux 4.2.2
[linux/fpc-iii.git] / arch / x86 / platform / intel-mid / sfi.c
blobce992e8cc06526c4e61f1efb1b852e0f41df9ccf
1 /*
2 * intel_mid_sfi.c: Intel MID SFI initialization code
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/interrupt.h>
16 #include <linux/scatterlist.h>
17 #include <linux/sfi.h>
18 #include <linux/intel_pmic_gpio.h>
19 #include <linux/spi/spi.h>
20 #include <linux/i2c.h>
21 #include <linux/skbuff.h>
22 #include <linux/gpio.h>
23 #include <linux/gpio_keys.h>
24 #include <linux/input.h>
25 #include <linux/platform_device.h>
26 #include <linux/irq.h>
27 #include <linux/module.h>
28 #include <linux/notifier.h>
29 #include <linux/mmc/core.h>
30 #include <linux/mmc/card.h>
31 #include <linux/blkdev.h>
33 #include <asm/setup.h>
34 #include <asm/mpspec_def.h>
35 #include <asm/hw_irq.h>
36 #include <asm/apic.h>
37 #include <asm/io_apic.h>
38 #include <asm/intel-mid.h>
39 #include <asm/intel_mid_vrtc.h>
40 #include <asm/io.h>
41 #include <asm/i8259.h>
42 #include <asm/intel_scu_ipc.h>
43 #include <asm/apb_timer.h>
44 #include <asm/reboot.h>
46 #define SFI_SIG_OEM0 "OEM0"
47 #define MAX_IPCDEVS 24
48 #define MAX_SCU_SPI 24
49 #define MAX_SCU_I2C 24
51 static struct platform_device *ipc_devs[MAX_IPCDEVS];
52 static struct spi_board_info *spi_devs[MAX_SCU_SPI];
53 static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
54 static struct sfi_gpio_table_entry *gpio_table;
55 static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
56 static int ipc_next_dev;
57 static int spi_next_dev;
58 static int i2c_next_dev;
59 static int i2c_bus[MAX_SCU_I2C];
60 static int gpio_num_entry;
61 static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
62 int sfi_mrtc_num;
63 int sfi_mtimer_num;
65 struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
66 EXPORT_SYMBOL_GPL(sfi_mrtc_array);
68 struct blocking_notifier_head intel_scu_notifier =
69 BLOCKING_NOTIFIER_INIT(intel_scu_notifier);
70 EXPORT_SYMBOL_GPL(intel_scu_notifier);
72 #define intel_mid_sfi_get_pdata(dev, priv) \
73 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL)
75 /* parse all the mtimer info to a static mtimer array */
76 int __init sfi_parse_mtmr(struct sfi_table_header *table)
78 struct sfi_table_simple *sb;
79 struct sfi_timer_table_entry *pentry;
80 struct mpc_intsrc mp_irq;
81 int totallen;
83 sb = (struct sfi_table_simple *)table;
84 if (!sfi_mtimer_num) {
85 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
86 struct sfi_timer_table_entry);
87 pentry = (struct sfi_timer_table_entry *) sb->pentry;
88 totallen = sfi_mtimer_num * sizeof(*pentry);
89 memcpy(sfi_mtimer_array, pentry, totallen);
92 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
93 pentry = sfi_mtimer_array;
94 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
95 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
96 totallen, (u32)pentry->phys_addr,
97 pentry->freq_hz, pentry->irq);
98 mp_irq.type = MP_INTSRC;
99 mp_irq.irqtype = mp_INT;
100 /* triggering mode edge bit 2-3, active high polarity bit 0-1 */
101 mp_irq.irqflag = 5;
102 mp_irq.srcbus = MP_BUS_ISA;
103 mp_irq.srcbusirq = pentry->irq; /* IRQ */
104 mp_irq.dstapic = MP_APIC_ALL;
105 mp_irq.dstirq = pentry->irq;
106 mp_save_irq(&mp_irq);
107 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
110 return 0;
113 struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
115 int i;
116 if (hint < sfi_mtimer_num) {
117 if (!sfi_mtimer_usage[hint]) {
118 pr_debug("hint taken for timer %d irq %d\n",
119 hint, sfi_mtimer_array[hint].irq);
120 sfi_mtimer_usage[hint] = 1;
121 return &sfi_mtimer_array[hint];
124 /* take the first timer available */
125 for (i = 0; i < sfi_mtimer_num;) {
126 if (!sfi_mtimer_usage[i]) {
127 sfi_mtimer_usage[i] = 1;
128 return &sfi_mtimer_array[i];
130 i++;
132 return NULL;
135 void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
137 int i;
138 for (i = 0; i < sfi_mtimer_num;) {
139 if (mtmr->irq == sfi_mtimer_array[i].irq) {
140 sfi_mtimer_usage[i] = 0;
141 return;
143 i++;
147 /* parse all the mrtc info to a global mrtc array */
148 int __init sfi_parse_mrtc(struct sfi_table_header *table)
150 struct sfi_table_simple *sb;
151 struct sfi_rtc_table_entry *pentry;
152 struct mpc_intsrc mp_irq;
154 int totallen;
156 sb = (struct sfi_table_simple *)table;
157 if (!sfi_mrtc_num) {
158 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
159 struct sfi_rtc_table_entry);
160 pentry = (struct sfi_rtc_table_entry *)sb->pentry;
161 totallen = sfi_mrtc_num * sizeof(*pentry);
162 memcpy(sfi_mrtc_array, pentry, totallen);
165 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
166 pentry = sfi_mrtc_array;
167 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
168 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
169 totallen, (u32)pentry->phys_addr, pentry->irq);
170 mp_irq.type = MP_INTSRC;
171 mp_irq.irqtype = mp_INT;
172 mp_irq.irqflag = 0xf; /* level trigger and active low */
173 mp_irq.srcbus = MP_BUS_ISA;
174 mp_irq.srcbusirq = pentry->irq; /* IRQ */
175 mp_irq.dstapic = MP_APIC_ALL;
176 mp_irq.dstirq = pentry->irq;
177 mp_save_irq(&mp_irq);
178 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
180 return 0;
185 * Parsing GPIO table first, since the DEVS table will need this table
186 * to map the pin name to the actual pin.
188 static int __init sfi_parse_gpio(struct sfi_table_header *table)
190 struct sfi_table_simple *sb;
191 struct sfi_gpio_table_entry *pentry;
192 int num, i;
194 if (gpio_table)
195 return 0;
196 sb = (struct sfi_table_simple *)table;
197 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
198 pentry = (struct sfi_gpio_table_entry *)sb->pentry;
200 gpio_table = kmalloc(num * sizeof(*pentry), GFP_KERNEL);
201 if (!gpio_table)
202 return -1;
203 memcpy(gpio_table, pentry, num * sizeof(*pentry));
204 gpio_num_entry = num;
206 pr_debug("GPIO pin info:\n");
207 for (i = 0; i < num; i++, pentry++)
208 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
209 " pin = %d\n", i,
210 pentry->controller_name,
211 pentry->pin_name,
212 pentry->pin_no);
213 return 0;
216 int get_gpio_by_name(const char *name)
218 struct sfi_gpio_table_entry *pentry = gpio_table;
219 int i;
221 if (!pentry)
222 return -1;
223 for (i = 0; i < gpio_num_entry; i++, pentry++) {
224 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
225 return pentry->pin_no;
227 return -EINVAL;
230 void __init intel_scu_device_register(struct platform_device *pdev)
232 if (ipc_next_dev == MAX_IPCDEVS)
233 pr_err("too many SCU IPC devices");
234 else
235 ipc_devs[ipc_next_dev++] = pdev;
238 static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
240 struct spi_board_info *new_dev;
242 if (spi_next_dev == MAX_SCU_SPI) {
243 pr_err("too many SCU SPI devices");
244 return;
247 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
248 if (!new_dev) {
249 pr_err("failed to alloc mem for delayed spi dev %s\n",
250 sdev->modalias);
251 return;
253 *new_dev = *sdev;
255 spi_devs[spi_next_dev++] = new_dev;
258 static void __init intel_scu_i2c_device_register(int bus,
259 struct i2c_board_info *idev)
261 struct i2c_board_info *new_dev;
263 if (i2c_next_dev == MAX_SCU_I2C) {
264 pr_err("too many SCU I2C devices");
265 return;
268 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
269 if (!new_dev) {
270 pr_err("failed to alloc mem for delayed i2c dev %s\n",
271 idev->type);
272 return;
274 *new_dev = *idev;
276 i2c_bus[i2c_next_dev] = bus;
277 i2c_devs[i2c_next_dev++] = new_dev;
280 /* Called by IPC driver */
281 void intel_scu_devices_create(void)
283 int i;
285 for (i = 0; i < ipc_next_dev; i++)
286 platform_device_add(ipc_devs[i]);
288 for (i = 0; i < spi_next_dev; i++)
289 spi_register_board_info(spi_devs[i], 1);
291 for (i = 0; i < i2c_next_dev; i++) {
292 struct i2c_adapter *adapter;
293 struct i2c_client *client;
295 adapter = i2c_get_adapter(i2c_bus[i]);
296 if (adapter) {
297 client = i2c_new_device(adapter, i2c_devs[i]);
298 if (!client)
299 pr_err("can't create i2c device %s\n",
300 i2c_devs[i]->type);
301 } else
302 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
304 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
306 EXPORT_SYMBOL_GPL(intel_scu_devices_create);
308 /* Called by IPC driver */
309 void intel_scu_devices_destroy(void)
311 int i;
313 intel_scu_notifier_post(SCU_DOWN, NULL);
315 for (i = 0; i < ipc_next_dev; i++)
316 platform_device_del(ipc_devs[i]);
318 EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
320 static void __init install_irq_resource(struct platform_device *pdev, int irq)
322 /* Single threaded */
323 static struct resource res __initdata = {
324 .name = "IRQ",
325 .flags = IORESOURCE_IRQ,
327 res.start = irq;
328 platform_device_add_resources(pdev, &res, 1);
331 static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry,
332 struct devs_id *dev)
334 struct platform_device *pdev;
335 void *pdata = NULL;
337 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
338 pentry->name, pentry->irq);
339 pdata = intel_mid_sfi_get_pdata(dev, pentry);
340 if (IS_ERR(pdata))
341 return;
343 pdev = platform_device_alloc(pentry->name, 0);
344 if (pdev == NULL) {
345 pr_err("out of memory for SFI platform device '%s'.\n",
346 pentry->name);
347 return;
349 install_irq_resource(pdev, pentry->irq);
351 pdev->dev.platform_data = pdata;
352 platform_device_add(pdev);
355 static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry,
356 struct devs_id *dev)
358 struct spi_board_info spi_info;
359 void *pdata = NULL;
361 memset(&spi_info, 0, sizeof(spi_info));
362 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
363 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
364 spi_info.bus_num = pentry->host_num;
365 spi_info.chip_select = pentry->addr;
366 spi_info.max_speed_hz = pentry->max_freq;
367 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
368 spi_info.bus_num,
369 spi_info.modalias,
370 spi_info.irq,
371 spi_info.max_speed_hz,
372 spi_info.chip_select);
374 pdata = intel_mid_sfi_get_pdata(dev, &spi_info);
375 if (IS_ERR(pdata))
376 return;
378 spi_info.platform_data = pdata;
379 if (dev->delay)
380 intel_scu_spi_device_register(&spi_info);
381 else
382 spi_register_board_info(&spi_info, 1);
385 static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry,
386 struct devs_id *dev)
388 struct i2c_board_info i2c_info;
389 void *pdata = NULL;
391 memset(&i2c_info, 0, sizeof(i2c_info));
392 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
393 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
394 i2c_info.addr = pentry->addr;
395 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
396 pentry->host_num,
397 i2c_info.type,
398 i2c_info.irq,
399 i2c_info.addr);
400 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info);
401 i2c_info.platform_data = pdata;
402 if (IS_ERR(pdata))
403 return;
405 if (dev->delay)
406 intel_scu_i2c_device_register(pentry->host_num, &i2c_info);
407 else
408 i2c_register_board_info(pentry->host_num, &i2c_info, 1);
411 extern struct devs_id *const __x86_intel_mid_dev_start[],
412 *const __x86_intel_mid_dev_end[];
414 static struct devs_id __init *get_device_id(u8 type, char *name)
416 struct devs_id *const *dev_table;
418 for (dev_table = __x86_intel_mid_dev_start;
419 dev_table < __x86_intel_mid_dev_end; dev_table++) {
420 struct devs_id *dev = *dev_table;
421 if (dev->type == type &&
422 !strncmp(dev->name, name, SFI_NAME_LEN)) {
423 return dev;
427 return NULL;
430 static int __init sfi_parse_devs(struct sfi_table_header *table)
432 struct sfi_table_simple *sb;
433 struct sfi_device_table_entry *pentry;
434 struct devs_id *dev = NULL;
435 int num, i, ret;
436 int polarity;
437 struct irq_alloc_info info;
439 sb = (struct sfi_table_simple *)table;
440 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
441 pentry = (struct sfi_device_table_entry *)sb->pentry;
443 for (i = 0; i < num; i++, pentry++) {
444 int irq = pentry->irq;
446 if (irq != (u8)0xff) { /* native RTE case */
447 /* these SPI2 devices are not exposed to system as PCI
448 * devices, but they have separate RTE entry in IOAPIC
449 * so we have to enable them one by one here
451 if (intel_mid_identify_cpu() ==
452 INTEL_MID_CPU_CHIP_TANGIER) {
453 if (!strncmp(pentry->name, "r69001-ts-i2c", 13))
454 /* active low */
455 polarity = 1;
456 else if (!strncmp(pentry->name,
457 "synaptics_3202", 14))
458 /* active low */
459 polarity = 1;
460 else if (irq == 41)
461 /* fast_int_1 */
462 polarity = 1;
463 else
464 /* active high */
465 polarity = 0;
466 } else {
467 /* PNW and CLV go with active low */
468 polarity = 1;
471 ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, polarity);
472 ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &info);
473 WARN_ON(ret < 0);
476 dev = get_device_id(pentry->type, pentry->name);
478 if (!dev)
479 continue;
481 if (dev->device_handler) {
482 dev->device_handler(pentry, dev);
483 } else {
484 switch (pentry->type) {
485 case SFI_DEV_TYPE_IPC:
486 sfi_handle_ipc_dev(pentry, dev);
487 break;
488 case SFI_DEV_TYPE_SPI:
489 sfi_handle_spi_dev(pentry, dev);
490 break;
491 case SFI_DEV_TYPE_I2C:
492 sfi_handle_i2c_dev(pentry, dev);
493 break;
494 case SFI_DEV_TYPE_UART:
495 case SFI_DEV_TYPE_HSI:
496 default:
497 break;
501 return 0;
504 static int __init intel_mid_platform_init(void)
506 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
507 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
508 return 0;
510 arch_initcall(intel_mid_platform_init);