2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
3 * http://www.samsung.com
5 * Copyright (C) 2013 Google, Inc
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/module.h>
21 #include <linux/i2c.h>
22 #include <linux/bcd.h>
23 #include <linux/regmap.h>
24 #include <linux/rtc.h>
25 #include <linux/platform_device.h>
26 #include <linux/mfd/samsung/core.h>
27 #include <linux/mfd/samsung/irq.h>
28 #include <linux/mfd/samsung/rtc.h>
29 #include <linux/mfd/samsung/s2mps14.h>
32 * Maximum number of retries for checking changes in UDR field
33 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
35 * After writing to RTC registers (setting time or alarm) read the UDR field
36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
39 #define UDR_READ_RETRY_CNT 5
42 * Registers used by the driver which are different between chipsets.
44 * Operations like read time and write alarm/time require updating
45 * specific fields in UDR register. These fields usually are auto-cleared
46 * (with some exceptions).
48 * Table of operations per device:
50 * Device | Write time | Read time | Write alarm
51 * =================================================
52 * S5M8767 | UDR + TIME | | UDR
53 * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
54 * S2MPS13 | WUDR | RUDR | WUDR + AUDR
55 * S2MPS15 | WUDR | RUDR | AUDR
57 struct s5m_rtc_reg_config
{
58 /* Number of registers used for setting time/alarm0/alarm1 */
59 unsigned int regs_count
;
60 /* First register for time, seconds */
62 /* RTC control register */
64 /* First register for alarm 0, seconds */
66 /* First register for alarm 1, seconds */
69 * Register for update flag (UDR). Typically setting UDR field to 1
70 * will enable update of time or alarm register. Then it will be
71 * auto-cleared after successful update.
73 unsigned int udr_update
;
74 /* Auto-cleared mask in UDR field for writing time and alarm */
75 unsigned int autoclear_udr_mask
;
77 * Masks in UDR field for time and alarm operations.
78 * The read time mask can be 0. Rest should not.
80 unsigned int read_time_udr_mask
;
81 unsigned int write_time_udr_mask
;
82 unsigned int write_alarm_udr_mask
;
85 /* Register map for S5M8763 and S5M8767 */
86 static const struct s5m_rtc_reg_config s5m_rtc_regs
= {
89 .ctrl
= S5M_ALARM1_CONF
,
90 .alarm0
= S5M_ALARM0_SEC
,
91 .alarm1
= S5M_ALARM1_SEC
,
92 .udr_update
= S5M_RTC_UDR_CON
,
93 .autoclear_udr_mask
= S5M_RTC_UDR_MASK
,
94 .read_time_udr_mask
= 0, /* Not needed */
95 .write_time_udr_mask
= S5M_RTC_UDR_MASK
| S5M_RTC_TIME_EN_MASK
,
96 .write_alarm_udr_mask
= S5M_RTC_UDR_MASK
,
99 /* Register map for S2MPS13 */
100 static const struct s5m_rtc_reg_config s2mps13_rtc_regs
= {
102 .time
= S2MPS_RTC_SEC
,
103 .ctrl
= S2MPS_RTC_CTRL
,
104 .alarm0
= S2MPS_ALARM0_SEC
,
105 .alarm1
= S2MPS_ALARM1_SEC
,
106 .udr_update
= S2MPS_RTC_UDR_CON
,
107 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
108 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
109 .write_time_udr_mask
= S2MPS_RTC_WUDR_MASK
,
110 .write_alarm_udr_mask
= S2MPS_RTC_WUDR_MASK
| S2MPS13_RTC_AUDR_MASK
,
113 /* Register map for S2MPS11/14 */
114 static const struct s5m_rtc_reg_config s2mps14_rtc_regs
= {
116 .time
= S2MPS_RTC_SEC
,
117 .ctrl
= S2MPS_RTC_CTRL
,
118 .alarm0
= S2MPS_ALARM0_SEC
,
119 .alarm1
= S2MPS_ALARM1_SEC
,
120 .udr_update
= S2MPS_RTC_UDR_CON
,
121 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
122 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
123 .write_time_udr_mask
= S2MPS_RTC_WUDR_MASK
,
124 .write_alarm_udr_mask
= S2MPS_RTC_WUDR_MASK
| S2MPS_RTC_RUDR_MASK
,
128 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
131 static const struct s5m_rtc_reg_config s2mps15_rtc_regs
= {
133 .time
= S2MPS_RTC_SEC
,
134 .ctrl
= S2MPS_RTC_CTRL
,
135 .alarm0
= S2MPS_ALARM0_SEC
,
136 .alarm1
= S2MPS_ALARM1_SEC
,
137 .udr_update
= S2MPS_RTC_UDR_CON
,
138 .autoclear_udr_mask
= S2MPS_RTC_WUDR_MASK
,
139 .read_time_udr_mask
= S2MPS_RTC_RUDR_MASK
,
140 .write_time_udr_mask
= S2MPS15_RTC_WUDR_MASK
,
141 .write_alarm_udr_mask
= S2MPS15_RTC_AUDR_MASK
,
144 struct s5m_rtc_info
{
146 struct i2c_client
*i2c
;
147 struct sec_pmic_dev
*s5m87xx
;
148 struct regmap
*regmap
;
149 struct rtc_device
*rtc_dev
;
151 enum sec_device_type device_type
;
153 const struct s5m_rtc_reg_config
*regs
;
156 static const struct regmap_config s5m_rtc_regmap_config
= {
160 .max_register
= S5M_RTC_REG_MAX
,
163 static const struct regmap_config s2mps14_rtc_regmap_config
= {
167 .max_register
= S2MPS_RTC_REG_MAX
,
170 static void s5m8767_data_to_tm(u8
*data
, struct rtc_time
*tm
,
173 tm
->tm_sec
= data
[RTC_SEC
] & 0x7f;
174 tm
->tm_min
= data
[RTC_MIN
] & 0x7f;
176 tm
->tm_hour
= data
[RTC_HOUR
] & 0x1f;
178 tm
->tm_hour
= data
[RTC_HOUR
] & 0x0f;
179 if (data
[RTC_HOUR
] & HOUR_PM_MASK
)
183 tm
->tm_wday
= ffs(data
[RTC_WEEKDAY
] & 0x7f);
184 tm
->tm_mday
= data
[RTC_DATE
] & 0x1f;
185 tm
->tm_mon
= (data
[RTC_MONTH
] & 0x0f) - 1;
186 tm
->tm_year
= (data
[RTC_YEAR1
] & 0x7f) + 100;
191 static int s5m8767_tm_to_data(struct rtc_time
*tm
, u8
*data
)
193 data
[RTC_SEC
] = tm
->tm_sec
;
194 data
[RTC_MIN
] = tm
->tm_min
;
196 if (tm
->tm_hour
>= 12)
197 data
[RTC_HOUR
] = tm
->tm_hour
| HOUR_PM_MASK
;
199 data
[RTC_HOUR
] = tm
->tm_hour
& ~HOUR_PM_MASK
;
201 data
[RTC_WEEKDAY
] = 1 << tm
->tm_wday
;
202 data
[RTC_DATE
] = tm
->tm_mday
;
203 data
[RTC_MONTH
] = tm
->tm_mon
+ 1;
204 data
[RTC_YEAR1
] = tm
->tm_year
> 100 ? (tm
->tm_year
- 100) : 0;
206 if (tm
->tm_year
< 100) {
207 pr_err("RTC cannot handle the year %d\n",
216 * Read RTC_UDR_CON register and wait till UDR field is cleared.
217 * This indicates that time/alarm update ended.
219 static int s5m8767_wait_for_udr_update(struct s5m_rtc_info
*info
)
221 int ret
, retry
= UDR_READ_RETRY_CNT
;
225 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
226 } while (--retry
&& (data
& info
->regs
->autoclear_udr_mask
) && !ret
);
229 dev_err(info
->dev
, "waiting for UDR update, reached max number of retries\n");
234 static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info
*info
,
235 struct rtc_wkalrm
*alarm
)
240 switch (info
->device_type
) {
243 ret
= regmap_read(info
->regmap
, S5M_RTC_STATUS
, &val
);
244 val
&= S5M_ALARM0_STATUS
;
249 ret
= regmap_read(info
->s5m87xx
->regmap_pmic
, S2MPS14_REG_ST2
,
251 val
&= S2MPS_ALARM0_STATUS
;
267 static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info
*info
)
272 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
274 dev_err(info
->dev
, "failed to read update reg(%d)\n", ret
);
278 data
|= info
->regs
->write_time_udr_mask
;
280 ret
= regmap_write(info
->regmap
, info
->regs
->udr_update
, data
);
282 dev_err(info
->dev
, "failed to write update reg(%d)\n", ret
);
286 ret
= s5m8767_wait_for_udr_update(info
);
291 static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info
*info
)
296 ret
= regmap_read(info
->regmap
, info
->regs
->udr_update
, &data
);
298 dev_err(info
->dev
, "%s: fail to read update reg(%d)\n",
303 data
|= info
->regs
->write_alarm_udr_mask
;
304 switch (info
->device_type
) {
307 data
&= ~S5M_RTC_TIME_EN_MASK
;
312 /* No exceptions needed */
318 ret
= regmap_write(info
->regmap
, info
->regs
->udr_update
, data
);
320 dev_err(info
->dev
, "%s: fail to write update reg(%d)\n",
325 ret
= s5m8767_wait_for_udr_update(info
);
327 /* On S2MPS13 the AUDR is not auto-cleared */
328 if (info
->device_type
== S2MPS13X
)
329 regmap_update_bits(info
->regmap
, info
->regs
->udr_update
,
330 S2MPS13_RTC_AUDR_MASK
, 0);
335 static void s5m8763_data_to_tm(u8
*data
, struct rtc_time
*tm
)
337 tm
->tm_sec
= bcd2bin(data
[RTC_SEC
]);
338 tm
->tm_min
= bcd2bin(data
[RTC_MIN
]);
340 if (data
[RTC_HOUR
] & HOUR_12
) {
341 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x1f);
342 if (data
[RTC_HOUR
] & HOUR_PM
)
345 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x3f);
348 tm
->tm_wday
= data
[RTC_WEEKDAY
] & 0x07;
349 tm
->tm_mday
= bcd2bin(data
[RTC_DATE
]);
350 tm
->tm_mon
= bcd2bin(data
[RTC_MONTH
]);
351 tm
->tm_year
= bcd2bin(data
[RTC_YEAR1
]) + bcd2bin(data
[RTC_YEAR2
]) * 100;
355 static void s5m8763_tm_to_data(struct rtc_time
*tm
, u8
*data
)
357 data
[RTC_SEC
] = bin2bcd(tm
->tm_sec
);
358 data
[RTC_MIN
] = bin2bcd(tm
->tm_min
);
359 data
[RTC_HOUR
] = bin2bcd(tm
->tm_hour
);
360 data
[RTC_WEEKDAY
] = tm
->tm_wday
;
361 data
[RTC_DATE
] = bin2bcd(tm
->tm_mday
);
362 data
[RTC_MONTH
] = bin2bcd(tm
->tm_mon
);
363 data
[RTC_YEAR1
] = bin2bcd(tm
->tm_year
% 100);
364 data
[RTC_YEAR2
] = bin2bcd((tm
->tm_year
+ 1900) / 100);
367 static int s5m_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
369 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
370 u8 data
[info
->regs
->regs_count
];
373 if (info
->regs
->read_time_udr_mask
) {
374 ret
= regmap_update_bits(info
->regmap
,
375 info
->regs
->udr_update
,
376 info
->regs
->read_time_udr_mask
,
377 info
->regs
->read_time_udr_mask
);
380 "Failed to prepare registers for time reading: %d\n",
385 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->time
, data
,
386 info
->regs
->regs_count
);
390 switch (info
->device_type
) {
392 s5m8763_data_to_tm(data
, tm
);
399 s5m8767_data_to_tm(data
, tm
, info
->rtc_24hr_mode
);
406 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
407 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
408 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
410 return rtc_valid_tm(tm
);
413 static int s5m_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
415 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
416 u8 data
[info
->regs
->regs_count
];
419 switch (info
->device_type
) {
421 s5m8763_tm_to_data(tm
, data
);
427 ret
= s5m8767_tm_to_data(tm
, data
);
436 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
437 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
438 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
440 ret
= regmap_raw_write(info
->regmap
, info
->regs
->time
, data
,
441 info
->regs
->regs_count
);
445 ret
= s5m8767_rtc_set_time_reg(info
);
450 static int s5m_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
452 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
453 u8 data
[info
->regs
->regs_count
];
457 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
458 info
->regs
->regs_count
);
462 switch (info
->device_type
) {
464 s5m8763_data_to_tm(data
, &alrm
->time
);
465 ret
= regmap_read(info
->regmap
, S5M_ALARM0_CONF
, &val
);
469 alrm
->enabled
= !!val
;
476 s5m8767_data_to_tm(data
, &alrm
->time
, info
->rtc_24hr_mode
);
478 for (i
= 0; i
< info
->regs
->regs_count
; i
++) {
479 if (data
[i
] & ALARM_ENABLE_MASK
) {
490 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
491 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
492 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
,
493 alrm
->time
.tm_min
, alrm
->time
.tm_sec
,
496 ret
= s5m_check_peding_alarm_interrupt(info
, alrm
);
501 static int s5m_rtc_stop_alarm(struct s5m_rtc_info
*info
)
503 u8 data
[info
->regs
->regs_count
];
507 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
508 info
->regs
->regs_count
);
512 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
513 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
514 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
515 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
517 switch (info
->device_type
) {
519 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, 0);
526 for (i
= 0; i
< info
->regs
->regs_count
; i
++)
527 data
[i
] &= ~ALARM_ENABLE_MASK
;
529 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
530 info
->regs
->regs_count
);
534 ret
= s5m8767_rtc_set_alarm_reg(info
);
545 static int s5m_rtc_start_alarm(struct s5m_rtc_info
*info
)
548 u8 data
[info
->regs
->regs_count
];
552 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
553 info
->regs
->regs_count
);
557 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
558 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
559 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
560 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
562 switch (info
->device_type
) {
565 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, alarm0_conf
);
572 data
[RTC_SEC
] |= ALARM_ENABLE_MASK
;
573 data
[RTC_MIN
] |= ALARM_ENABLE_MASK
;
574 data
[RTC_HOUR
] |= ALARM_ENABLE_MASK
;
575 data
[RTC_WEEKDAY
] &= ~ALARM_ENABLE_MASK
;
576 if (data
[RTC_DATE
] & 0x1f)
577 data
[RTC_DATE
] |= ALARM_ENABLE_MASK
;
578 if (data
[RTC_MONTH
] & 0xf)
579 data
[RTC_MONTH
] |= ALARM_ENABLE_MASK
;
580 if (data
[RTC_YEAR1
] & 0x7f)
581 data
[RTC_YEAR1
] |= ALARM_ENABLE_MASK
;
583 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
584 info
->regs
->regs_count
);
587 ret
= s5m8767_rtc_set_alarm_reg(info
);
598 static int s5m_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
600 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
601 u8 data
[info
->regs
->regs_count
];
604 switch (info
->device_type
) {
606 s5m8763_tm_to_data(&alrm
->time
, data
);
613 s5m8767_tm_to_data(&alrm
->time
, data
);
620 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
621 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
622 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
, alrm
->time
.tm_min
,
623 alrm
->time
.tm_sec
, alrm
->time
.tm_wday
);
625 ret
= s5m_rtc_stop_alarm(info
);
629 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
630 info
->regs
->regs_count
);
634 ret
= s5m8767_rtc_set_alarm_reg(info
);
639 ret
= s5m_rtc_start_alarm(info
);
644 static int s5m_rtc_alarm_irq_enable(struct device
*dev
,
645 unsigned int enabled
)
647 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
650 return s5m_rtc_start_alarm(info
);
652 return s5m_rtc_stop_alarm(info
);
655 static irqreturn_t
s5m_rtc_alarm_irq(int irq
, void *data
)
657 struct s5m_rtc_info
*info
= data
;
659 rtc_update_irq(info
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
664 static const struct rtc_class_ops s5m_rtc_ops
= {
665 .read_time
= s5m_rtc_read_time
,
666 .set_time
= s5m_rtc_set_time
,
667 .read_alarm
= s5m_rtc_read_alarm
,
668 .set_alarm
= s5m_rtc_set_alarm
,
669 .alarm_irq_enable
= s5m_rtc_alarm_irq_enable
,
672 static int s5m8767_rtc_init_reg(struct s5m_rtc_info
*info
)
677 switch (info
->device_type
) {
680 /* UDR update time. Default of 7.32 ms is too long. */
681 ret
= regmap_update_bits(info
->regmap
, S5M_RTC_UDR_CON
,
682 S5M_RTC_UDR_T_MASK
, S5M_RTC_UDR_T_450_US
);
684 dev_err(info
->dev
, "%s: fail to change UDR time: %d\n",
687 /* Set RTC control register : Binary mode, 24hour mode */
688 data
[0] = (1 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
689 data
[1] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
691 ret
= regmap_raw_write(info
->regmap
, S5M_ALARM0_CONF
, data
, 2);
697 data
[0] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
698 ret
= regmap_write(info
->regmap
, info
->regs
->ctrl
, data
[0]);
703 * Should set WUDR & (RUDR or AUDR) bits to high after writing
704 * RTC_CTRL register like writing Alarm registers. We can't find
705 * the description from datasheet but vendor code does that
708 ret
= s5m8767_rtc_set_alarm_reg(info
);
715 info
->rtc_24hr_mode
= 1;
717 dev_err(info
->dev
, "%s: fail to write controlm reg(%d)\n",
725 static int s5m_rtc_probe(struct platform_device
*pdev
)
727 struct sec_pmic_dev
*s5m87xx
= dev_get_drvdata(pdev
->dev
.parent
);
728 struct sec_platform_data
*pdata
= s5m87xx
->pdata
;
729 struct s5m_rtc_info
*info
;
730 const struct regmap_config
*regmap_cfg
;
734 dev_err(pdev
->dev
.parent
, "Platform data not supplied\n");
738 info
= devm_kzalloc(&pdev
->dev
, sizeof(*info
), GFP_KERNEL
);
742 switch (platform_get_device_id(pdev
)->driver_data
) {
744 regmap_cfg
= &s2mps14_rtc_regmap_config
;
745 info
->regs
= &s2mps15_rtc_regs
;
746 alarm_irq
= S2MPS14_IRQ_RTCA0
;
749 regmap_cfg
= &s2mps14_rtc_regmap_config
;
750 info
->regs
= &s2mps14_rtc_regs
;
751 alarm_irq
= S2MPS14_IRQ_RTCA0
;
754 regmap_cfg
= &s2mps14_rtc_regmap_config
;
755 info
->regs
= &s2mps13_rtc_regs
;
756 alarm_irq
= S2MPS14_IRQ_RTCA0
;
759 regmap_cfg
= &s5m_rtc_regmap_config
;
760 info
->regs
= &s5m_rtc_regs
;
761 alarm_irq
= S5M8763_IRQ_ALARM0
;
764 regmap_cfg
= &s5m_rtc_regmap_config
;
765 info
->regs
= &s5m_rtc_regs
;
766 alarm_irq
= S5M8767_IRQ_RTCA1
;
770 "Device type %lu is not supported by RTC driver\n",
771 platform_get_device_id(pdev
)->driver_data
);
775 info
->i2c
= i2c_new_dummy(s5m87xx
->i2c
->adapter
, RTC_I2C_ADDR
);
777 dev_err(&pdev
->dev
, "Failed to allocate I2C for RTC\n");
781 info
->regmap
= devm_regmap_init_i2c(info
->i2c
, regmap_cfg
);
782 if (IS_ERR(info
->regmap
)) {
783 ret
= PTR_ERR(info
->regmap
);
784 dev_err(&pdev
->dev
, "Failed to allocate RTC register map: %d\n",
789 info
->dev
= &pdev
->dev
;
790 info
->s5m87xx
= s5m87xx
;
791 info
->device_type
= platform_get_device_id(pdev
)->driver_data
;
793 if (s5m87xx
->irq_data
) {
794 info
->irq
= regmap_irq_get_virq(s5m87xx
->irq_data
, alarm_irq
);
795 if (info
->irq
<= 0) {
797 dev_err(&pdev
->dev
, "Failed to get virtual IRQ %d\n",
803 platform_set_drvdata(pdev
, info
);
805 ret
= s5m8767_rtc_init_reg(info
);
807 device_init_wakeup(&pdev
->dev
, 1);
809 info
->rtc_dev
= devm_rtc_device_register(&pdev
->dev
, "s5m-rtc",
810 &s5m_rtc_ops
, THIS_MODULE
);
812 if (IS_ERR(info
->rtc_dev
)) {
813 ret
= PTR_ERR(info
->rtc_dev
);
818 dev_info(&pdev
->dev
, "Alarm IRQ not available\n");
822 ret
= devm_request_threaded_irq(&pdev
->dev
, info
->irq
, NULL
,
823 s5m_rtc_alarm_irq
, 0, "rtc-alarm0",
826 dev_err(&pdev
->dev
, "Failed to request alarm IRQ: %d: %d\n",
834 i2c_unregister_device(info
->i2c
);
839 static int s5m_rtc_remove(struct platform_device
*pdev
)
841 struct s5m_rtc_info
*info
= platform_get_drvdata(pdev
);
843 i2c_unregister_device(info
->i2c
);
848 #ifdef CONFIG_PM_SLEEP
849 static int s5m_rtc_resume(struct device
*dev
)
851 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
854 if (info
->irq
&& device_may_wakeup(dev
))
855 ret
= disable_irq_wake(info
->irq
);
860 static int s5m_rtc_suspend(struct device
*dev
)
862 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
865 if (info
->irq
&& device_may_wakeup(dev
))
866 ret
= enable_irq_wake(info
->irq
);
870 #endif /* CONFIG_PM_SLEEP */
872 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops
, s5m_rtc_suspend
, s5m_rtc_resume
);
874 static const struct platform_device_id s5m_rtc_id
[] = {
875 { "s5m-rtc", S5M8767X
},
876 { "s2mps13-rtc", S2MPS13X
},
877 { "s2mps14-rtc", S2MPS14X
},
878 { "s2mps15-rtc", S2MPS15X
},
881 MODULE_DEVICE_TABLE(platform
, s5m_rtc_id
);
883 static struct platform_driver s5m_rtc_driver
= {
886 .pm
= &s5m_rtc_pm_ops
,
888 .probe
= s5m_rtc_probe
,
889 .remove
= s5m_rtc_remove
,
890 .id_table
= s5m_rtc_id
,
893 module_platform_driver(s5m_rtc_driver
);
895 /* Module information */
896 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
897 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
898 MODULE_LICENSE("GPL");
899 MODULE_ALIAS("platform:s5m-rtc");