arch/alpha/kernel/irq_alpha.c

   1 /*
   2  * Alpha specific irq code.
   3  */
   4
   5 #include <linux/init.h>
   6 #include <linux/sched.h>
   7 #include <linux/irq.h>
   8 #include <linux/kernel_stat.h>
   9 #include <linux/module.h>
  10
  11 #include <asm/machvec.h>
  12 #include <asm/dma.h>
  13 #include <asm/perf_event.h>
  14 #include <asm/mce.h>
  15
  16 #include "proto.h"
  17 #include "irq_impl.h"
  18
  19 /* Hack minimum IPL during interrupt processing for broken hardware.  */
  20 #ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
  21 int __min_ipl;
  22 EXPORT_SYMBOL(__min_ipl);
  23 #endif
  24
  25 /*
  26  * Performance counter hook.  A module can override this to
  27  * do something useful.
  28  */
  29 static void
  30 dummy_perf(unsigned long vector, struct pt_regs *regs)
  31 {
  32         irq_err_count++;
  33         printk(KERN_CRIT "Performance counter interrupt!\n");
  34 }
  35
  36 void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
  37 EXPORT_SYMBOL(perf_irq);
  38
  39 /*
  40  * The main interrupt entry point.
  41  */
  42
  43 asmlinkage void
  44 do_entInt(unsigned long type, unsigned long vector,
  45           unsigned long la_ptr, struct pt_regs *regs)
  46 {
  47         struct pt_regs *old_regs;
  48
  49         /*
  50          * Disable interrupts during IRQ handling.
  51          * Note that there is no matching local_irq_enable() due to
  52          * severe problems with RTI at IPL0 and some MILO PALcode
  53          * (namely LX164).
  54          */
  55         local_irq_disable();
  56         switch (type) {
  57         case 0:
  58 #ifdef CONFIG_SMP
  59                 handle_ipi(regs);
  60                 return;
  61 #else
  62                 irq_err_count++;
  63                 printk(KERN_CRIT "Interprocessor interrupt? "
  64                        "You must be kidding!\n");
  65 #endif
  66                 break;
  67         case 1:
  68                 old_regs = set_irq_regs(regs);
  69 #ifdef CONFIG_SMP
  70           {
  71                 long cpu;
  72
  73                 smp_percpu_timer_interrupt(regs);
  74                 cpu = smp_processor_id();
  75                 if (cpu != boot_cpuid) {
  76                         kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ));
  77                 } else {
  78                         handle_irq(RTC_IRQ);
  79                 }
  80           }
  81 #else
  82                 handle_irq(RTC_IRQ);
  83 #endif
  84                 set_irq_regs(old_regs);
  85                 return;
  86         case 2:
  87                 old_regs = set_irq_regs(regs);
  88                 alpha_mv.machine_check(vector, la_ptr);
  89                 set_irq_regs(old_regs);
  90                 return;
  91         case 3:
  92                 old_regs = set_irq_regs(regs);
  93                 alpha_mv.device_interrupt(vector);
  94                 set_irq_regs(old_regs);
  95                 return;
  96         case 4:
  97                 perf_irq(la_ptr, regs);
  98                 return;
  99         default:
 100                 printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
 101                        type, vector);
 102         }
 103         printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
 104 }
 105
 106 void __init
 107 common_init_isa_dma(void)
 108 {
 109         outb(0, DMA1_RESET_REG);
 110         outb(0, DMA2_RESET_REG);
 111         outb(0, DMA1_CLR_MASK_REG);
 112         outb(0, DMA2_CLR_MASK_REG);
 113 }
 114
 115 void __init
 116 init_IRQ(void)
 117 {
 118         /* Just in case the platform init_irq() causes interrupts/mchecks
 119            (as is the case with RAWHIDE, at least).  */
 120         wrent(entInt, 0);
 121
 122         alpha_mv.init_irq();
 123 }
 124
 125 /*
 126  * machine error checks
 127  */
 128 #define MCHK_K_TPERR           0x0080
 129 #define MCHK_K_TCPERR          0x0082
 130 #define MCHK_K_HERR            0x0084
 131 #define MCHK_K_ECC_C           0x0086
 132 #define MCHK_K_ECC_NC          0x0088
 133 #define MCHK_K_OS_BUGCHECK     0x008A
 134 #define MCHK_K_PAL_BUGCHECK    0x0090
 135
 136 #ifndef CONFIG_SMP
 137 struct mcheck_info __mcheck_info;
 138 #endif
 139
 140 void
 141 process_mcheck_info(unsigned long vector, unsigned long la_ptr,
 142                     const char *machine, int expected)
 143 {
 144         struct el_common *mchk_header;
 145         const char *reason;
 146
 147         /*
 148          * See if the machine check is due to a badaddr() and if so,
 149          * ignore it.
 150          */
 151
 152 #ifdef CONFIG_VERBOSE_MCHECK
 153         if (alpha_verbose_mcheck > 1) {
 154                 printk(KERN_CRIT "%s machine check %s\n", machine,
 155                        expected ? "expected." : "NOT expected!!!");
 156         }
 157 #endif
 158
 159         if (expected) {
 160                 int cpu = smp_processor_id();
 161                 mcheck_expected(cpu) = 0;
 162                 mcheck_taken(cpu) = 1;
 163                 return;
 164         }
 165
 166         mchk_header = (struct el_common *)la_ptr;
 167
 168         printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
 169                machine, vector, get_irq_regs()->pc, mchk_header->code);
 170
 171         switch (mchk_header->code) {
 172         /* Machine check reasons.  Defined according to PALcode sources.  */
 173         case 0x80: reason = "tag parity error"; break;
 174         case 0x82: reason = "tag control parity error"; break;
 175         case 0x84: reason = "generic hard error"; break;
 176         case 0x86: reason = "correctable ECC error"; break;
 177         case 0x88: reason = "uncorrectable ECC error"; break;
 178         case 0x8A: reason = "OS-specific PAL bugcheck"; break;
 179         case 0x90: reason = "callsys in kernel mode"; break;
 180         case 0x96: reason = "i-cache read retryable error"; break;
 181         case 0x98: reason = "processor detected hard error"; break;
 182
 183         /* System specific (these are for Alcor, at least): */
 184         case 0x202: reason = "system detected hard error"; break;
 185         case 0x203: reason = "system detected uncorrectable ECC error"; break;
 186         case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
 187         case 0x205: reason = "parity error detected by core logic"; break;
 188         case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
 189         case 0x207: reason = "non-existent memory error"; break;
 190         case 0x208: reason = "MCHK_K_DCSR"; break;
 191         case 0x209: reason = "PCI SERR detected"; break;
 192         case 0x20b: reason = "PCI data parity error detected"; break;
 193         case 0x20d: reason = "PCI address parity error detected"; break;
 194         case 0x20f: reason = "PCI master abort error"; break;
 195         case 0x211: reason = "PCI target abort error"; break;
 196         case 0x213: reason = "scatter/gather PTE invalid error"; break;
 197         case 0x215: reason = "flash ROM write error"; break;
 198         case 0x217: reason = "IOA timeout detected"; break;
 199         case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
 200         case 0x21b: reason = "EISA fail-safe timer timeout"; break;
 201         case 0x21d: reason = "EISA bus time-out"; break;
 202         case 0x21f: reason = "EISA software generated NMI"; break;
 203         case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
 204         default: reason = "unknown"; break;
 205         }
 206
 207         printk(KERN_CRIT "machine check type: %s%s\n",
 208                reason, mchk_header->retry ? " (retryable)" : "");
 209
 210         dik_show_regs(get_irq_regs(), NULL);
 211
 212 #ifdef CONFIG_VERBOSE_MCHECK
 213         if (alpha_verbose_mcheck > 1) {
 214                 /* Dump the logout area to give all info.  */
 215                 unsigned long *ptr = (unsigned long *)la_ptr;
 216                 long i;
 217                 for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
 218                         printk(KERN_CRIT "   +%8lx %016lx %016lx\n",
 219                                i*sizeof(long), ptr[i], ptr[i+1]);
 220                 }
 221         }
 222 #endif /* CONFIG_VERBOSE_MCHECK */
 223 }
 224
 225 /*
 226  * The special RTC interrupt type.  The interrupt itself was
 227  * processed by PALcode, and comes in via entInt vector 1.
 228  */
 229
 230 struct irqaction timer_irqaction = {
 231         .handler        = timer_interrupt,
 232         .name           = "timer",
 233 };
 234
 235 void __init
 236 init_rtc_irq(void)
 237 {
 238         irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
 239                                       handle_percpu_irq, "RTC");
 240         setup_irq(RTC_IRQ, &timer_irqaction);
 241 }
 242
 243 /* Dummy irqactions.  */
 244 struct irqaction isa_cascade_irqaction = {
 245         .handler        = no_action,
 246         .name           = "isa-cascade"
 247 };
 248
 249 struct irqaction timer_cascade_irqaction = {
 250         .handler        = no_action,
 251         .name           = "timer-cascade"
 252 };
 253
 254 struct irqaction halt_switch_irqaction = {
 255         .handler        = no_action,
 256         .name           = "halt-switch"
 257 };